Switch-mode Power Amplifier Research Articles

Cavitation Detection in a Tonpilz-Type Transducer for Active SONAR Transmission System

The active sound navigation and ranging (SONAR) transmission system emits acoustic pulses underwater using a wave generator, a SONAR power amplifier (SPA), and a projector. The acoustic pulse travel in the direction of the target and return as an echo to a hydrophone to learn the range or speed of the object. Often the same device is used as a hydrophone and a projector; in this context, it is known as a transducer. In order to obtain a maximum range of detection in the SONAR, it is desirable to generate the maximum amount of acoustic power until the point in which the echo can be detectable in an atmosphere with non-wished noise. Therefore, a high value of source level (SL) is required that depends largely on the value of electrical power applied to the transducer (Pe). However, when trying to obtain the maximum range of detection in the SONAR system there are the following three peculiar limitations that affect performance: The cavitation, the reverberation, and the effect of interaction in the near field. In this paper, an experimental measurement methodology is presented to detect the cavitation effects in a tonpilz-type transducer for an active SONAR transmission system using a transducer as a projector and a calibrated hydrophone in a hydroacoustic tank by measuring the parameters of total harmonic distortion of the fundamental waveform (THD-F) of the generated acoustic pulse, transmitting voltage response (TVR) to characterize the system and sound pressure level (SPL) that indicates the intensity of sound at a given distance. Whereas the reverberation and the interaction effect in the near field are objects of other study cases. A 570.21 W and THD-F < 5% switched-mode power amplifier (SMPA) prototype was developed to excite the electroacoustic transducer employing a full-bridge inverter (FBI) topology and a digital controller using a field-programmable gate array (FPGA) for unipolar sine pulse width modulation (SPWM) to generate a continuous wave (CW) acoustic pulse at a frequency 11.6 kHz. The results obtained show that from the level of Pe=196.05 W with the transducer at 1 m of depth, the value of THD-F increases significantly while the behavior of the TVR and SPL parameters is affected since it is not as expected and is attributed when cavitation occurs.

Delay Mismatch Insensitive Dead Time Generator for High-Voltage Switched-Mode Power Amplifiers

The Design of efficient, safe, and reliable circuits is a prime objective in high-voltage (HV) electronic systems, such as switched-mode power amplifiers (PAs). One of the main causes of efficiency degradation and reliability problems, in these amplifiers, is the shoot-through current from the HV power supply to the ground. To eliminate such current, a dead time generator (DTG) is used to modify the signals propagating through the high-side and low-side gate drivers by adding a fixed dead time between them. However, any delay mismatch between these gate drivers can reduce the dead time to the point that it becomes negative. In this paper, an HV-DTG architecture is introduced. The architecture mitigates the effects of delay mismatch variations in gate drivers, which can result from parameters mismatch, fabrication process variations, and temperature variations. An HV switched-mode class-D power amplifier is used to illustrate the performance of the DTG. The amplifier is implemented in a low-cost <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$0.35~\mu m$ </tex-math></inline-formula> HV CMOS process. The total area of the PA is <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$0.5~mm^{2}$ </tex-math></inline-formula> , where the DTG covers an area of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$0.066~mm^{2}$ </tex-math></inline-formula> . A measured system’s efficiency of 95.14% is achieved with the shortest dead time of 10.8 ns, which is 1.38x smaller than the generated dead time in comparable state-of-the-art HV dead time generators.

THE COMPUTER MODELING OF CLASS -D AND -DE SWITCHING-MODE POWER AMPLIFIERS FOR VHF DIGITAL RADIO BROADCAST EQUIPMENT

Currently the transition to digital VHF radio broadcasting is being discussed more and more in different countries, which requires the design of new radio broadcast equipment devices. In classical method of amplifying the power of complex radio signals with a variable envelope, the new broadcast equipment will lose significantly to the existing broadcast equipment with frequency-modulated signal in many energy parameters. The most the promising ways to build high-efficiency broadcast equipment devices of complex radio signals with amplitude-phase modulation and high peak-factor are synthetic methods of linear amplification of radio frequency power (for example, basing on the scheme of L. Kahn) by using high-efficiency switching-mode circuits of powerful amplification. The present state of development of powerful radio-frequency transistors allows to assume that in the near future in the VHF-band switching-mode power amplifiers of Class -D and -F, which will be suitable for building digital radio broadcast equipment with the polar architecture of L. Kahn, will be everywhere used. These switching-mode amplifiers, in contrast to higher-frequency Class-E circuits, supply more steady characteristics in the frequency band. But when developing such broadcast equipment, it is also reasonable to deal with modified switching-mode power amplifiers of the Class -DE and -FE. The article deals with the questions of the computer modeling of switching- mode power amplifiers of Class -D and -DE in relation to the design of VHF radio broadcast equipment.

On the Use of Class D Switching-Mode Power Amplifiers in Visible Light Communication Transmitters.

Visible Light Communication (VLC) is a wireless communication technology that uses visible light to transmit information. The most extended implementation of a VLC transmitter employs a DC-DC power converter that biases the High-Brightness LEDs (HB-LEDs), and a Linear Power Amplifier (LPA) that reproduces the communication signal. Unfortunately, the power efficiency of LPAs is very low, thus reducing the overall system efficiency and requiring huge cooling systems to extract the heat. In this work, the use of Class D Switching-Mode Power Amplifiers (SMPAs) is explored in order to overcome that limitation. It is important to note that this SMPA is widely used for different applications, such as audio and RF power amplifiers. Therefore, there are a lot of versions of a Class D SMPA depending on the topology used for the implementation and the modulation strategy used to control the switches. Hence, this work aims to identify, adapt and explain in detail the best approach for implementing a Class D SMPA for VLC. In order to validate the proposed idea, a power-efficient VLC transmitter intended for short-range and low-speed applications was built and evaluated.

Wideband PPT Class $\Phi _2$ Inverter Using Phase-Switched Impedance Modulation and Reactance Compensation

Class <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$\boldsymbol{\Phi _2}$</tex-math></inline-formula> is a suitable power amplifier (PA) topology for applications that demand low device voltage stress and simple gate driving. The push–pull with T network (PPT) version of this architecture can be advantageous over a conventional single-ended <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$\boldsymbol{\Phi _2}$</tex-math></inline-formula> due to higher power capabilities through interleaving and simple closed-form design equations. The downside with this and many other switch-mode PAs is that they perform efficiently only at a single frequency with the power degrading outside the nominal point of operation. To improve upon this issue, we incorporate a phase-switched impedance modulation variable capacitor and a reactance compensation network so that the PPT <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$\boldsymbol{\Phi _2}$</tex-math></inline-formula> can function across broadband. We experimentally demonstrate a 300-W PA for a 50- <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">${\Omega }$</tex-math></inline-formula> load impedance using silicon devices. The PA achieves above 90% efficiency over approximately a 30% fractional bandwidth. The PA can also operate across broadband with light loads, where above 80% efficiency is maintained for up to five times higher load resistances. This switch-mode PA is one of the first to demonstrate such performance under load variation and across a wide bandwidth.

A Comprehensive Study and Validation of a Power-HIL Testbed for Evaluating Grid-Connected EV Chargers

Integration of excessive electric vehicle (EV) chargers into the low-voltage (LV) network may introduce new challenges. Power hardware in the loop (PHIL) simulations can be used for evaluating such systems as it provides a flexible testing platform to study the overall system as well as individual devices. To facilitate a proper PHIL simulation, a precise mathematical model of the PHIL testbed is required. This article presents a comprehensive small-signal model capable of describing the dynamics of a PHIL testbed developed for evaluating grid-connected EV chargers. The PHIL testbed consists of a PHIL-based battery emulator (BE) and a grid emulator (GE) to mimic the dc side battery energy storage system (BESS) and the ac side LV grid behavior, respectively. A mathematical framework is developed to analyze the stability and predict the accuracy of both PHIL-based emulators. The BE in this article considers a switch-mode power amplifier (PA). Thus, design strategies for its linear controller are also discussed in the context of cascaded dc–dc configuration. An experimental PHIL platform based on a real-time simulator (RTS) has been used to validate theoretical predictions and confirm developed models. Finally, the validated PHIL test has been employed for analyzing the performance of a commercial EV charger and its interactions with a weak LV network simulated in RSCAD/EMTDC.

Efficient RF-PA Two-Chip Supply Modulator Architecture for 4G LTE and 5G NR Dual-Connectivity RF Front End

This article presents a two-chip supply modulation architecture for efficient RF power amplification using a fully switched-mode supply modulator (SM) and a linear-assisted hybrid SM to support simultaneous transmission on long-term evolution (LTE) and 5G bands. The designed fully switched-mode SM consists of a fast switching buck converter and a slow switching buck converter, and it achieves 88.2% peak efficiency and a low receiver (RX) band noise of −140 dBm/Hz at the SM output. The fully switched-mode SM tracks the envelope of LTE 5-/10-/20-MHz signals with the average switching frequencies of 50/70/120 MHz, respectively. The ET-PA measured using the fully switched-mode SM and LTE band-3 power amplifier module integrated duplexer (PAMiD) saves the dc power consumption of 320 mW at a 23-dBm output power compared to an average power tracking (APT)-PA. The designed 5G new radio (NR) SM consisting of a class-AB linear amplifier (LA) and an interleaved three-level buck–boost converter provides a 160-MHz 3-dB bandwidth to track the envelope of a 100-MHz NR signal. The measured peak SM efficiency is 84.1% at a 3.53-W output power. The measured ET-PA with 5G NR SM and 5G n77 PAMiD achieves an ACLR of −36.9 dBc at a 27.45-dBm output power with a 6-dB peak-to-average-power ratio DFT-spread-OFDM NR 100-MHz quadrature phase shift keying (QPSK) signal. It saves the dc power consumption of 950 mW at a 27-dBm output power compared to APT-PA. An optimal RF power amplifier (RF-PA) supply deployment using the two SMs efficiently supports multiple RF-PA loads while satisfying the dual-transmission requirements of E-UTRAN new radio dual-connectivity (EN-DC) and 5G 100-MHz ET operation. The fully switched-mode SM is implemented in a 130-nm CMOS process, and the die size is 4.0 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . The 5G NR SM is implemented in a 90-nm CMOS process, and the die size is 6.75 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> .

ИНТЕРМОДУЛЯЦИОННЫЕ ИСКАЖЕНИЯ В КЛЮЧЕВЫХ ГЕНЕРАТОРАХ КЛАССА D С РЕЗИСТИВНОЙ НАГРУЗКОЙ В РЕЖИМЕ ПЕРЕКЛЮЧЕНИЯ НАПРЯЖЕНИЯ

The development of 5G technologies and the Internet of Things lead to a change in the traditional paradigm of frequency-territorial planning. Indeed, in addition to reducing the distance between base stations of cellular communication, there is a problem of approaching the radio means of mobile devices to them, as well as the problem of uncontrolled convergence of an arbitrary number of radio means on mobile devices. In all cases, intermodulation distortion (name in English technical literature: reverse intermodulation distortion - RIMD) occurs between closely spaced simultaneously operating transmitters. Once in the reception band, they disrupt the normal functioning of radio equipment. Therefore, the requirements for the transmitter's electromagnetic compatibility characteristics are continuously tightened. Class D power amplifiers, in addition to higher efficiency and better quality indicators, may potentially have a lower level of intermodulation distortion. The article deals with intermodulation distortion in previously unexplored class D push-pull voltage switching mode power amplifier with a resistive load. On the developed theoretical approach basis, an analysis was made of the intermodulation distortion levels dependence on the electronic components parameters spread and the circuit operating mode. It is shown that in order to achieve the desired levels of intermodulation distortion, not exceeding -70 dB, it is necessary to ensure the difference in the active elements saturation resistances is not more than 20% and the saturation time deviation from the meander is not more than 2 degrees.

1 kW MHz Wideband Class E Power Amplifier

Class E power amplifiers are widely used in high-frequency applications due to their simplicity and use of only one ground-referenced switch. However, Class E power amplifiers are usually tuned to operate at a fixed frequency due to their resonant nature. Extending the bandwidth of these switch-mode power amplifiers is beneficial in many applications, such as plasma generators and wireless power transfer systems. In this paper, we present a 1 kW wideband Class E power amplifier using Silicon Carbide (SiC) MOSFETs that achieves 93% efficiency at 13.56 MHz with a bandwidth of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$\pm$</tex-math></inline-formula> 1 MHz. We incorporate a reactance compensation network in the output loading stage to achieve wideband operation; design a custom gate drive circuit to reduce the gate power loss and improve thermal performance compared to using a gate driver IC. The total gate power of one SiC MOSFET is measured to be 1.55 W at 13.56 MHz.

Correction of errors and harmonic distortion in pulse-width modulation of digital signals

Pulse-Width (PW) modulation is widely used in those applications where an analog or digital signal has to be encoded in the time domain as a binary stream, such as switched-mode power amplifiers in transmitters of modern telecommunication standards, high-resolution digital signal conversion using single-bit digital-to-analog converters, and many others. Due to the fact that digital signals are sampled in the time domain, the quality of the resulting PW modulated waveforms is worsened by harmonic distortion. Multilevel PW modulation has been proposed to reduce these adverse effects, but the modulated waveform is no longer binary. In this paper, the mechanisms by which harmonic distortion is produced are analyzed. As a result, the distortion terms are mathematically quantified and used to correct the errors. Note that a correction network based on a simple subtraction of the distortion terms from the PW modulated signal would produce a waveform that would no longer be binary. The proposed correction network is implemented in the digital domain and, by means of a sigma-delta modulator, preserves the binary feature of the PW modulated output.

Linearization of High frequency Class E Feedback Amplifier using Negative Impedance Method

This work represents a novel method of linearization of Switch Mode Power Amplifier (SMPA). For this purpose, class E SMPA was designed and analyzed both before and after applying a linearization technique known as Negative Impedance method. One of the major characteristics of a standard SMPA is that they poses high efficiency than their linear counterpart but on the other hand they show highly nonlinear characteristics. The motivation behind this work is to harness this highly efficient amplifier and make it linear which can very useful for various applications in RF communication fields. All the schematics and simulations that are presented in this paper was performed using Cadence Virtuoso environment using “Spectre” simulator tool. For active components, 280nm process technology was used under “gpdk90” pdk which based on BSIM3v3 model. Circuit was designed to run at 2GHz with 2.5 V supply voltage. A mathematical model is also presented using data found from the analysis, with the help of MATLAB. Linearity was measured using Input referred Intercept Point of 3rd order frequency (IIP3), which was improved from 3.7dBm to 17.86dBm with 57% percent efficiency providing an output power of 15.78dBm.

Parallel hybrid linear-switched power amplifier and control strategy for machine emulation

Machine Emulation (ME) is one of the main applications of Power-Hardware-In-the-Loop (PHIL) simulations. The performance and cost of an ME system depends heavily on the type of Power Amplifier (PA) it employs. Linear Power Amplifiers (LPAs) produce ripple free outputs and offer high bandwidths but are costly. Switch-Mode Power Amplifiers (SMPAs) are more affordable, with higher power density, but produce switching harmonics that yield distorted waveforms and reduce the closed loop bandwidths. In order to get a compromise between these technologies for ME, this paper proposes an ME based on a Hybrid Power Amplifier (HPA), with parallel LPA and SMPA. A new current control scheme for the HPA, suitable for voltage-in current-out machine models, is proposed to reduce the required current rating, and thus the cost, of the LPA. A design procedure for the control scheme of the HPA is presented and illustrated for the emulation of a direct-online start-up of an Induction Machine (IM). Simulation results evaluate and compare systems built exclusively with SMPA or LPA for ME. Experimental results are shown to validate the proposed control scheme for the parallel HPA in ME systems. Besides, the impact of the bandwidths of the control loops of the LPA and SMPA and the switching frequency of the SMPA, on the accuracy of the ME system and on the current requirement of the LPA are highlighted.

Wide-band switching-mode power amplifier using varactor-based reconfigurable output matching network

Switch Mode Power Amplifiers (SMPAs) have attracted significant attention due to their high efficiency, thus, designing a reconfigurable SMPA, which can operate efficiently in a wide frequency range, is of great merit. Here, a reconfigurable SMPA with excellent performance was designed. A compact reconfigurable Band-Pass Filter (BPF) network was proposed for the Output Matching Network (OMN) which resulted in optimum matching at operating frequencies for maximum power, Power Added Efficiency (PAE) and gain. A wide-band BPF with microstrip lines was used in the OMN design. It was selected using a set of varactor diodes to meet a desired frequency band. The reconfigurable BPF was connected to the transistor drain using four microstrip lines (as an impedance matching). Through changing the reverse bias voltage of the varactor diodes, the central frequency of BPF can shift between 850 MHz and 1.8 GHz of the bandwidth. The ability to select the desired frequency in PA using a BPF was shown by two modes, lumped and distributed elements. The proposed wideband PA in the frequency band of 850 MHz-1.8 GHz was designed using a GaN CGH40010F. Simulation results showed an 11.6 – 14.5 dB gain with 59–83% Drain Efficiency (DE), and an output power of 41.15 – 41.9 dBm across the frequency band.

Hybrid Model Predictive Control for Modified Modular Multilevel Switch-Mode Power Amplifier

This article proposes a hybrid model predictive control (HMPC) for a modified modular multilevel switch-mode power amplifier (M3-SMPA). The M3-SMPA consists of two parts connected in series including modular multilevel converter (MMC) and full-bridge converter (FBC). Different from available MPC methods that only apply either finite control set MPC (FMPC) or modulated MPC (MMPC), the proposed HMPC method synthesizes the merits of both FMPC and MMPC on different timescales. First, the optimal control option (CO) for MMC is calculated by FMPC with the multiple control objectives, including output voltage control, circulating current control, and submodules (SMs) capacitor voltages balance control. Then, based on the above-mentioned optimal CO, the optimal duty cycle for FBC is calculated by MMPC with a single objective of output voltage control. In this case, the FMPC achieves the multiobjective control of MMC while the MMPC eliminates the tracking error of output voltage using FBC with a fixed switching frequency. Furthermore, a circulating current injection method is presented to balance the SMs capacitor voltages and an improved adjacent search method is introduced to reduce the evaluated COs for MMC in each control period. The effect of dc-link voltage configuration for FBC on output steady-state performance is also analyzed. Finally, the effectiveness of the proposed HMPC method is verified by experimental results.

Guest Editorial: Special Issue on Power Converters and Control Techniques for Very Fast Response Applications

Efficient power converters capable of changing their output voltage at very high speeds (submicrosecond scale) are mandatory for very fast response (VFR) applications. They are necessary to regulate loads that demand very fast voltage changes and to supply high-frequency-pulsed loads for data processing, communication, and portable equipment. VFR converters likewise become necessary for applications in which the efficient generation of high-frequency waveforms is mandatory: envelope amplifiers (EAs) for envelope tracking (ET) techniques, visible light communication (VLC) transmitters using light-emitting diodes (LEDs), switched-mode radio frequency power amplifiers and high-frequency inverters, among others.

Low-power integrated transmitter design using frequency multiplication techniques

This paper proposes an approach to employ frequency multiplication techniques like edge-combining and third harmonic extraction in ultra-low-power integrated transmitter design. The overall power demand of the transmitter is reduced by keeping operating frequency of its components low. For that reason, edge-combining and third harmonic extraction are integrated directly into a switched mode power amplifier. Hence, the radio frequency signal is generated just before it is fed to the antenna. This leads to a reduced power demand of the overall transmitter in comparison to conventional designs where the oscillator and other components are operated directly at the radio frequency.Within this paper we propose an amplifier that generates a 2.4 GHz carrier frequency from a ring oscillator running at a low 200 MHz resulting in a frequency multiplication factor of twelve. The exemplary design is targeted to be used in ultra-low-power short range applications. Hence, our simulations using extracted layout models show that the amplifier provides an output power of approximately -12 dBm at a supply voltage of 0.6 V while consuming 2.4 mW of power fully integrated in a 180 nm 1P6M CMOS process.This demonstrates that the proposed techniques are especially suitable for ultra-low-power transmitter in short range applications. That includes medical and body area network applications.

A Reconfigurable Class-AB/F Power Amplifier for 0.1–4.2 GHz Multistandard Applications

In this paper, a reconfigurable multi-mode Class-AB/F power amplifier (PA) is proposed for 0.1–4.2 GHz multistandard applications. The PA operates in linear mode (class-AB) for variable-envelope modulated signals and switching mode (class-F) for constant-envelope modulated signals. The proposed linear mode PA design is suitable for multi-band LTE, IOT, WSN and multi-standard RF transmitter, while switching mode PA design can be used in multi-band IOT-LPWA and BLE (Bluetooth Low Energy) RF transmitter. The proposed PA has a reconfigurable off-chip inter-stage and output matching networks over the specified frequency band, while the input stage is Complementary Current-Reuse common-gate with active shunt feedback configuration to achieve Ultra-Wideband (UWB) input matching. The proposed multi-mode PA is designed using a 130 nm CMOS process. Class-AB PA has a saturated output power of 23.5 dBm ± 1 dB over 0.1–4.2 GHz, a power-added efficiency (PAE) of 41%, a third-order intercept point (OIP3) of 17 dBm, and adjacent channel power ratio (ACPR) of − 29.3 dBc for LTE 15 MHz channel bandwidth. The maximum PAE of 62.1% under the class-F operation is achieved at output power of 24.5 dBm. The PA occupies 0.64 mm2 of chip area, while the estimated off-chip area is 13.3 mm2. The proposed PA consumes 164 mW, and 16 mW in class-AB and class-F, respectively.

Eight‐channel parallel transmit‐receive system for 7 T MRI with optically controlled and monitored on‐coil current‐mode RF amplifiers

To demonstrate a practical implementation of an eight-channel parallel-transmit system for brain imaging at 7 T based on on-coil amplifier technology. An eight-channel parallel transmit-receive system was built with optimized on-coil switch-mode current RF power amplifiers. The amplifiers were optically controlled from an eight-channel interface that was connected to a 7 T MRI scanner. The interface also optically received a down-converted version of the coil current sensed in each amplifier for monitoring and feedback adjustments. Each on-coil amplifier delivered more than 100 W peak power and provided enough amplifier decoupling (<-15 dB) for the implemented eight-channel array configuration. Phantom and human images were acquired to demonstrate practical operation of this new technology in a 7 T MRI scanner. Further development and improvement of previously demonstrated on-coil technology led to successful implementation of an eight-channel parallel-transmit system able to deliver strong B1 fields for typical brain imaging applications. This is an important step forward toward implementation of on-coil RF amplification for high-field MRI.

A High-Voltage UWB Pulse Generator Using Passive Amplification in 65-nm CMOS

This paper proposes an ultra-wideband (UWB) pulse generator featuring high output amplitude for applications with long transmission and detection range. The output signal of a switch-mode power amplifier stage is passively amplified by a wideband matching network to produce output voltage amplitudes beyond the supply voltage level. Incorporating the parallel LC load of the power amplifier into the matching network and considering the constraints of the wideband matching when the power amplifier is ON and OFF, only a 2-section matching network is added for wideband matching. Employing a trapezoidal waveform as the input signal of the power amplifier, the design flexibility of the matching network to generate a regulation-compliant UWB pulse is further extended. Implemented in a 1-V 65-nm CMOS process, the proposed UWB pulse generator produces a UWB pulse with a de-embedded peak-to-peak amplitude (V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">pp</sub> ) of 2.49 V, a bandwidth of 6.8 GHz and pulse duration of 0.5 ns achieving 249% peak-to-peak to supply voltage ratio.

Repetitive Control Based Phase Voltage Modulation Amendment for FOC-Based Five-Phase PMSMs Under Single-Phase Open Fault

This article investigates the most elementary phase voltage modulation (PVM) for a more generic five-phase permanent magnet synchronous motor drive under a single-phase open fault. Most works on this topic are intended for some specific motor types, and in most cases, it assumes the inverter can still be treated as a linear switching-mode power amplifier. This article figures out that due to an oscillating neutral, the phase voltage is unable to be linearly modulated, which is to say the simplest sinusoidal pulsewidth modulation is problematic to fit a newly developed well-decoupled model under single-phase open fault. To this end, a nonlinear transform incorporating the faulty phase voltage is theoretically proposed, which alleviates the influence of oscillating neutral on PVM, and several approaches to cancel the need for phase voltage sensors are comparatively investigated. Accordingly, the PVM with repetitive control and back electromotive force compensation is put forward to fix the “faulty inverter” in practice. Plausible PVM approaches are tested experimentally, and the superiority of the proposed PVM is confirmed by experimental results.