Switched-capacitor Research Articles

Hybrid high step-up DC-DC converter based on quadratic and switched capacitor cells with reduced voltage stress across the switches

ABSTRACT In this paper, a high step-up DC-DC converter with high voltage gain is proposed. The propounded converter has a non-isolated configuration with a miscellany of three infrastructures, namely a {R1–1} switched quadratic cell, a switched capacitor (SC) cell and an auxiliary switch. The use of {R1–1} switched quadratic cell and SC improves the voltage gain of the converter and also reduces the voltage stresses of semiconductors. {R2–5} By adding an auxiliary switch, one degree of freedom is added to the output voltage gain control. Meanwhile, the efficiency is ameliorated, especially for high voltage gains. The duty cycle of the suggested structure is not only limited to changes but also can include a wide range of changes. In addition, the propounded structure provides higher voltage gains at lower duty cycles. Also, the voltage stress of semiconductor elements is reduced compared to the structures based on switched inductor/capacitor and quadratic converters. The principle of operation and steady-state analysis are discussed in detail. Also, a laboratory prototype is built to validate claim made. The results indicate that the use of an auxiliary switch helps to progress the voltage gain.

Performance evaluation of an automatic resonant switched capacitor-based voltage balancing circuits for series connected batteries

Electrical energy storage (EES) plays a crucial role in various power applications. Voltage imbalance is a common issue that can negatively affect the efficiency, reliability, and safety of EESs. Several types of voltage balancing (VB) circuits have been proposed in much of the literature. Among these VB circuits, switched capacitor (SC)-based circuits have attracted significant interest due to their efficiency, cost-effectiveness, compact size, and ease of control, but their balancing performance is not yet satisfactory. As a result, structural modifications in SC-based circuits have been widely proposed to improve balancing performance. However, not all of these circuit structures have been implemented into a resonant switched capacitor (RSC)-based voltage balancing, which has higher efficiency. Hence, this study aims to assess the efficiency of RSC-based VB circuits by conducting analog simulation using the Matlab Simulink software. This research evaluates the performance of the VB circuit not only in terms of its speed and efficiency, but also in terms of its energy distribution. The results show that the delta structure is the fastest in terms of balancing speed when completing the balancing process, followed by the mesh structure and the parallel structure. The best energy distribution is produced by a parallel structure, as indicated by the change in voltage of all battery cells always moving towards a convergent value, regardless of the variations in initial imbalance conditions. Meanwhile, other circuit structures distribute energy randomly, allowing the voltage of the battery cells to change not directly towards a convergent value. Lastly, the paper summarizes the balancing speed, efficiency, circuit complexity, and quality of energy distribution.

Design of low‐stress ultrahigh‐gain dc–dc converter with coupled inductor

AbstractThe dc–dc converter plays a vital role in renewable energy power generation systems. To enhance the boost range and supply stable output voltage for the power grid, This paper propose an improved low‐stress ultrahigh‐gain dc–dc converter. First, a voltage multiplier cell is designed stemming from a three‐winding coupled inductor and a switched capacitor (SC), which can obtain ultrahigh voltage gain. In the improved voltage multiplier cell, the number of semiconductor devices is reduced, resulting in a decrease in capacitor voltage stress. Moreover, a passive clamp circuit uses the new SC, which can suppress oscillation peak voltage and absorb the leakage energy of the coupled winding. Furthermore, we deduce the operating mode of the proposed converter . Compared with other advanced topologies, the proposed topology outperforms boosting capacity, component stress, and efficiency. To stabilize the output voltage, the converter is closed‐loop controlled. Finally, experiments on the 180 W prototype have demonstrated the reliability and effectiveness of the proposed topology.

A reconfigurable Buck-Boost Cross-Coupled charge Pump

This paper presents a reconfigurable buck-boost Charge Pump (CP) based on the cross-coupled topology. The proposed CP is a switched capacitor (SC) converter merging different ratios and operation modes in one topology. The converter is able to step-up or step-down the input voltage at the output only by controlling the external connections of the circuit. By achieving various conversion ratios and operation modes, higher efficiency levels are performed maximizing the power that is delivered to the load. The reconfigurable buck-boost CP has been designed in 65 nm TSMC CMOS technology and covers an input voltage range from 1.6 V to 3.2 V and an output voltage range also from 1.6 V to 3.2 V in the boost mode and an input voltage range from 2.6 V to 3.6 V and an output voltage range from 1.4 to 1.8 V in the buck mode. In addition, efficiency estimation analysis is presented and proves how parasitic capacitances of flying capacitors affect the overall efficiency of a multi-ratio converter. The converter indicates peak efficiency equal to 77 % and delivers up to 4 mA load current.

RSO based selective harmonic elimination control for nine-level switched capacitor inverter

Abstract Renewable energy utilization has gained much attention in the recent time owing to the sharp increase in the power demand. Out of different renewable sources, photovoltaic (PV) energy utilization in different forms is one of key focus. Power converter such as multilevel inverters (MLIs) are proven as key components for PV systems as well as for other applications such as motor drives, electric vehicles, and charging stations. With the advancement of the design of MLIs, the switched-capacitor (SC) based MLIs have been widely deployed for their boosting capability which is a major requirement for PV systems. In this paper, a reduced switch single input step-up 9-level SC MLI is first proposed. Followed by this, a new Rat Swarm Optimization (RSO) based Selective Harmonic Elimination (SHE) control method is incorporated for switching operation. RSO has the ability to provide the solution with higher competency within less time and a less computationally complex approach. The operation of proposed structure is analyzed and its advantages are justified by comparison with exiting topologies. The effectiveness of RSO based SHE scheme is also verified by comparing it with other nature-inspired algorithms. The effectiveness and workability of the proposed system are examined using simulation and experimental tests.

Improvements in Resistive and Capacitive Switching Behaviors in Ga2O3 Memristors via High-Temperature Annealing Process.

This study investigates the effect of a high-temperature annealing process on the characteristics and performance of a memristor based on a Ag/Ga2O3/Pt structure. Through X-ray diffraction analysis, successful phase conversion from amorphous Ga2O3 to β-Ga2O3 is confirmed, attributed to an increase in grain size and recrystallization induced by annealing. X-ray photoelectron spectroscopy analysis revealed a higher oxygen vacancy in annealed Ga2O3 thin films, which is crucial for conductive filament formation and charge transport in memristors. Films with abundant oxygen vacancies exhibit decreased set voltages and increased capacitance in a low-resistive state, enabling easy capacitance control depending on channel presence. In addition, an excellent memory device with a high on/off ratio can be implemented due to the reduction of leakage current due to recrystallization. Therefore, it is possible to manufacture a thin film suitable for a memristor by increasing the oxygen vacancy in the Ga2O3 film while improving the overall crystallinity through the annealing process. This study highlights the significance of annealing in modulating capacitance and high-resistive/low-resistive state properties of Ga2O3 memristors, contributing to optimizing device design and performance. This study underscores the significance of high-temperature annealing in improving the channel-switching characteristics of Ga2O3-based memristors, which is crucial for the development of low-power, high-efficiency memory device.

Low-power DC-DC converters for smart and environmentally-friendly electric vehicles: design, simulation, and fabrication on a glass substrate

This research focuses on evaluating and comparing different DC-DC converter designs, specifically for low power applications. The study considers inductor-based, switching capacitor, and linear voltage regulator (LVR) DC-DC converters. While there has been critical investigation of DC-DC converters in the literature, there is a gap in assessing their performance based on a comprehensive set of conflicting parameters. Additionally, there is a lack of research on matching the most suitable DC-DC converter with specific low power applications. The chosen application for this study is a DC-DC converter on a glass substrate, specifically for smart glass in electric vehicles. The research presents a complete process that includes design, simulation, layout, fabrication, and measurement. Through simulations, a 4.8 V to 3.3 V buck converter is recommended, demonstrating an almost ideal response time and minimal output ripples. Experimental measurements also confirm a low output ripple of 0.3 %. By addressing this research gap and providing a comprehensive evaluation of DC-DC converters, this study contributes to the development of efficient and reliable power solutions for smart glass applications in electric vehicles.

Research on reactive voltage control strategy for substations connected to photovoltaic systems

Abstract The reactive voltage control of conventional substations is mainly realized by adjusting the switching of capacitors or reactors and changing the transformer ratio, which can only be controlled discretely. The PV inverter can carry out continuous reactive power control, and the reactive voltage control strategy of the conventional substation does not consider the reactive power control of the PV. In this paper, the nine-zone diagram control strategy of the traditional substation is used as a reference, and the reactive voltage optimization control strategy of a substation with a photovoltaic power generation system is constructed considering the characteristics that photovoltaic inverter can continuously regulate reactive power. Taking the internal power grid of an enterprise as an example, the simulation analysis verifies the effectiveness of the control strategy, which can ensure that the voltage and power factor of the grid-connected access point are qualified. At the same time, the voltage fluctuation of the grid-connected point can be reduced, and the network consumption can be reduced.

Automatic Power Factor Compensation (APFC) for Industrial Power Use to Minimize Penalty

Abstract: In this proposed system, two zero crossing detectors are used for detecting zero crossing of voltage and current. The project is designed to minimize penalty for industrial units using automatic power factor correction unit. The microcontroller used in this project belongs to 8051 family. The time lag between the zero-voltage pulse and zero-current pulse is duly generated by suitable operational amplifier circuits in comparator mode is fed to two interrupt pins of a microcontroller. The program takes over to actuate appropriate number of relays from its output to bring shunt capacitors into load circuit to get the power factor till it reaches near unity. The capacitor bank and relays are interfaced to the microcontroller using a relay driver. It displays time lag between the current and voltage on an LCD. Furthermore, the project can be enhanced by using thyristor control switches instead of relay control to avoid contact pitting often encountered by switching of capacitors due to high in rush current

Robust PWM control scheme for switched-capacitor MLI with leakage current suppression in grid-connected renewable energy application

Typically, parasitic capacitances exist between the ground and the solar panel terminals in grid-connected PV systems. These parasitic capacitances provide a path for a leakage current, which leads to significant safety concerns, observable and seriously hazardous harmonic orders aligned with the injected grid current, and significant safety difficulties. In this research, a robust PWM controlling method that used competently in reducing the level of the leakage current and improving the power quality of a switched-capacitor Multilevel Inverter. This technique creates developed reference signals from the main signal to generate the switching scheme for the converter circuit. Additionally, the suggested control strategy only works with a small number of carrier signals, resulting in a quick system response and a simpler controller algorithm. Likewise, this controlling approach offers a stable way to maintain a constant output voltage in the suggested converter by adjusting the switching capacitors' voltages, which is not possible with traditional control techniques. MATLAB/Simulink is used to simulate the outcomes for both the suggested control approach and the traditional Phase Disposition (PD) PWM control method whereas the leakage current component reduces to 25 % compared to the captured component with the PDPWM. The simulation and the practical results based on the dSPACE-1103 hardware are quite similar.

Advancements in Filter Technology: Evolution and Applications

This paper explores the historical trajectory and contemporary applications of signal processing filters. From the early days of analog filters to the current digital era, the paper traces their evolution, emphasizing key developments in active RC filters, monolithic integrated op amps, and the transition to switched-capacitor and continuous-time filters. Fundamentals of analog and digital filters are outlined, distinguishing their processing of continuous-time and discrete-time signals. The classification of filters, including low-pass, high-pass, band-pass, and band-stop, is discussed with insights into their specific applications. The paper delves into crucial applications in audio processing, video processing, communication systems, power management, and sensor signal processing, showcasing filters' pivotal role in enhancing signal quality across diverse fields. Addressing emerging technologies, the paper highlights adaptive and deep learning filters, projecting the future trends in filter technology. It anticipates developments in analog integrated filters, emphasizing the growing significance of integrated circuits technology. This comprehensive review aims to deepen readers' understanding and inspire continued innovation in signal processing.

An AQ-SCS Optimization Assisted Optimal Expansion Planning with Fixed and Switchable Capacitors for Distribution System

Distribution System has given renewable-based DGs like Solar PV and Wind turbines a lot of attention because of growing worries about global warming and the depletion of fossil fuels. This work proposes a unique hybridized optimization technique for a distribution system expansion plan utilizing an innovative theoretical framework. Two stages are used to tackle the issue with the distribution system expansion plan: master optimization and sub-optimization for every state of the system. The developed Aquila based Sand Cat Swarm (Aq-SCS) optimization method considers the distribution system factors, like DG type, size/capacity, location, PQ power, fixed capacitor, switchable capacitor, and the SPV/wind capacity with load demand uncertainties. The sub-algorithm is employed in conjunction with the DG allocation strategy produced by the master algorithm to deduce the state-dependent operating tactics for each individual DG unit with respect to active and reactive power. The suggested Aq-SCS optimization approach is created by combining the properties of the SCSO with the AOA models. The main objective of achieving the minimal possible cost for the DSEP is verified, and the cycle continues unless the best outcome (least cost) is reached. The analysis of the suggested approach is carried out in 4 cases, such as (i) Without DG and capacitor (ii) With capacitor and no DG (iii) With DG and no capacitor (iv) With both capacitor and DG. The analysis is made in IEEE 33 bus system. The Aq-SCS approach outperforms the conservative approaches SSI-CS, WHO, AQO, and SCSO, according to the analysis conducted in MATLAB/Simulink utilizing an IEEE-33 bus system with five system states.

A Novel Leg-Integrated Switched Capacitor Inverter Topology for Three-Phase Induction Motor Drives

This paper presents an optimized leg-integrated switched capacitor inverter (LISCI) topology for 3-φ induction motor driven home appliance applications where a switched capacitor (SC) network, used for voltage boosting, is integrated with one of the inverter legs (phase-A leg). This results in a reduced semiconductor requirement as the voltage ratings of the phase-A switches are reduced by half. Moreover, due to the unique structure of the proposed topology, it can produce 3-level pole voltage corresponding to phase-A, even though the pole voltages of phases B and C remain 2-level. This kind of performance, referred to as quasi 3-level performance, results in an unusual space vector (SV) hexagon with 12 SVs, which is implemented by using a novel PWM method. A comparison study of the proposed topology with the existing SC based 3-φ inverter topologies reveals that the former has the lowest semiconductor requirement, highly improved harmonic performance and very low losses. All the claims are supported by experimental validations performed on a 3φ induction motor (3φIM) drive.

An energy-efficient reconfigurable 18/12-bit 1 MS/s pipelined-SAR ADC

This paper presents a low-power 18/12-bit 1 MS/s reconfigurable pipelined-successive approximation register analog-to-digital converter (pipelined-SAR ADC). The proposed pipelined-SAR ADC employs a two-stage SAR structure coupled through a residual amplifier, with the forestage performing 12-bit coarse quantization and the poststage handling 7-bit fine quantization, one bit of redundancy is contained in the rear stage. The input signal is sampled by the first stage, SAR ADC, using the upper plate of a capacitor array and is quantized by charge redistribution. This eliminates the need of additional DACs and subtractors, allowing direct acquisition of the residuals. In addition, the residuals can be amplified by reusing the capacitor array as a switching capacitor. To minimize static power consumption, dynamic logic is adopted in each module of the pipelined-SAR ADC. The calibration of comparator offset and capacitor mismatch is carried out using analog front-end calibration techniques. Implemented in a 180 nm CMOS process, the simulation results show an extra-low power consumption of 1.76 mW with 3.3 V supply voltage and 1 MS/s sampling rate, indicating an exceptional Schreier figure of merit (FOMs) at 181.64 dB. By shutting down the modules of the second-stage SAR ADC, the 18-bit ADC can be dynamically configured as a 12-bit ADC with a sampling rate of up to 5 MS/s.

A Novel High-Impedance Fault Detection Technique in Smart Active Distribution Systems

Identification of high impedance fault (HIF) is important in smart active distribution systems (SADSs). The existing protection methods fail to detect HIF, as HIFs have peculiar fault current characteristics. However, if HIFs are left undetected, they result in severe fire hazards and arcing. The paper proposes a novel fault detection indicator that utilizes the differential energy associated with the positive sequence current components during faults. IEEE-13 bus and IEEE-34 bus system is used for simulation in Real Time Digital Simulator (RTDS). The results show that proposed technique accurately identify HIFs and perfectly discriminates the transients due to HIFs, non-linear loads and voltage and reactive power compensation devices. Furthermore, it differentiates HIFs from other switching transients like capacitor or load switching events. Other factors, like transformer inrush currents, effect of noise and sampling rate are also considered to ensure the accuracy and reliability of the proposed method. Moreover, the practical feasibility of the proposed method is also experimentally validated.

An Improved High Gain Continuous Input Current Quadratic Boost Converter for Next–Generation Sustainable Energy Application

With the rapid transformation from fossil fuel-based energy systems to renewable-based energy systems the application of a high gain boost DC-DC converter is becoming the main attraction due to its wide range of numerous applications. This specific study presents an improved high gain non isolated quadratic boost DC-DC converter (QBC) with voltage gain three times of the quadratic boost converter. The proposed non-isolated category topology is the modified version of the quadratic boost converter where the 2nd inductor of the QBC is replaced by a voltage multiplier cell (VMC) and a switch capacitor network is integrated with the VMC to increase the voltage gain as well as to reduce the switch’s voltage stress. Moreover, the continuous input current and common ground feature of this proposed circuit configuration have shaped its potential application by making it advantageous over other non-isolated based high gain boost converters. To support its feasibility a rated power of 150 W prototype is developed after validating the results by Plecs software. The voltage gain offered by this proposed circuit configuration is justified by experimental results and the software simulation. A comprehensive analysis and components design is also formulated and documented in this study.

Single Source Switched Capacitor Multilevel inverter with Voltage Boosting Capability and Low Switch Count

Single Source Switched Capacitor Multilevel inverter with Voltage Boosting Capability and Low Switch Count

A seven‐level switched‐capacitor based transformerless inverter with modified PWM strategy to enhance the performance of grid‐connected PV systems

AbstractAmong different types of transformerless photovoltaic inverters, multi‐level inverters based on switched‐capacitors (SC) are the burning topic of recent decades due to their potential advantages, such as, single source requirement, voltage boosting capability, and high power density. However, for a seven level output voltage, a conventional SC based inverter architecture uses more than two units of SC, a large amount of power switches, which then lead to capacitor voltage balancing problems. This paper presents a seven‐level switched‐capacitor transformerless inverter (SCTI), which is structured with only two SC units, ten power switches, and a single DC source. The proposed SCTI ensures voltage boosting capability, self‐voltage balancing, and low power semiconductor losses. Apart from these, a modified sinusoidal pulse width modulation (MSPWM) is also proposed in this work, which guarantees better thermal performance and low inverter output voltage THD for the proposed SCTI. The proposed SCTI along with the MSPWM is simulated in MATLAB/Simulink and PLECS computer simulation environments. A reduced scale laboratory prototype is also built and tested to ensure the feasibility of the proposed SCTI.

Design and investigation of a novel variable reactance-based capacitive RF-MEMS switch with multifrequency operation for mmWave applications

Design and investigation of a novel variable reactance-based capacitive RF-MEMS switch with multifrequency operation for mmWave applications

Single Source Switched Capacitor Based Multilevel Inverter With Reduced Number of Components

Multilevel inverters find extensive use across various applications owing to their capability to generate voltage waveforms of superior quality. thereby minimizing harmonic distortion. Traditional multilevel inverters require a substantial number of power semiconductor devices and passive components, resulting in heightened costs, intricacy, and physical dimensions. These multilevel inverters play a pivotal role in the electric vehicle sector, serving as a critical component in EV power trains for converting Convert DC power from batteries into AC power to operate electric motors.. The research methodology involves the following steps: Design and configuration of a multilevel inverter utilizing switched capacitor technology from a single source.. Design proposed topologies for multilevel inverter design. Design a circuit according topologies in MATLAB. Comparative analysis with existing multilevel inverter designs. Evaluation of the inverter's performance in terms of harmonic distortion, output voltage quality, and efficiency. Rather than employing a multilevel inverter with fewer switches that operates from a single source the highest possible levels are preferred. This paper introduces an innovative 9-level multilevel inverter based on a single source and switched capacitors, which significantly reduces the number of switches required, utilizing only three capacitors and a single DC source. This design approach serves to streamline the inverter's intricacy, decrease costs, and minimize its physical footprint. Furthermore, it elevates the voltage levels by up to 96%, enhancing the overall performance and efficiency of the inverter. Additionally, this technology can be applied in electric vehicles, integrated with renewable energy sources, and utilized in industrial settings. The novelty of this research lies in the utilization of a single-source switched capacitor configuration to achieve multilevel inverter functionality. This approach reduces the number of components required, leading to potential cost savings and improved system reliability. The novel features of this study include: Integration of switched capacitors in a single-source multilevel inverter design. Achieving multilevel inverter functionality with fewer components. Improved performance and efficiency compared to traditional multilevel inverter designs.