Surrounding-Gate Metal Oxide Semiconductor Field Effect Transistors Research Articles

Quantum Modelling of Nanoscale Silicon Gate-All-Around Field Effect Transistor

The paper introduces an analytical model for gate all around (GAA) or Surrounding Gate Metal Oxide Semiconductor Field Effect Transistor (SG-MOSFET) inclusive of quantum mechanical effects. The classical oxide capacitance is replaced by the capacitance incorporating quantum effects by including the centroid parameter. The quantum variant of inversion charge distribution function, inversion layer capacitance, drain current, and transconductance expressions are modeled by employing this model. The established analytical model results agree with the simulated results, verifying these models' validity and providing theoretical supports for designing and applying these novel devices.

Surface Potential modeling of Dual Metal Gate-Graded Channel-Dual Oxide Thickness with two dielectric constant different of Surrounding Gate MOSFET

An Analytical study for the surface potential, threshold voltage and Subthreshold swing (SS) of Dual-metal Gate Graded channel and Dual Oxide Thickness with two dielectric constant different cylindrical gate surrounding-gate (DMG-GC-DOTTDCD) metal–oxide–semiconductor field-effect transistors (MOSFETs) is proposed to investigate short-channel effects (SCEs). The performance of the modified structure was studied by developing physics-based analytical models for the surface potential, threshold voltage shift, and Subthreshold swing. It is shown that the novel MOSFET could significantly reduce threshold voltage shift and Subthreshold swing, can also provides improved electron transport and reduced short channel effects (SCE). Results reveal that the DMG-GC-DOTTDCD devices with different dielectric constant offer superior characteristics as compared to DMG-GC-DOT devices. The derived analytical models agree well with simulation by ATLAS.

A compact model for gate tunneling currents in undoped cylindrical surrounding-gate metal-oxide-semiconductor field-effect transistors

We present a compact model of the gate tunneling current in cylindrical surrounding-gate (SG) metal-oxide-semiconductor field-effect transistors (MOSFETs) based on quantum mechanical correction. The model is physics-based and is given in an analytical closed form. We start by deriving a quadratic approximation of the quantum electrostatic potential with the two lowest energy levels using quantum perturbation theory. In addition, small-diameter cylindrical SG MOSFETs can be described excellently by taking both structural and electrical confinement effects into account. A self-consistent Schrödinger-Poisson simulation was used as a benchmark to assess the proposed model. It was found that the calculated gate tunneling currents determined using the model matched well with the corresponding currents derived using self-consistent calculations. The model is thus useful for fast analysis of gate tunneling currents within the context of a circuit simulator.

Compact Modeling of Qunatum Effects in Undoped Long- Channel Cylindrical Surrounding-Gate MOSFETs

Quantum effects have been incorporated in the analytic potential model for cylindrical surrounding-gate or gate-all-around metal oxide semiconductor field effect transistors (MOSFETs). By extracting some constants parameter from the self-consistent Schrodinger and Poisson equations, two physical parameters, threshold voltage shift and inversion layer centroid, are expressed as closed form function of device radius and charge density. The quantum version of inversion charge density is obtained by incorporating of those parameters into the classical procedure as modifications for gate work function and inversion layer capacitance. The model represented here has been able to reproduce simulation data obtained from self-consistent calculation. The calculated results show that the model fits well with the self-consistent calculation.

Triple Material Surrounding Gate MOSFET for Suppression of SCES

Continuous downscaling of conventional MOSFETs suffers from various detrimental shortchannel effects (SCEs). A combination of novel device structures and material property improvement can overcome the SCEs in order to sustain the historical cadence of scaling. In this paper, a comprehensive analysis on the effect of downscaling in the performance of a novel gate-engineered Triple Material (TM) Surrounding Gate (SRG) Metal Oxide Semiconductor Field Effect Transistor (MOSFET) is presented. With the help of device simulator Silvaco ATLAS, the effect of variation of the radius (R) and the channel length (L g ) on the surface potential, the Electric Field and the drain current is reported in order to provide an enticement for future theoretical studies and experimental researches of the critical aspects of the gate-engineered surrounding gate MOSFET. Results indicate that a trade-off between gate length L g and channel radius R is necessary to achieve higher immunity against SCEs with a lower OFF-state leakage current to find its usage in ultra low-power applications.

Subthreshold Behaviors of Nanoscale Silicon and Germanium Junctionless Cylindrical Surrounding-Gate MOSFETs

Abstract When the traditional planar metal-oxide-semiconductor-field-effect transistors (MOSFETs) encounter insurmountable bottleneck of static power dissipation, junctionless transistor (JLT) becomes a promising candidate for sub-22 nm nanoscale devices due to its simpler fabrication process and better short-channel performances. Subthreshold behaviors dominate the standby power of nanoscale JLTs. In this chapter, a physics-based analytical model of electrostatic potential for both silicon and germanium short-channel junctionless cylindrical surrounding-gate (JLCSG) MOSFETs operated in the subthreshold regime is proposed, in which the full twodimensional (2D) Poisson’s equation is solved in the channel region by a method of series expansion. The expression of the proposed electrostatic potential is completely rigorous and explicit. Based on this result, the expressions of threshold voltage, subthreshold drain current, and subthreshold swing for JLCSG MOSFETs are derived. Subthreshold behaviors are studied in detail by changing different device parameters and bias conditions, including doping concentration, channel radius, gate length, gate equivalent oxide layer thickness, drain voltage, and gate voltage. Results predicted by all the analytical models agree well with numerical solutions from the three-dimensional simulator. These analytical models can be used to investigate the operating mechanisms of nanoscale JLCSG MOSFETs and to optimize their device performances.

Conical surrounding gate MOSFET: a possibility in gate-all-around family

In this paper a new conical surrounding gate metal-oxide-semiconductor field effect transistor (MOSFET) with triple-material gate has been proposed and verified using TCAD device simulator from Synopsis. The electrostatic performance of conical model with different tapering ratios is extensively investigated and compared with that of cylindrical model (tapering ratio TR = 1). The present model exhibits improved electrostatic behavior for an optimized tapering ratio of 0.98 as compared to the conventional cylindrical model. The results reveal that the triple-material conical model provides better ON current performance, transconductance and reduced threshold voltage. On the contrary the single-material conical model exhibits maximum / ratio, minimum OFF current and reduced subthreshold swing (SS) in comparison to other models. Thus, the conical model with optimized tapering ratio can be a possible replacement of cylindrical model for low-power and high speed application.

A two-dimensional analytical subthreshold behavior model for junctionless dual-material cylindrical surrounding-gate MOSFETs

A two-dimensional analytical subthreshold behavior model for junctionless dual-material cylindrical surrounding-gate (JLDMCSG) metal-oxide-semiconductor field-effect transistors (MOSFETs) is proposed. It is derived by solving the two-dimensional Poisson's equation in two continuous cylindrical regions with any simplifying assumption. Using this analytical model, the subthreshold characteristics of JLDMCSG MOSFETs are investigated in terms of channel electrostatic potential, horizontal electric field, and subthreshold current. Compared to junctionless single-material cylindrical surrounding-gate MOSFETs, JLDMCSG MOSFETs can effectively suppress short-channel effects and simultaneously improve carrier transport efficiency. It is found that the subthreshold current of JLDMCSG MOSFETs can be significantly reduced by adopting both a thin oxide and thin silicon channel. The accuracy of the analytical model is verified by its good agreement with the three-dimensional numerical simulator ISE TCAD.

Modeling and simulation of centroid and inversion charge density in cylindrical surrounding gate MOSFETs including quantum effects

An analytical model for surrounding gate metal—oxide—semiconductor field effect transistors (MOSFETs) considering quantum effects is presented. To achieve this goal, we have used a variational approach for solving the Poissonand Schrodinger equations. This model is developed to provide an analytical expression for the inversion charge distribution function for all regions of the device operation. This expression is used to calculate the other important parameters like the inversion charge centroid, threshold voltage and inversion charge density. The calculated expressions for the above parameters are simple and accurate. The validity of this model was checked for the devices with different device dimensions and bias voltages. The calculated results are compared with the simulation results and they show good agreement.

A new I–V model for surrounding-gate MOSFET considering gate-voltage-dependent quantum effect

We present a new I–V model for a long-channel surrounding-gate (SG) metal–oxide–semiconductor field-effect transistor (MOSFET). SG MOSFET is a strong candidate for next generation nanoscale devices due to a high electrostatic channel control, which in turn substantially reduces the short-channel effect. The new model takes into account quantum mechanical (QM) effects in the SG MOSFET using a double triangular QM well model in the strong inversion regime. In contrast with the old model, we consider the V g dependence of the QM effect. New model yields excellent agreement with 2-D numerical simulation results for various radii and gate oxide thicknesses of the SG MOSFET.

An analytic drain current model for long-channel undoped gate stack surrounding-gate MOSFETs including interface fixed charges

SUMMARY On the basis of the exact solution of Poisson's equation and Pao–Sah double integral for long-channel bulk MOSFETs, a continuous and analytic drain current model for the undoped gate stack (GS) surrounding-gate (SRG) metal–oxide–semiconductor field-effect transistor (MOSFET) including positive or negative interface fixed charges near the drain junction is presented. Considering the effect of the interface fixed charges on the flat-band voltage and the electron mobility, the model, which is expressed with the surface and body center potentials evaluated at the source and drain ends, describes the drain current from linear region to saturation region through a single continuous expression. It is found that the surface and body center potentials are increased/decreased in the case of positive/negative interface fixed charges, respectively, and the positive/negative interface fixed charges can decrease/increase the drain current. The model agrees well with the 3D numerical simulations and can be efficiently used to explore the effects of interface fixed charges on the drain current of the gate stack surrounding-gate MOSFETs of the charge-trapped memory device. Copyright © 2013 John Wiley & Sons, Ltd.

Quantum mechanical effects on the threshold voltage of surrounding-gate MOSFETs

In this work, we investigate analytically quantum mechanical (QM) effects on the threshold voltage (VTH) shift of the surrounding-gate (SG) metal-oxide-semiconductor field-effect transistors (MOSFETs). We show how VTH is influenced by QM effects with the considerations of (110)-silicon (Si) orientation and (100)-Si orientation. Both doped and undoped models are presented. The analytical results of the undoped model are compared with those obtained by Yu et al., and good agreement is observed. We show how VTH is influenced with the doping level. When the radius of an SG MOSFET is small (<5nm), the VTH shift will be significant, and one should be careful in the use of the device with an extremely small silicon body radius. We find that at very high doping levels (>1018cm−3), the VTH shift will be large.

A New Two-Dimensional Analytical Threshold Voltage Model for Short-Channel Triple-Material Surrounding-Gate Metal–Oxide–Semiconductor Field-Effect Transistors

A new analytical model for the surface potential and threshold voltage of triple-material surrounding-gate (TM-SGT) metal–oxide–semiconductor field-effect transistors (MOSFETs) is proposed to investigate short-channel effects (SCEs). The TM-SGT MOSFET forms a two-step potential in the channel and effectively reduces the SCEs and the variation of threshold voltage compared with those of dual-material surrounding-gate (DM-SGT) and triple-material double-gate (TM-DG) MOSFETs. TM-SGT MOSFETs thus have better performance than DM-SGT and TM-DG MOSFETs.

A New Two-Dimensional Analytical Threshold Voltage Model for Short-Channel Triple-Material Surrounding-Gate Metal–Oxide–Semiconductor Field-Effect Transistors

A new analytical model for the surface potential and threshold voltage of triple-material surrounding-gate (TM-SGT) metal–oxide–semiconductor field-effect transistors (MOSFETs) is proposed to investigate short-channel effects (SCEs). The TM-SGT MOSFET forms a two-step potential in the channel and effectively reduces the SCEs and the variation of threshold voltage compared with those of dual-material surrounding-gate (DM-SGT) and triple-material double-gate (TM-DG) MOSFETs. TM-SGT MOSFETs thus have better performance than DM-SGT and TM-DG MOSFETs.

Analytical model including the fringing-induced barrier lowering effect for a dual-material surrounding-gate MOSFET with a high-κ gate dielectric

By solving Poisson's equation in both semiconductor and gate insulator regions in the cylindrical coordinates, an analytical model for a dual-material surrounding-gate (DMSG) metal—oxide semiconductor field-effect transistor (MOSFET) with a high-κ gate dielectric has been developed. Using the derived model, the influences of fringing-induced barrier lowering (FIBL) on surface potential, subthreshold current, DIBL, and subthreshold swing are investigated. It is found that for the same equivalent oxide thickness, the gate insulator with high-κ dielectric degrades the short-channel performance of the DMSG MOSFET. The accuracy of the analytical model is verified by the good agreement of its results with that obtained from the ISE three-dimensional numerical device simulator.

A new analytical subthreshold model of SRG MOSFET with analogue performance investigation

For the first time, a pseudo-two-dimensional (2D) approach is extended from a rectangular device structure to a cylindrical one. A pseudo-2D model applying Gauss's law in the cylindrical channel depletion region for undoped or lightly doped surrounding gate (SRG) silicon metal oxide semiconductor field effect transistor (MOSFETs) working in subthreshold regime is presented. From this pseudo-2D analysis, electrostatic potentials, current characteristics, the threshold voltage roll-off, the drain-induced barrier lowering and the subthreshold swing are explicitly modelled. The obtained analytical model has been extended to develop a model for transconductance-to-drain current ratio (g m/I d) in weak inversion regime. Analogue figures of merit of SRG MOSFETs are studied, including transconductance efficiency g m/I d, intrinsic gain and output resistance. The trends related to their variations along the downscaling of dimension are provided. In order to validate our model, the modelled expressions are compared with the simulated characteristics obtained from ATLAS device simulator.

1/f noise and analogue performance study of short-channel cylindrical surrounding gate MOSFET using a new subthreshold analytical pseudo-two-dimensional model

An analytical pseudo-two-dimensional (2-D) model for the transconductance generation factor (gm/Id) of cylindrical surrounding gate (SRG) metal-oxide-semiconductor field effect transistor (MOSFET) is presented. The model has been developed by applying Gauss&apos;s law in the cylindrical channel depletion region for undoped or lightly doped silicon SRG MOSFET working in the subthreshold regime. In order to validate the model, the modelled expressions are compared with the simulated characteristics obtained from the numerical device simulator. A systematic investigation of analogue performance figures of merit are reported for different dimensions of SRG MOSFET. The obtained gm/Id model has been implemented in modelling the 1/f low-frequency noise (LFN). The variation of 1/f LFN is obtained and investigated for different device parameters.

Implicit Continuous Current–Voltage Model for Surrounding-Gate Metal–Oxide–Semiconductor Field-Effect Transistors Including Interface Traps

An analytic and continuous direct-current model for cylindrical doped surrounding-gate metal-oxide-semiconductor field-effect transistors (SGMOSFETs) including interface-trap charges is presented. Based on the SGMOSFET model, which is valid from undoped to heavily doped channels, a general model for long-channel SGMOSFETs including interface-trap charges is derived. A comparison between the numerical simulations and analytic calculations showed that the proposed model is valid for all operating regions of SGMOSFETs including different interface-trap charges with several dimensions and doping densities.

Analytical Model for Subthreshold Swing and Threshold Voltage of Surrounding Gate Metal–Oxide–Semiconductor Field-Effect Transistors

Analytical Model for Subthreshold Swing and Threshold Voltage of Surrounding Gate Metal–Oxide–Semiconductor Field-Effect Transistors

Analytical Model for Subthreshold Swing and Threshold Voltage of Surrounding Gate Metal–Oxide–Semiconductor Field-Effect Transistors

We investigate analytically the metal–oxide–semiconductor field-effect transistor (MOSFET) with a surrounding gate (SG). We develop and present an analytical model for subthreshold swing and threshold voltage. Poisson's equation is solved analytically. The analytical expressions for electrical potential, drain current in the subthreshold region, subthreshold swing, and threshold voltage are obtained. The analytical results are compared with simulated results, and the two agree very well. The subthreshold swing of an SG MOSFET can be improved either by reducing the silicon body radius or by reducing the oxide thickness. The threshold voltage decreases with reductions in the channel length, the silicon body radius, or the oxide thickness. Based on the threshold voltage model, drain induced barrier lowering (DIBL) effect is explored, and we find that DIBL effect is more severe for a device with a larger silicon body radius, and/or with a shorter channel length.