Surface Technology Systems Research Articles

Characterisation of C–F Polymer Film Formation on the Air‐Bearing Surface Etched Sidewall of Fluorine‐Based Plasma Interacting with AL2O3–TiC Substrate

C–F polymer redeposition is generated on the etched sidewall of the patterned air‐bearing surface (ABS). This C–F polymer is a by‐product from fluorine‐based plasma using a Surface Technology Systems multiplex‐pro air‐bearing etch (ABE). The morphology of the re‐deposition and the composite element was observed by a scanning electron microscope (SEM). The chemical bonding results were characterised via X‐ray photoelectron spectroscopy, attenuated total reflected infrared spectroscopy and visible Raman spectroscopy. The purpose of this work is to demonstrate a modification of AlF3 re‐deposition to C–F polymer re‐deposition, which is easily stripped out by an isopropyl alcohol‐based solution. The benefit of this research is the removal of the re‐deposition in the resist strip process without additional cleaning process steps.

Application of ICP Deep Trenches Etching in the Fabrication of FBAR Devices

It is presented a fabrication processing of a two step method in deep silicon etching for MEMS applications using an the UK company Surface Technology Systems plc (STS), inductively-coupled plasma (ICP) etch technique STS ICP deep dry etching system. A brief introduction of schematic process of etching deep trenches on silicon substrate is first given, then with two step method for etching deep trenches. The film bulk acoustic resonator (FBAR) devices have been fabricated using STS ICP deep dry etching system with maximum etch rate of 4.6μ m/min, depth more than 450μm and sidewall roughness no more than 0.14μm. At the end of the second step process, the etch selective ratio of silicon to silicon oxygen is enhanced to ensure the device yield. At the same time, the negative effects such as microloads effects, footing effects, lag effects and micrograss effects are suppressed effectively.

Demonstration of Modification from AlF<sub>3</sub> Re-Deposition to Polymer Re-Deposition on Air Bearing Surface (ABS) Etched Sidewall of Fluorine-Based Plasma Etch on Al<sub>2</sub>O<sub>3</sub>-TiC Substrate

In this work, C-F polymer rich re-deposition are generated on the etched side wall of the patterned Air Bearing Surface (ABS). This C-F rich polymer is a by product from using a Surface Technology Systems Multiplex-Pro Air Bearing Etch (ABE) tool that utilizes fluorine base plasma. The morphology of the re-deposition and elemental composition are investigated via scanning electron microscope. The chemical bonding information is characterized via attenuated total reflected infrared spectroscopy. The purpose of this work is to demonstrate the modification of AlF3 re-deposition to polymer rich re-deposition allows complete re-deposition removal with isopropyl alcohol base solution. This offers advantage as the re-deposition removal is incorporated during the resist strip process offering superior cleanliness of slider head without additional process steps.

Sidewall roughness characterization and comparison between silicon and SU-8 microcomponents

Surface characterization of microcomponents provides key information to help understand and predict the performance of microdevices. For example, in a microgear transmission, the surface roughness has a strong effect on the friction, running life and power consumption. In a static fluid microdevice, the liquid distribution is influenced by the surface tension and capillary force, which are primarily determined by the surface roughness. In a flowing microchannel case, surface roughness results in unsteady secondary flows. In this paper, a study is presented to characterize the surface roughness of silicon and SU-8 microcomponents. The silicon components studied are fabricated using an ICP plasma etching system manufactured by Surface Technology Systems. The sidewall roughness of the component is measured using atomic force microscopy. Repeated measurements have been conducted at different sidewall depths of the microstructure. The AFM images of the measurements are present. The measurement results show that the sidewall is smoother at the lower level than that at the upper level in a Si microstructure, and the average roughness R a obtained throughout the depth is 151.11 nm. The UltraThick SU-8 Process (UTSP) provides another way to fabricate microstructures as thick as 1 mm with a very vertical sidewall. The roughness contour of the sidewall shows that the surface topography is similar throughout the depth. The average roughness R a is 46.46 nm. Other surface parameters, such as R q, R p − p , R pk and R sk, are also obtained and analysed. The implication of the smooth surface roughness of SU-8 structures to their applications is discussed in terms of transmission efficiency, the changes in friction to flowing liquid in a microchannel and the changes in the surface tension and capillary effect.

Novel die-sinking micro-electro discharge machining process using microelectromechanical systems technology

A novel die-sinking micro-electro discharge machining (EDM) process is presented for volume fabrication of metallic microcomponents. In the process, a high-precision silicon electrode is fabricated using deep reactive ion etching (DRIE) process of microelectromechanical systems (MEMS) technology and then coated with a thin layer of copper to increase the conductivity. The metalized Si electrode is used in the EDM process to manufacture metallic microcomponents by imprinting the electrode onto a flat metallic surface. The two main advantages of this process are that it enables the fabrication of metallic microdevices and reduces manufacturing cost and time. The development of the new EDM process is described. A silicon component was produced using the Surface Technology Systems plasma etcher and the DRIE process. Such components can be manufactured with a precision in nanometres. The minimum feature of the component is 50 μm. In the experiments, the Si component was coated with copper and then used as the electrode on an EDM machine of 1 μm resolution. In the manufacturing process, 130 V and 0.2 A currents were used for a period of 5 min. The SEM images of the resulting device show clear etched areas, and the electric discharge wave chart indicates a good fabrication condition. The experimental results have been analysed and the new micro-EDM process is found to be able to fabricate 25 μm features.

30 nm Tungsten gates etched by a low damage ICP etching for the fabrication of compound semiconductor transistors

This paper investigates high resolution, low damage dry etching of tungsten, a suitable candidate for gate metallization in compound semiconductor based high mobility channel device, by using a Surface Technology Systems Ltd. (STS) inductively coupled plasma (ICP) etching system with SF 6 and C 4F 8 process gases. Low stress tungsten films with thicknesses in the range 100–200 nm were deposited on GaAs substrates for the etching tests using a Plassys MP900S sputter coater. To evaluate the plasma-induced damage in the ICP etching process, GaAs based high electron mobility transistor (HEMT) type layer structures with channels buried less than 20 nm from the surface, were grown by molecular beam epitaxy (MBE). Subsequently, Van der Pauw (VdP) structures were fabricated to enable determination of the impact of the etching on room temperature sheet resistivity, carrier concentration and electron mobility. The investigation of the effect of various etching parameters on the profile, minimum feature size and electrical damage has led to a low damage ICP etching process with minimum feature size of 25 nm, which is suitable for the fabrication of compound semiconductor based high mobility channel devices.

Development of the one-step DRIE dry process for unconstrained fabrication of released MEMS devices

Current technologies allow the manufacture of released devices using deep reactive ion etching (DRIE) and SOI wafers, provided the device movement is not required to be more than a few microns (1–10 µm) Here, we describe the ‘waffle technique’, which will allow large areas surrounding a device to be cleared, therefore opening up opportunities for the design of devices with large movement capabilities (limited by the device's own actuation) or large volume reservoirs for micro fluidic applications. It should be noted that all DRIE etching in this work was carried out using a Surface Technology Systems DRIE which uses a process developed from the Bosch process (R B Bosch Gmbh 1994 US Patent Specification 4855017 and German Patent Specification 4241045CI) termed ‘time multiplexed deep etching’ (TMDE).

Silicon micromachining using a high-density plasma source

Dry etching of Si is critical in satisfying the demands of themicromachining industry. The micro-electro-mechanical systems (MEMS) communityrequires etches capable of high aspect ratios, vertical profiles, good featuresize control and etch uniformity along with high throughput to satisfyproduction requirements. Surface technology systems' (STS's) high-densityinductively coupled plasma (ICP) etch tool enables a wide range ofapplications to be realized whilst optimizing the above parameters.Components manufactured from Si using an STS ICP include accelerometers andgyroscopes for military, automotive and domestic applications. STS's advancedsilicon etch (ASETM) has also allowed the first generation ofMEMS-based optical switches and attenuators to reach the marketplace. Inaddition, a specialized application for fabricating the next generationphotolithography exposure masks has been optimized for 200 mm diameter wafers,to depths of ~750 µm.Where the profile is not critical, etch rates of greater than8 µm min-1 have been realized to replace previous methods such as wetetching. This is also the case for printer applications. Specializedapplications that require etching down to pyrex or oxide often result in theloss of feature size control at the interface; this is an industry wideproblem. STS have developed a technique to address this.The rapid progression of the industry has led to development of the STS ICP etch tool,as well as the process.

Variation of etch profile and surface properties during patterning of silicon substrates

Patterned silicon substrates form the basis for various microfluidic and micromechanical devices. Recent developments in microfluidic and micromechanical systems for biomedical applications demand complex three-dimensional structure profiles and a well-defined surface quality of the etched patterns. The object of our investigations was to realize complex contours with different sidewall angles in silicon. The technology includes the combination of several etching steps of different character, possibly in combination with suitable coatings or oxidation. The investigations into plasma etching of silicon substrates were carried out using an Advanced Silicon Etch System from Surface Technology Systems Ltd. (STS), UK. Our experiments were based on three different silicon-etching processes: the Advanced Silicon Etch process (ASE™) introduced by STS; continuous anisotropic silicon etching; and silicon etching in pure SF 6. Variation in the ratio of etching to passivation causes drastic changes in the etch rate, tilt angle and quality of the etched silicon surfaces. Positive and negative edge profiles with tilt angles between 60 and 100° were realized by variation of the surface passivation and the intensity of etching. The roughness of the etched silicon surface can be varied by process modifications, within limits. A well-defined surface topology can be realized using different procedures and complex three-dimensional patterns can be created in silicon substrates. The main steps of the technology were the anisotropic patterning of silicon with the aid of sidewall passivation, deposition of an additional passivating layer, and subsequent isotropic silicon etching.

Study of deep silicon etching for micro-gyroscope fabrication

Deep silicon etching technique can offer many advantages in microelectromechanical system (MEMS) fabrication because of its high etch rate, high aspect ratio and high anisotropic etching behavior comparing with the conventional reactive ion etching technique. In this study, the deep reactive ion etcher produced by Surface Technology Systems Limited (STS, UK) has been used to fabricate the micro-gyroscope. The effects of feature size of the structure, platen power and process pressure on etch rate and reactive ion etching lag have been studied. Micro-gyroscope has been fabricated by using the optimum etching conditions.

High Etch Rate Gallium Nitride Processing Using an Inductively Coupled Plasma Source

The ongoing development of III-nitride laser diode and light emitting diode fabrication has been made possible by dry etching techniques. Conventional wet etching of these materials has proved difficult and while Reactive Ion Etch (RIE) plasma systems can be used as an alternative, the Inductively Coupled Plasma (ICP) offers an enhanced dry etch route. In this paper, high etch rate (>1.25 μm/min) gallium nitride (GaN) processing is reported using the Surface Technology Systems (STS) ICP system. This is the fastest etch rate published for an ICP system. The etched material exhibits smooth anisotropic profiles and is free from residues. The effect of plasma parameters such as power, pressure and flow of reactive and inert process gases are presented. The use of both chlorine (Cl2) and boron trichloride (BCl3) as reactive etch gases is also studied.

Deep plasma silicon etch for microfluidic applications

Various microfluidic devices like micro pumps, micro dispensers, micro pipettes, etc. are produced by the GeSiM mbH Großerkmannsdorf. Fabrication of such microsystems includes the realization of three-dimensional silicon substrates. Plasma-based silicon etch processes are key technologies for exact patterning the substrates from both surfaces.Typically, etch depths of 10 to 500 μm, aspect ratios >25 and the application of conventional mask systems are required. Etch rates between 2 and 6 μm/min, a uniformity (3σ) below 5%, an excellent anisotropy and a selectivity of >50:1 for photoresists and >150:1 for SiO2 can be realized using an etch system produced by Surface Technology Systems Limited (STS), UK and the ASE™ process based on fluorine etch chemistry. This technique overcomes the disadvantages of conventional wet silicon etch processes, like the influence of crystal orientation on etch rate.Our intention was to investigate the influence of gas flow rates, process gas pressure, supplied power and time sequence on etch rate and edge profile. The results should be used to vary process parameters according to the requirements of application.