GaAs Wafer Surface Research Articles

Control of sidegating effects in AlGaAs/GaAs heterostructure field-effect transistors by modification of GaAs wafer surfaces

Sidegating characteristics of AlGaAs/GaAs heterostructure field-effect transistors, fabricated on molecular-beam epitaxially grown layers, were investigated with emphasis on the material properties. A systematic analyses of the epitaxial layers concluded with the identification of the substrate–superlattice-buffer-layer interface as the predominant cause of the sidegating effect. Remnant carbon contamination on the GaAs surface was found to produce a p-type, conducting interfacial region. Controlled oxidation of the carbon on the wafers was accomplished using ultraviolet radiation. This oxide was desorbed in situ before epitaxial growth. Secondary-ion-mass spectroscopy was employed to estimate the carbon concentration at the substrate–epitaxial-layer interface for standard cleaned and ultraviolet-ozone-treated wafers. The carbon concentration of the interfacial region decreased by two orders of magnitude for the wafers exposed to the ultraviolet radiation. Hall-effect measurements of standard cleaned and ultraviolet-ozone-treated heterostructure wafers, prepared with various buffer layer thicknesses, demonstrated the dominant influence of the interfacial p-type region on the electronic properties of the material. A comparison of sidegating characteristics for devices fabricated on the two types of wafers is presented and discussed. A dramatic improvement in sidegating was observed for the wafers subjected to the ultraviolet-ozone cleaning procedure.

Positronium from a gallium arsenide wafer surface

In a positron beam study, positronium emission from a GaAs wafer surface has been observed. A convolution analysis of the 511 keV annihilation peak revealed a Doppler shifted p-Ps component from which the Ps work function was estimated to be -0.8±0.1 eV.

Ohmic contacts in GaAs

Ohmic contacts of n-type GaAs can be reproducibly made to exhibit specific contact resistivities less than 1 × 10 −6 Ω - cm −2. To do this requires an understanding of the physics involved, a knowledge of the history of previous treatment of the GaAs wafer surface, and processing techniques which are compatible with precisely controlled donor impurity site location determination. The present paper correlates the electrical effects observed in several significant recent developments with theory and interface chemistry to provide workers in the field with a physical understanding of what is essential for reproducible, effective, and reliable ohmic contacts.

Suppression of thermal conversion in Cr-doped semi-insulating GaAs

Thermal conversion in the vicinity of the surface of a Cr-doped semi-insulating GaAs wafer to n-type conductivity was effectively suppressed by annealing the wafer under arsenic vapor pressure. For the ion implantation of Si into qualified wafers, the arsine-controlled capless-anneal method provided a uniform and reproducible carrier concentration profile which was in good agreement with that predicted by the LSS theory. The doping efficiency of 100% was attained without anomaly due to thermal conversion.

Compensation from implantation in GaAs

Non-dopant ions have been implanted at low doses ([inverted lazy s] 1010 cm−2) into GaAs to determine the extent of carrier removal and to pin-point annealing stages for carrier recovery. A removal rate of around 200 carriers per ion is found for such lighter ions as B+, N+, and F+. At the 1-MeV energy used, compensating damage extends along the ion track right from the GaAs wafer surface. Partial recovery of the carriers as well as mobility occurs at the well-known 225 °C electron damage annealing stage. A further annealing stage is found at [inverted lazy s] 525 °C.