Superior Harmonic Performance Research Articles

Sideband Harmonic Suppression Analysis Based on Vector Diagrams for CHB Inverters Under Unbalanced Operation

Unexpected sideband harmonics of the cascaded H-bridge (CHB) inverters will appear in unbalanced conditions among cells and may result in harmonic pollution and even harmonic resonance. The linear controller to suppress the output voltage distortion is destined to be ineffective due to the non-linear characteristic of sideband harmonics. Focus on this problem, this article proposes a closed-loop harmonic suppression method by adjusting the phase-shift angles for the <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">N</i> -cells CHB inverter. The harmonics suppression mechanism is revealed from a vector synthesis point of view. No complicated trigonometric function calculations and optimization algorithms are required. This method can achieve the suppression of the harmonic distortion around any multiplicative switching frequency. Phase-shift angles are adjusted continuously in real-time. The superior harmonic performance achieved by the proposed method is verified by the simulation and experiment results.

VSC control strategy for HVDC compensating harmonic components

This paper proposes a voltage source converter (VSC) control strategy for the high voltage direct current (HVDC) transmission systems compensating the harmonic components. For VSC-HVDC AC system accounted for a relatively large share of the 5th, 7th, 11th, 13th and other low harmonics. A selective harmonic current control strategy based on vector proportional integral (VPI) regulator in dq coordinate system is proposed on the basis of PI control. In which, PI is used to control the DC component of the current error, while VPI is used to suppress the multiplicative fluctuations of the current error. Unlike the proportional-integral resonant (PIR) regulator, the VPI contains a second-order numerator that achieves the ideal 0° phase delay of the closed-loop transfer function of the control system at the set resonant frequency point, so its control accuracy for harmonic currents is better than that of the PIR. A two-terminal VSC-HVDC system is built using Simulink software, and current compensation simulations are performed for three control methods: conventional PI, PIR and PI parallel VPI schemes. The superior harmonic suppression performance of VPI is verified by comparing the harmonic content.

A simplified dual-stage model predictive controller for modular multilevel converters

The Modular Multi-Level Converter (MMC) topology is suitable for use in medium and high voltage applications. To cater to the multi-objective control requirements of the MMC, several Model-Predictive Control techniques have been developed. However, most of the available MPCs do not sufficiently address the simplification of the apparently complex switching logic of the MMC in regard to its practical implementation. To fill this gap, a modulated dual stage MPC is proposed here that controls the ac output current using a few simple steps, while maintaining sufficient control over the circulating current. The two MPC controller stages are used in a cascaded manner. The first stage calculates the voltage reference for grid current control and the second stage MPC selects the appropriate switching state to ensure circulating current control. The proposed technique uses carrier-based PD-PWM to retain its superior harmonic performance and ensures 2N+1 output pole voltage levels. While avoiding use of any cost function, a generalized fixed step approach is also presented that is independent of N value. The dual stage MPC presented in this paper is executed once in every switching time period to maintain a fixed switching frequency operation. Simulation and experimental studies show satisfactory performance of 25-level and 7-level MMC respectively, in a grid connected mode. Transient case study is also shown to demonstrate fast dynamic performance of the proposed controller.

X-Type Five-Level Current Source Inverter

Current source inverters (CSIs) feature superior features such as low dv/dt, reliable short circuit protection, etc. Among the CSI-based topologies, the 5-level CSIs are attracting attention in multiple applications thanks to their superior harmonic performance. However, existing 5-level CSI topologies suffer a couple of issues, for example, the current imbalance issue which requires complicated balancing controls. In this paper, an X-type 5-level CSI is proposed. It features an inherent current balancing due to the process of charging the inductors in series. In addition, the proposed inverter has less switch count than the existing ones. An SVM-based modulation is proposed for the inverter. Detailed analysis and calculations regarding inverter gain, passive components, transient voltage analysis, and efficiency are provided. The performance of the converter is verified by both simulation and lab-scaled experiments.

An Efficacious Modulation Gambit Using Fewer Switches in a Multilevel Inverter

Since multicarrier based modulation techniques are simple to implement and can be used to control inverters at any level, they are frequently employed in modern multilevel inverters in high or medium power applications. When considering the many multi-carrier modulation techniques available, level-shifted pulse-width modulation (LSPWM) is often chosen for its superior harmonic performance. However, this traditional LSPWM method is not suitable for controlling newly proposed reduced switch count (RSC) MLI topologies. The research work in this paper seeks to elucidate the reasons why conventional LSPWM is ineffective in controlling RSC MLI topologies, and proposes a generalized LSPWM system based on logical expressions. The proposed method can be utilized with symmetrical and asymmetrical RSC MLIs, and can be extended to an arbitrary number of levels. The merit of the proposed method for controlling any RSC configuration with satisfactory line-voltage THD (≈1.8%) performance (identical to conventional LSPWM) was evaluated using multiple 13-level asymmetrical RSC-MLI topologies. A MATLAB model was developed and then subjected to simulation and real-world testing to prove the effectiveness of the proposed modulation strategy.

A Novel Switched Capacitor Precharging Method for Three-Phase Induction Motor Drive Applications Utilizing the Winding Inductance

Three-phase (3-φ) induction motor drives operated with switched capacitor (SC) inverter circuits offer superior harmonic performance and voltage boosting. The SC network, however, generally requires additional circuitry to precharge the capacitor(s) to prevent inrush current. To obviate the requirement of the extra circuit, an innovative SC precharging scheme is presented, which utilizes the winding inductance of the motor. The inverter circuit is so operated that the motor winding inductance first stores electrical energy from the input dc source and then releases it to the SC. These two actions are continued till the SC is precharged to a voltage equal to the magnitude of the input dc source. The circuit operation during the precharging is similar to the operation of a conventional buck-boost type dc–dc converter. The precharging action is so designed that the voltage of the SC cannot increase further. Therefore, the proposed scheme does not need any voltage sensor. The operation of the circuit during precharging is analyzed extensively to develop a mathematical background for the given method. It is shown that by manipulating the switching frequency during the precharging the precharging time can be controlled as per the user requirements. Various claims are validated using computer simulations and experiments. All the results are presented.

Generalized Model Predictive Pulse Pattern Control Based on Small-Signal Modeling—Part 2: Implementation and Analysis

A newly proposed model predictive pulse pattern controller, which is applicable to higher-order converter systems, is implemented on a low-cost field-programmable gate array. It is shown that how the computations of the underlying quadratic program of the control algorithm can be reduce, thus enabling a resource-efficient implementation. The implemented control algorithm is evaluated via hardware-in-the-loop simulations. The results show that the proposed controller achieves a short settling time during transients and the superior harmonic performance of optimized pulse patterns during steady-state operation.

Novel Three-Phase H10 Inverter Topology With Zero or Constant Common-Mode Voltage for Three-Phase Induction Motor Drive Applications

A traditional two-level 3-φ voltage source inverter topology operated with remote state pulsewidth modulation (RSPWM) can achieve constant common-mode voltage (CMV) without using additional passive components. However, apart from the poor harmonic performance, this topology suffers from the drawbacks of reduced dc bus utilization, increased semiconductor requirement, and higher losses. To address these issues, this letter presents a new H10 inverter topology for two-level three-phase inverter applications. The proposed topology can achieve constant CMV or zero CMV without requiring additional passive components. Compared with the RSPWM approach, the proposed H10 topology has 50% higher dc bus utilization, superior harmonic performance, reduced semiconductor requirement, and lower losses. A comparison of the proposed topology with the existing two-level solutions for CMV reduction reveals that the proposed H10 has the lowest total switch voltage rating and phase current total harmonic distortion (THD), considering zero CMV performance. Various experimental results obtained from a laboratory prototype are presented to validate the theoretical claims.

Advanced hybrid SVPWM techniques for two level VSI

ABSTRACT This paper brings an advanced class of hybrid SVPWM techniques for medium voltage drive applications with two-level inverter which employs multiple division of active vector time (MDAVT) switching sequences to reduce total harmonic distortion (THD) and switching loss. The proposed hybrid SVPWM techniques are categorised based on the principle of bus-clamping strategies. Multiple division active vector time (MDAVT) switching sequences are used in the proposed strategies. The newly developed MDAVT switching strategies produce PWM waveform for all odd and even pulse number and maintain the symmetry of the voltage waveform. This work compares different MDAVT switching sequences based on modulation index and location of the clamping position (zero vector changing angle) of a phase in a line cycle. The proposed techniques lead to the reduction in weighted total harmonic distortion of line voltage (Vwthd) as well as switching loss. The results point to the superior order of performance of the developed MDAVT sequences in the various ranges of operation of modulation index and power factor values. The superior harmonic performance and switching loss characteristics of the MDAVT PWM techniques over the conventional SVPWM is experimentally verifiedona415 V, 2 hp induction motor drive.

Dynamic and Steady State Response Analysis of Selective Harmonic Elimination in High Power Inverters

Selective harmonic elimination (SHE) technique has drawn tremendous interests for its superior harmonic performance, especially in high power devices where switching power loss and passive filter size are the main concerns. However, the drawbacks of slow dynamic response and difficulties in hardware implementation limit its engineering application. Based on a 3-level inverter, this paper analyzes the dynamic response of SHE. A system model is established and an improved method of updating the switching angles at sampling frequency is proposed. And a combination of notch filters and low-pass filter is designed to achieve a higher system bandwidth. The dynamic response and stability of the system are analyzed in detail. In addition, the influence of control errors on steady-state performance during hardware implementation is also discussed. A simple hardware structure of a DSP with a small-scale FPGA is adopted to realize the above method. Both dynamic response and steady-state response of the improved system are analyzed and compared with the regular SHE modulation and the widely used sinusoidal pulse width modulation (SPWM). Simulation and experimental results provided that the improved method proposed in this paper retains the excellent steady-state characteristics of the regular SHE modulation, and at the same time achieves as good dynamic performance as SPWM.

Variable-Angle PS-PWM Technique for Multilevel Cascaded H-Bridge Converters With Large Number of Power Cells

Modular converters such as the multilevel cascaded H-bridge (CHB) are an attractive option for multiple applications mainly because of inherent modularity and fault-tolerant operation. This article is focused on the CHB converter operating with unbalanced conditions (different dc voltages and/or modulation indexes). Under these circumstances, applying the conventional control and modulation strategies, the output voltage harmonic spectrum is degraded. In this article, a generalized variable-angle phase-shifted pulsewidth modulation (PS-PWM) technique for CHB converters with a large number of power modules <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$(&gt;\!\!3)$</tex-math></inline-formula> is presented. The method considers all possible cells’ combinations to form groups and assigns the role of each cell in the group. This cell role defines the identifier of the cell in the variable-angle PS-PWM technique. In the steady state, in each group of cells, the harmonic distortion of the CHB output voltage located at twice the carrier frequency <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$f_c$</tex-math></inline-formula> is eliminated, while the distortion at <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$4f_c$</tex-math></inline-formula> is also diminished. Experimental results show how the proposed technique achieves superior harmonic performance without introducing any significant disadvantage.

Direct Torque Control Techniques of Three-Level H-Bridge Inverter Fed Induction Motor for Torque Ripple Reduction at Low Speed Operations

In this article, two constant switching frequency direct torque control (CSF-DTC) techniques are proposed for H-bridge three-level inverter (HB-TLI) fed induction motor (IM) for reducing torque ripple at low-speed operation. Both the methods use modulators and characteristics of the pulsewidth modulation (PWM) mainly determine the motor drive performance. The first method uses two level-shifted carriers signals, whereas the second method uses carrier signals with appropriate offset voltages. Detailed analytical expressions describing complete harmonic characteristics of HB-TLI are also presented using double Fourier integral approach. Superior harmonic performance is obtained with the proposed PWM methods compared to the existing ones. Drawback of one of the envisaged CSF-DTC techniques entering into overmodulation is rectified at higher motor speeds and a smooth slide-over using zero offset voltage to carrier signals is recommended to overcome the issue. The proposed CSF-DTC techniques are simulated and experimentally validated. The dynamic and steady-state torque performance obtained with the proposed CSF-DTC techniques for IM are compared with the existing DTC methods, which show a significant reduction in the steady-state torque and current ripple, whereas the torque dynamic performance is almost preserved thus, demonstrating its usefulness especially at lower motor speeds.

An Enhanced Static Compensator With DC-Link Voltage Shaping Method

This paper proposes a dc-link voltage shaping method for a cascaded H-bridge (CHB) static synchronous compensator (STATCOM). A recently proposed low capacitance-STATCOM system, which intentionally operates with large voltage ripples on the dc-link capacitors, offers the advantage of superior harmonic performance. However, the capacitor voltage ripples decrease when operating at below-rated reactive current, which removes the aforementioned harmonic performance benefit of this system. In addition, such harmonic performance benefit is only achieved in capacitive operation mode. In order to expand the operating region where advantageous voltage ripples are present, a new voltage shaping method is proposed. The proposed method uses a CHB multilevel converter coupled with simple dc–dc converters to shape voltage ripples on the dc-link capacitor regardless of its operating point. This is achieved by controlling the average current of the dc–dc converter using model predictive control. The concept is best applied to an enhanced STATCOM, or E-STATCOM, application in which the STATCOM is integrated with either a renewable energy source or energy storage system. The operational principle of the proposed approach is validated via simulation and experimental results on a five-level single-phase CHB STATCOM.

Model Predictive Pulse Pattern Control for Modular Multilevel Converters

For dc–ac modular multilevel converters (MMCs) in double-star configuration, this paper proposes a fast closed-loop control method based on optimized pulse patterns (OPPs). Thanks to the direct manipulation of the OPP switching instants, OPPs with discontinuous switching angles can be used, and the intrinsic cell capacitor voltage ripple is compensated for to preserve the OPPs’ superior harmonic performance. This model predictive pulse pattern controller is combined with a fast acting dead-beat circulating current controller and linked to an upper layer voltage balancing control scheme. The proposed control and modulation method is particularly suitable for medium voltage MMCs with a low number of cells. Despite operation at very low switching frequencies close to and including the fundamental frequency, a superior harmonic performance can be achieved.

Phase-Shifted Carrier Pulse-Width Modulation Algorithm With Improved Dynamic Performance for Modular Multilevel Converters

High modularity, easy scalability, and superior harmonic performance, comprising the topology with the most potential for medium- to high-voltage high-power applications, are representative features of a modular multilevel converter (MMC). Each application of a MMC requires a proper scheme such that it conforms to control objectives such as correct submodule capacitor voltage balancing control and the suppression of circulating current. Over the past few years, various studies have been presented that meet the MMC requirements through both classical control-based pulse-width modulation and model predictive control, although some drawbacks exist for both control concepts. The dynamic performance of the classical control methods with proportional-integral or proportional-resonant controllers is unsatisfactory, and the requirement of proportional-integral parameters tuning procedure makes converter operation performance depends on proportional-integral parameters adjustment. Meanwhile, model predictive control performance depends significantly on the mathematical model of a system, and weighting factor selection is tedious. In this paper, we propose an improved phase-shifted carrier pulse-width modulation method and capacitor voltage balancing control that inherits the merits from both classical control and model predictive control. Meanwhile, the proposed control method eliminates the requirement of the tedious proportional-integral parameters tuning procedure and improves the dynamic performance compared with the conventional phase-shifted carrier pulse-width modulation-based proportional-integral controller method. Simulations and experiments were conducted to demonstrate the proposed method's properness.

Simplified Indirect Model Predictive Control Method for a Modular Multilevel Converter

Demand for modular multilevel converters (MMCs) has been steadily increasing for utilization in medium- to high-power applications because of qualities such as high modularity, easy scalability, and superior harmonic performance. Furthermore, there has been a growing trend toward utilizing model predictive control for MMCs due to its simplicity, good dynamic response, and ease of multi-objective control. However, the rise in computational load leads to a great drawback when increasing the number of submodules (SMs). This paper presents an approach to reducing the computational load and using on-state SMs and circulating currents, by preselecting the number of SMs inserted in the upper and lower arms. This approach is based on using the number of on-state SMs and the circulating current, to compute the number of SMs inserted in the upper and lower arms, which is evaluated in the next sampling instant. This facilitates a significant reduction in the number of control options and the computational load. A sorting algorithm is used to retain the balancing capacitor voltages in each SM, while the cost function guarantees the regulation of the ac-side currents, arm voltages, and MMC circulating currents. Simulation and experiment results validate the performance of the proposed approach.

Fault tolerant control of multiphase multilevel motor drives - technical review

The multiphase multilevel motor drives are a promising solution for some high-power and high-reliability applications, since they have multiple power conversion routes, a large amount of redundant voltage vectors, higher equivalent switching frequencies and superior harmonic performance. It has great significance to exploit their remedial control strategies in depth to fully utilize their high fault tolerant capabilities. This paper will present an updated technical review of fault tolerant control schemes for multiphase multilevel motor drives. Based on exemplification of the diode neutral-pointclamping three-level (DNPC-3L) inverters and T-type NPC three-level (TNPC-3L) inverters fed asymmetric six-phase PMSM drives, the study is taken for both phase-leg faults and switch faults. Furthermore, the discussion on multiple-switch faults, short-circuit switch faults and switch and leg hybrid faulty conditions are discussed in this paper.

Switching Frequency Analysis of Staircase-Modulated Modular Multilevel Converters and Equivalent PWM Techniques

The large number of voltage levels in a modular multilevel converter (MMC) make staircase modulation a feasible alternative, particularly in high-power applications. However, staircase waveforms do not necessarily mean operation of the MMC submodules (SMs) at the fundamental frequency. This paper presents an analysis of SM switching frequencies in staircase-modulated MMCs and their correlation to the modulation index and load phase angle. A carrier-based pulsewidth-modulation (CB-PWM) equivalent technique is also developed. This analysis demonstrates that CB-PWM techniques provide a similar switching frequency with superior harmonic performance and improved voltage balancing characteristics at all modulation indices compared to staircase modulation. The theoretical analysis is verified with extensive simulation results for MMCs with different SMs and experimental results from a laboratory prototype.

Heuristic Model Predictive Modulation for High-Power Cascaded Multi-Level Converters

Phase-shifted carrier modulation is an industry standard in its application to multilevel H-bridge converters. The major advantage of this scheme over level-shifted and space vector modulation schemes is its inherent ability to evenly distribute losses between semiconductor devices. However, phase-shifted schemes suffer from harmonic degradation when operated at the low carrier frequencies required in high-power high-level number applications. This paper develops a model predictive modulation (MPM) scheme that achieves superior harmonic performance, compared to phase-shifted modulation, while ensuring equal semiconductor loss distribution. With respect to complete-enumeration-based predictive techniques, the proposed modulation significantly reduces the number of times the system cost function is evaluated. Reducing the number of calculations by several orders of magnitude ensures computational feasibility. Simulation and experimental results are presented, which confirm correct operation of the modulation strategy.

Improved Selective Harmonics Elimination Scheme With Online Harmonic Compensation for High-Power PWM Converters

To reduce the low-order harmonics produced by the high-power pulsewidth-modulated (PWM) converters, selective harmonic elimination (SHE) scheme is commonly used due to its superior harmonic performance at low switching frequency. However, as an off-line modulation technique, the SHE scheme itself lacks the capability to realize the active compensation of the grid background harmonics. To enable the active compensation ability of the SHE-modulated PWM converters, this paper proposes an active compensation method through the jittering of SHE phase angle. The proposed method can realize the real-time compensation of the preexisting system background harmonics in high-power PWM converters' system. An application example on a high-power PWM current-source rectifier (CSR) system is provided in this paper. Experimental results show that the proposed method can effectively attenuate the line current harmonics caused by the grid background harmonics in the high-power PWM CSR systems.