Dynamic and Steady State Response Analysis of Selective Harmonic Elimination in High Power Inverters

Jingling Cheng,Tingting Xu,Dongdong Chen,Guozhu Chen

doi:10.1109/access.2021.3082770

Abstract

Selective harmonic elimination (SHE) technique has drawn tremendous interests for its superior harmonic performance, especially in high power devices where switching power loss and passive filter size are the main concerns. However, the drawbacks of slow dynamic response and difficulties in hardware implementation limit its engineering application. Based on a 3-level inverter, this paper analyzes the dynamic response of SHE. A system model is established and an improved method of updating the switching angles at sampling frequency is proposed. And a combination of notch filters and low-pass filter is designed to achieve a higher system bandwidth. The dynamic response and stability of the system are analyzed in detail. In addition, the influence of control errors on steady-state performance during hardware implementation is also discussed. A simple hardware structure of a DSP with a small-scale FPGA is adopted to realize the above method. Both dynamic response and steady-state response of the improved system are analyzed and compared with the regular SHE modulation and the widely used sinusoidal pulse width modulation (SPWM). Simulation and experimental results provided that the improved method proposed in this paper retains the excellent steady-state characteristics of the regular SHE modulation, and at the same time achieves as good dynamic performance as SPWM.

Highlights

With the development of the high-power semiconductors, the capacity of a single power electronic device has increased to the level of several megawatts [1]
This paper focuses on the impact of modulation methods on dynamic response, hense, a single voltage control loop is employed and the cross-decoupling terms are omitted
HARDWARE IMPLEMENTATION AND EXPERIMENTAL RESULTS In other researches, the implementation of Selective harmonic elimination (SHE) is generally achieved by a microcontroller unit (MCU) and a field programmable gate array (FPGA), where MCU is responsible for sampling and control procedures, and FPGA is responsible for SHE modulation [10], [42]

Summary

INTRODUCTION

With the development of the high-power semiconductors, the capacity of a single power electronic device has increased to the level of several megawatts [1]. Most of the research focuses on the following aspects, a) solution range extending, b) formulations in multilevel situations, c) optimization or mitigation based techniques, d) methods that facilitate online implementation, e) power balance or DC link voltage equalization [12]–[15] These studies have greatly broadened the application areas of SHE, from variable frequency motor drives, high-power current source rectifiers to multi-level grid-connected voltage source inverters [16]. It is still generally believed that SHE has two main drawbacks which prevent it from being more widely used, namely slow dynamic response and high memory consumption [17] The former is because SHE is an optimization algorithm based on the fundamental period and needs to maintain the symmetry of its waveform throughout the fundamental period. The MPC controller is to achieve a fast dynamic response in transient state while the SHE controller ensures high harmonic performance and slow switching frequency in steady state.

PRINCIPLES OF SHE

HARDWARE IMPLEMENTATION AND EXPERIMENTAL RESULTS

Findings

CONCLUSION