This paper studies the causes and distribution of reconstruction errors in subtractive dither structure and provides solution to minimize these errors. We present the generation of reconstruction errors in two types of quantization, namely mid-riser and mid-tread, with their corresponding distributions. We then construct a 12-bit pipeline analog to digital converters (ADC) simulation model and use a 16-bit digital to analog converter (DAC) to convert the dither sequence into analog signals. We perform statistical analysis on the resulting data, verify the accuracy of the distribution, and find that reconstruction error only occurs when the dither signal accuracy surpasses that of the ADC. Additionally, we find that mid-tread quantization has the lowest probability of reconstruction error. Finally, we analyze the impact of reconstruction error on the signal to noise ratio (SNR) and spurious free dynamic range (SFDR) at various input frequencies. Our findings show that the reconstruction errors' effect on the SFDR and SNR of the input signal is less than 1 dB.