Abstract
Digital-to-time converters (DTCs) are a promising technology for radio frequency (RF) transceivers but are prone to spur generation. A common approach to change the spurious emissions to a spur-free shape is a method called dithering. The power added due to dithering is an important aspect of this approach and gives raise to investigations on additive dither as well as methods for subtractive dithering. This work presents a mathematical model for dithering DTC-based local oscillator (LO) generators. It proposes concepts for the application of subtractive dither and it introduces a novel generalization of quantization-dither to allow for optimal dithering of nonlinear quantizers.
Highlights
T HE ever-increasing demand for higher data rates is met by mobile communication standards with more complex data transmission for each generation
The results show that the resolution and linearity are major requirements for a Digital-to-time converters (DTCs) with respect to spurs
Any realization of a DTC by a circuit, DTCreal, is expected to introduce nonidealities, which can be described in terms of the Integral Non-Linearity (INL), Differential Non-Linearity (DNL), gain and dynamic errors
Summary
T HE ever-increasing demand for higher data rates is met by mobile communication standards with more complex data transmission for each generation. Several works describe the construction of circuits capable of doing so, and their spectral effects [3]–[6] These systems are using a digital input that describes a phase offset or time delay relative to a reference signal. If the DTC is used to generate an LO signal, this option is not available and different ideas of subtractive dither need to be investigated. The results are used to explain the known method for dithering quantization spurs, and general requirements are derived, leading to new investigations on dithering DTCs. First, a discussion on the application of subtractive dither is placed in Section IV which considers the requirements of RF transceivers to establish different methods of implementation.
Sign-in/Register to view highlights & summary Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callMore From: IEEE Transactions on Circuits and Systems I: Regular Papers
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
