Transistor Structures Research Articles

Systematic investigation of charge transport and thermoelectric properties in semicrystalline polymers: electrochemical doping effects on doping level and temperature dependence using one sample

Abstract We developed a system to measure the temperature dependence of the Seebeck coefficient (S) and electrical conductivity of conducting polymers with controlled doping levels, using an electrolyte-gated transistor structure, all based on a single sample. In the semicrystalline polymer poly[2,5-bis(3-alkylthiophen-2-yl)thieno[3,2-b]thiophene], S shows clear temperature dependence, attributed to hopping-like transport in the low-doped state. In contrast, metal-like behavior dominates in the highly-doped state. However, in the low-temperature region of the highly-doped state, an unusual temperature dependence of S likely arises from the coexistence of localized and delocalized transport processes. This is further confirmed by magnetoconductance measurements down to 80 mK.

Sputter epitaxy of ScAlN films on GaN high electron mobility transistor structures

Sputter epitaxy of ScAlN films on GaN high electron mobility transistor structures

Effect of substrate-induced compressive strain on protonation of SrCoO2.5 epitaxial films

Abstract Electrochemical protonation, which can be realized in an electric-field-effect transistor with a gate layer consisting of a proton-conducting electrolyte Nafion membrane, offers a simple way of electrically tuning the physical properties of materials. In this study, we grew (010)-oriented epitaxial films of brownmillerite-structured SrCoO2.5 on various substrates whose lattice mismatch against SCO ranged from 0% to −2.9% by pulsed laser deposition and investigated the effect of substrate-induced strain on their protonation in field effect transistor structures with gate layers consisting of Nafion membranes. We found that the H concentration of the SCO films that were fully compressive-strained by up to 1.3% was ∼1.7 and that it was almost independent of the magnitude of the substrate-induced strain. We also found that the H content of the strain-partially-relaxed film with a residual compressive strain of 1.3% was lower, ∼1.3. These results indicate that lattice deformations arising from substrate-induced strain have insignificant effects on protonation, while lattice defects and dislocations introduced upon strain relaxation, which hinders proton diffusion in the films’ lattices, dominantly affect protonation in SrCoO2.5 films.

Epitaxial growth of transition metal nitrides by reactive sputtering

Implementing transition metal nitride (TM-nitride) layers by epitaxy into group-III nitride semiconductor layer structures may solve substantial persisting problems for electronic and optoelectronic device configurations and subsequently enable new device classes in the favorable nitride semiconductor family. As a prominent example, the integration of the group-III-transition metal nitride AlScN enabled an improved performance of GaN based transistor structures due to stronger polarization fields as has been recently demonstrated. For other transition metal nitrides (TMNs) and their alloys with group-III nitrides a range of other interesting properties is expected to enable novel devices and applications. We investigated the compatibility of TM-nitride layers with the growth of GaN-based structures on silicon substrates. As we show TiN layers are compatible and particularly suited as highly conducting, metallic-like buffer layer enabling true vertical conduction without elaborate backside processing. Also, we demonstrate epitaxial growth of alloys based on ScN and AlN as well as of HfN layers on Si(111) substrates by reactive sputtering using high purity gases and targets. Particularly, we analyzed the crystal structure and the quality of Sc-rich AlxSc1-xN. For HfN layers, we find a unique impact on the growth polarity of MOVPE-grown GaN layers on Si(111) which changes to N-polar growth. This represents a simple and technologically scalable approach for N-polar GaN-based layers on Si substrates.

Design Strategies for BCAT Structures: Enhancing DRAM Reliability and Mitigating Row Hammer Effect

This study investigates the impact of four parameters—gate angles, fin height controlled through gate overlaps and the distance from fin to source/drain, and substrate bottom doping concentration—on the row hammer effect (RHE) in DRAM cells. The influence of adjacent and passing gates on the DRAM cell body potential was identified as a key factor in D0 and D1 failures. The tolerance for D1 and D0 failures was analyzed, defined as the threshold number of pulses required to induce a 0.6 V change in the storage node voltage (from 1.2 V to 0.6 V for a D1 failure or from 0 V to 0.6 V for a D0 failure). D1 (D0) failure tolerances with the slope from the top of the top gate (θangle) of 3°, the height of the TiN gate covering the fin (Hfin_overlap) of 12.5 nm, and the height of the fin (Hfin) of 12.5 nm are 1.26 × 106 (4.8 × 106), 1.14 × 106 (4 × 107), and 7.5 × 105 (4.8 × 105), respectively. Higher θangles and smaller fin heights generally result in higher RHE tolerances. Although decreasing the fin height reduced the RHE, it also decreased the on-current and resulted in an increase in the threshold voltage (VT) and the subthreshold swing (SS). In addition, by increasing the substrate bottom doping concentration (Pdop_bot), we improve RHE tolerance twice its original level without reducing the on-current. Therefore, designing a buried channel array transistor (BCAT) structure requires careful consideration of these trade-offs, and a thorough understanding of the underlying mechanism is crucial to devising strategies that reduce RHE tolerance. The findings of this study are expected to contribute significantly to the development of next-generation DRAM architectures, enhancing stability and performance. By addressing the reliability challenges posed by advanced scaling, this study paves the way for the ongoing advancement of DRAM technology for high-density and high-performance applications.

Spectroscopic Ellipsometry and Correlated Studies of AlGaN-GaN HEMTs Prepared by MOCVD

A series of AlGaN/GaN high-electron-mobility transistor (HEMT) structures, with an AlN thin buffer, GaN thick layer and Al0.25Ga0.75N layer (13–104 nm thick), is prepared by metal–organic chemical vapor deposition and investigated via multiple techniques. Spectroscopic ellipsometry (SE) and temperature-dependent measurements and penetrative analyses have achieved significant understanding of these HEMT structures. Bandgaps of AlGaN and GaN are acquired via SE-deduced relationships of refraction index n and extinguish coefficient k vs. wavelength λ in a simple but straightforward way. The optical constants of n and k, and the energy gap Eg of AlGaN layers, are found slightly altered with the variation in AlGaN layer thickness. The Urbach energy EU at the AlGaN and GaN layers are deduced. High-resolution X-ray diffraction and calculations determined the extremely low screw dislocation density of 1.6 × 108 cm−2. The top AlGaN layer exhibits a tensile stress influenced by the under beneath GaN and its crystalline quality is improved with the increase in thickness. Comparative photoluminescence (PL) experiments using 266 nm and 325 nm two excitations reveal and confirm the 2DEG within the AlGaN-GaN HEMT structures. DUV (266 nm) excitation Raman scattering and calculations acquired carrier concentrations in compatible AlGaN and GaN layers.

Design Solutions for Device Structures of Bipolar Transistors with an Insulated Gate and a Vertical Channel Arrangement

Design Solutions for Device Structures of Bipolar Transistors with an Insulated Gate and a Vertical Channel Arrangement

Control of Integrated Circuits Crystals' Surface Microrelief and Defects of Heteroand Submicrostructures by the Atomic Force Microscopy Method

The aim of the work was to study the structure and defects of a channel transistor with two types of conductivity (p and n), the submicrostructures based on nickel silicide films, and the seed layers based on AlN using atomic force microscopy (including conductive or electric force method, which allow one to study the electrical conductivity of the material surface). The influence of the manufacturing technology and local oxide formation on the relief and structure of the pand n-type transistor was established. The local oxide is necessary for the electrical isolation of the transistors from each other. The surface roughness is higher on the surface and outside the p-channel transistor than on the n-channel transistor. When examining the AlN layers both in the topography mode and in the adhesion mode, defects in the form of pores were revealed, which are places of electrical breakdowns, which worsens the properties of the such heterostructures. With an increase in the temperature and time of nitriding, the defects of the AlN layers significantly decrease. The conductive areas on the surface of the nickel silicides after rapid thermal treatment at 300 and 400 °C using electric force microscopy were detected, which shows incomplete formation of nickel silicide during the treatment. Thus, the efficiency of the atomic force microscopy method using a specialized conductive technique as a method for monitoring microelectronic components was demonstrated.

Mechanism of Optical and Electrical H2S Gas Sensing of Pristine and Surface Functionalized ZnO Nanowires.

In this work, the sensing ability and the underlying reaction pathways of H2S adsorption on two nanomaterial systems, pristine zinc oxide (ZnO) nanowires (NWs) and gold functionalized zinc oxide nanowires (Au@ZnO NWs), were explored in a side-by-side comparison of optical and electrical gas sensing. The properties of optical sensing were analyzed by photoluminescence intensity-over-time measurements (PL-t) of as-grown ZnO NW samples, and the electrical gas-sensing properties were analyzed by current-over-time measurements (I-t) of ZnO NW chemically sensitive field-effect transistor (ChemFET) structures with a gas-sensitive open gate. The ZnO NWs were grown by high-temperature chemical vapor deposition (CVD) and thereafter surface-functionalized with a thin Au nanoparticle layer by magnetron sputtering. Detailed X-ray photoelectron spectroscopy (XPS) analysis, alongside an experimental estimation of activation energies (E A) involved in the H2S sensing process, and the application of a simple analytical test allowed us to propose a complete picture of the sensing mechanism on the pristine ZnO surface and the Au@ZnO surface. The combined results hint at H2S dissociation via surface interaction and irreversible adsorption dynamics for both material systems occurring already at room temperature. Our findings specifically emphasize the impact of Au functionalization morphology on sensor sensitivity and the beneficial importance of chemical affinity between Au and H2S for superior H2S sensing results, aiming at enhanced response and selectivity for potential medical H2S detection in human breath.

A 43.5dB Gain Unipolar a-IGZO TFT Amplifier with Parallel Bootstrap Capacitor for Bio-signals Sensing Applications.

In this paper, a high gain amplifier with phase compensation loop is presented. A structure of parallel gate cross-coupled transistors to both ends of differential pair drain and source is designed to improves the load impedance, which obtains sufficient gain and further reduces power consumption. A novel capacitor bootstrap load circuit is proposed. The capacitor bootstrap topology is constructed by the drain source resistance of the transistor working in the cut-off region, where the gate source parasitic capacitor of the transistor is in parallel with the bootstrap capacitor rather than the existing series structure, thereby only a small bootstrap capacitor is required. By avoiding the use of large capacitors, chip area can be effectively reduced without compromising performance such as gain and bandwidth. The amplifier is fabricated using 10-μm n-type a-IGZO TFT technology. Measurement results show that the proposed amplifier achieves a voltage gain of 43.5dB and a common mode rejection ratio of 61.2dB while maintaining low power consumption. The amplifier also exhibits a -3dB bandwidth covering 0.4~2.1KHz, encompassing major bioelectric frequency bands. A real-time ECG signal was successfully captured using the fabricated TFT amplifier and gel electrodes. It has great potential in flexible sensing and acquisition applications such as electro cardiogram (ECG), electro encephalogram (EEG), pulse detection, and other wearable applications.

Research On Structural Design and Performance Optimization of Diamond Transistors

With the increasing demand for transistors that work in high-power, high-frequency, and high-voltage environments, diamond transistors are set to become an indispensable part of future transistor development. This article reviews the development history of hydrogen-terminated diamond transistors and silicon-terminated diamond transistors. Specifically, this article summarizes the invention of hydrogen-terminated and silicon-terminated diamond transistors, along with recent structural innovations and data analysis. From the recent findings on hydrogen-terminal diamond transistors, this paper finds that the structure of hydrogen-terminated diamond transistors is already mature. However, silicon-terminated diamond transistors are still in the development stage, and scientists are still looking for a new structure to make the output of silicon-terminated diamond transistors more stable and improve the efficiency of silicon-terminated diamond transistors. Last but not least, diamonds are also used to build FinFETs. Although there are few studies on this type of diamond transistor, significant progress has still been made in the development of diamond transistors.

Ultrafast carrier dynamics in InGaN quantum well channel based high electron mobility transistor structure

Ultrafast carrier dynamics in InGaN quantum well channel based high electron mobility transistor structure

Large Tunability of 2D Density in Atomically-Thin in2O3 By Mild Fluorine-Based Plasma

ALD-based atomically-thin In2O3 has gained a lot of attention due to its high mobility, wafer-scale growth and low temperature deposition compatible with back-end-of-line process. However, the excessively high carrier concentration of In2O3 limits its applicability in future electronic device. To address this problem, fluorine-based plasma treatment, which has been successfully used to modulate the carrier concentration in various material systems such as 2D and CNT, was performed on 4 nm ALD-based In2O3 transistor (as shown in Figure 1a). Importantly, the plasma is remote type and the treatment is performed at low temperature to avoid damage to the atomically-thin In2O3 transistor. After fluorine-based plasma treatment, the 2D density (n2D) of 4 nm In2O3 transistor significantly decreases from 2.8 × 1013 cm-2 to 4.1 ×1010 cm-2 corresponding to a ΔV T equals to 70 V (as shown in Figure 1b). It was demonstrated that the n2D can be precisely reduced by controlling the treatment time and plasma power. The XPS analysis indicates that the reduction of n2D of In2O3 is due to the passivation of oxygen vacancies by fluorine atom and the capture of electrons by absorbed fluorine atoms, which possess a higher electronegativity than oxygen. Owing to the precise tunability of threshold voltage (V T), we successfully realized the depletion-load NMOS inverter. This result indicates that fluorine-based plasma treatment and ALD-based atomically-thin In2O3 has significant potential for the future BEOL electronic applications. Figure 1. a) Schematic representation of the structure of a In2O3 bottom-gate transistor and the fluorine-based plasma treatment process. b) The transfer characteristics of In2O3 transistors before and after fluorine-based plasma treatment. Figure 1

(Invited) Low Contact Resistance on Buried Interfaces in Oxide Thin-Film Transistors by Selective-Area Reduction Using Hydrogenation Catalyst Electrode

As the focus on amorphous oxide semiconductor (AOS) in memory applications deepens, there is a push for higher packing densities and more efficient read-write efficiencies, leading to increasingly complex AOS transistor structures with dimensions scaled down to the nanometer size. In pursuit of high density for AOS-based dynamic random-access memory (DRAM), 3D-stacked vertical IGZO transistor devices have been employed, wherein the contact interfaces of these vertical devices are buried and located internally within the device, and these vertical or buried interfaces are prone to causing contact issues. However, conventional methods to addressing contact resistance in thin-film transistors (TFTs) used for flat-panel displays are not applicable to buried interfaces. The development of novel methods to resolve this issue is a current challenge for the future development of complex structured AOS memory devices.In this work, the contact resistance of a-IGZO TFT was reduced by three orders of magnitude by utilizing hydrogenation catalyst electrodes for a selective area reduction reaction at the interface and constructing a hydrogen transfer pathway1. The key to effective hydrogenation on the internally buried interface is the selection of the optimal catalyst metal electrode and passivation materials that satisfy the following requirements. 1) High hydrogen diffusion rate and moderate hydrogen solubility for reversible hydrogen transfer. 2) Catalytic hydrogen dissociation to highly active H0 atoms on/in the metal electrode for low-temperature reaction [Fig. 1(a)]. 3) Dense oxide passivation layer with hydrogen tolerant electronic structure to hydrogen, in which a shallower CBM than the charge transition level of E(H+/H−), to isolate the effective channel from hydrogen. Pd was selected as the best electrode for this strategy owing to its flexible lattice and unique properties of hydrogen permeability without brittleness to hydrogen. Also, amorphous Zn–Si–O (ZSO x ), which can be easily deposited by sputtering, was used as the passivation layer.Detection through hard X-ray photoelectron spectroscopy indicates that the high reactivity of H0 reduces metal oxides at the interface, forming a metallic interface layer. Fig. 1(b) shows the hydrogen annealing condition dependence of the contact resistance and effective channel length deviation estimated by TLM measurements. By optimizing hydrogen annealing conditions, the company succeeded in achieving both a small effective channel length deviation of ~40 nm and contact resistance that was reduced by approximately three orders of magnitude. The field-effect mobility was enhanced from 3.2 to ~20 cm2 V–1 s–1 as a consequent effect of the improved contact resistance. Furthermore, as shown in Fig. 1(c), the prepared a-IGZO TFTs also demonstrated excellent bias-stability, further proving the reliability of using catalytic electrodes and hydrogen tolerant passivation layer in the process.

Параметричні автогенераторні перетворювачі для вимірювання товщини матеріалів на основі конденсаторних чутливих елементів

The article examines the main characteristics of parametric autogenerator thickness measurement transducers with a frequency output signal. The design of the proposed autogenerator transducers is based on transistor structures with negative differential resistance. Capacitors with round and rectangular covers are used as parametric transducers for measuring the thickness of materials, which are passive elements of autogenerator transducers, which greatly simplifies the design of devices for measuring the thickness of materials. Mathematical models of autogenerator transducers were developed based on the principle of converting the energy of a constant electric field into the energy of an alternating electric field, which made it possible to obtain the conversion and sensitivity functions of autogenerator transducers without using a rather complicated method of obtaining Kirchhoff equations from nonlinear equivalent circuits of parametric transducers. It is shown that the main contribution to the change in the conversion functions and the sensitivity equation is made by the change in the thickness of the measured material, which causes a change in the equivalent capacitance and negative differential resistance in the oscillating system of autogenerators, which changes the output frequency of the autogenerator transducers. The sensitivity of thickness measurement transducers varies from 5.31 kHz/μm to 7.5 kHz/μm in the thickness range from 0 to 500 μm. Autogenerator transducers for thickness measurement with frequency output do not require analog-digital transducers and amplifiers for further processing of informative signals, which significantly reduces the cost of information-measuring equipment, and when working at ultra-high frequencies, it is possible to transmit information over considerable distances.

Enhanced Performance of Dual Material Double Gate Negative Capacitance Tunnel Field Effect Transistor (DMDG‐NC‐TFET) via HZO Ferroelectric Integration for Improved Drain Current and Subthreshold Swing

ABSTRACTThis paper developed the novel structure of a dual material double gate negative capacitance tunnel field effect transistor (DMDG‐NC‐TFET) using HZO ferroelectric material. This study systematically improved the drain current and subthreshold swing (SS) by inducing a negative capacitance effect in a gate stack. The proposed gate oxide structure is a stack configuration of ferroelectric material, and high‐k dielectric to improve gate control. The Landau–Khalatnikov (LK) equation is used to solve the Poisson equation and get an accurate estimate of the channel potential. Kane's model is used for band‐to‐band generation rate calculation. For modelling the drain current, the band‐to‐band tunnelling (Gbtbt) generation rate is integrated using the entire device volume. The impact of varying ferroelectric thickness in the proposed structure has been investigated with the simulated results. The outcomes demonstrate that the device can obtain better improvements in ON current and SS, compared to conventional DMDG‐TFET. By contrasting the analytical results with the outcomes of the TCAD simulation, the effectiveness of the proposed methodology has been demonstrated.

Study of A Heterojunction Double Gate Ferroelectric p-n-i-n Tunnel FET combining analytical modeling and TCAD simulation

Study of A Heterojunction Double Gate Ferroelectric p-n-i-n Tunnel FET combining analytical modeling and TCAD simulation

The structure and formation of non-volatile memory cells of Superflash

Split-gate embedded Flash memory technology has been around for decades and has become the standard for a wide range of devices, such as microcontrollers and smart cards. Among the, due to a number of advantages, Silicon Storage Technology Super Flash non-volatile memory technology has become the most widespread. This article presents the results of a study of the memory cells structure, examines in detail the principle of their operation and the main technological stages of the production process of forming transistor structures.

Circuit Modeling of the Impact of Heavy Charged Particles on Transient Processes in Bipolar Analog Microcircuits

One of the factors causing the failure of spacecraft integrated circuits is exposure to heavy charged particles. The entry of heavy charged particles into electronic devices leads to the appearance of single event transients (short current pulses), which in analog microcircuits manifest themselves in distortion of the output signal shape, and in digital microcircuits can cause a single event upset. The article discusses a technique for circuit mode-ling of the effect of heavy charged particles on bipolar analog microcircuits, including the developed equivalent electrical circuit of a bipolar transistor for LTSpice and the procedure for modeling transient processes. Despite the simplifications adopted, namely: failure to take into account the dependence of the duration of the rise and fall of the current pulse generated by a charged particle on the parameters of the transistor structure, the assumption that the entire charge is generated in the active base and the space charge regions of the emitter and collector junctions, an equivalent circuit has been developed made it possible to determine that the shape of the collector current pulse for circuit with a common emitter when exposed to a heavy charged particle is determined by the speed of the transistor and its operating mode. Using the developed methodology, the “critical” transistors of the two studied analog microcircuits were determined, and the need to bypass the current-setting resistors with a small capacitor was justified.

Performance Analysis of JL-FinFET with Varied Non-Uniform Doping Concentrations, Fin Height and Fin Width using Device Simulator

With the growth of the MOSFET technology, the size of the transistor becomes smaller which can lead to Short-Channel Effects (SCEs). In order to address the SCEs, multi-gate transistor such as Fin Field-Effect Transistor (FinFET) has been invented. Meanwhile, it is found that the conventional transistor with junctions also has its drawbacks and limitations due to the decrease in the gate length. The SCEs can occur and affect the overall performance of the device with lower switching times and lower current density . In order to address these limitations, new structure of transistor without junction known as a junctionless (JL) transistor has been proposed. In this work, the impact of uniform versus non-uniform doping concentrations, fin height (Hfin) and fin width (Wfin) in JL-FinFET were investigated by using Technology Computer Aided Design (TCAD) Tools. It was found that non-uniform doping concentration of 4 x1018 cm-3 for the source/drain and of 4 x1017 cm-3 for the channel, together with Hfin of 20 nm and Wfin of 4 nm provide the best electrical performance of Ioff = 6.45 x10-17 A, Ion = 6.14 x10-6 A, Ion/Ioff = 9.52 x1010 and DIBL = 11 mV/V. The outcome of this research work can be used as a basis to understand JL-FinFET biosensors for medical applications and more complex JL structures.