Stitch Bond Research Articles

Insulated Cu wire free air ball characterization

Insulated Cu wire technology has immense potential for fine pitch wire bonding interconnection. Understanding the behavior of the insulated Cu free air ball (FAB) formation is crucial for wire bonding process. The FAB formation, size, shape and cleanliness under different conditions for 20μm insulated Cu wire were investigated using SEM, FESEM and FTIR surface analysis. The results were compared with that of bare Cu wire. Consistently spherical residue free FAB of insulated Cu wire were formed using forming gas. The samples with insulated Cu wire consistently produced larger FAB than that of bare Cu wire, indicating that the energy required for free air ball formation is lower. Basic bonding performances in terms of ball bond strength, intermetallic (IMC) coverage growth and stitch bond strength of insulated Cu wire at time zero are also discussed in the paper.

Moisture absorption and mechanical degradation studies of polyurethane foam cored E-glass-reinforced vinyl-ester sandwich composites

The present paper explores the experimental observations and result of hygrothermic aging of polyurethane foam cored E-glass reinforced vinyl-ester sandwich composites for a long duration of time under salt fog exposure. Four types of sandwich specimens were used for the study. Polyurethane foam cored E-glass mat (woven roving, chopped strand mat, chopped strand stitched mat and stitch bond mat) type reinforcement in vinyl-ester sandwich composites were prepared by manual hand layup method using compression technique. The prepared specimens were tested for moisture up-take behavior and the resulting property degradation in terms of flexural strength, flatwise and edgewise compression strength. The mechanical properties under the salt fog exposure with 95% RH using artificial sea water fogging were monitored for 180 days. The specimens showed reduced strength in terms of core shear and facing bending strength, edgewise and flatwise compressive strength. Scanning electron micrograph of the fracture specimens show face sheet/core debonding.

Stitch Bond Process of Pd-Coated Cu Wire: Experimental and Numerical Studies of Process Parameters and Materials

Cost reduction is the main driver in the recent transition to Cu wire bonding from predominate Au wire bonding. Other cost reduction in packaging comes from new developments in substrates and lead frames, for example, Pre-Plated Frames (PPF) and uPPF for QFP and QFN reduce the plating and material cost. However, 2nd bonds (stitch bonds) can be more challenging on some of the new leadframe types due to the rough surface finish and thin plating thickness. Pd-coated Cu (PCC) wire has been recently introduced to improve the wire bonding process with bare Cu wire, mainly to improve reliability and enhance the stitch bond process. More fundamental studies are required to understand the influences of bonding parameters and bonding tools to improve stitch bondability. The stitch bond process of 0.7 mil diameter PCC wire on Au/Ni/Pd-plated quad flat-no lead (QFN) PPF substrate is investigated in this study. Two capillaries with the same geometry but different surface finishes are used to investigate the effect of capillary surface finish on the stitch bond process. The two capillary types are a polished finish type which is commonly used for Au wire bonding, and a granular finish capillary that has a much rougher surface finish. Process window between no stick on lead (NSOL) and short tail is compared. The effect of process parameters including bond force and table scrub amplitude is studied. The process window test results revealed that the granular capillary has larger process window and a lower chance of short tail occurrence. It has been shown that a higher scrub amplitude increases the chance of successful stitch bond formation. To further compare the capillary surface finishes, 3 sets of parameter settings with different bond force and scrub amplitude are tested. For all three parameter sets tested, the granular capillary showed better quality in bond strength. The granular capillary resulted in higher stitch pull strength compared to the polished type. A finite element model (FEM) of the process was developed to better understand the experimental observations. The amount of surface expansion (plastic deformation) of the wire at the wire and substrate interface was extracted from the model and attributed to the degree of adhesion (bonding). The model was used to confirm the experimental observation of adhesion (bonding) with different surface finish.

Golden bump for 20 micron diameter wire bond enhancement at reduced process temperature

With the rapid development of advanced microelectronic packaging technologies, research on fine-pitch wire bonding with improved reliability is driven by demands for smaller form factors and higher performance. In this study, thermosonic wire bonding process with a 20 μm wire for fine-pitch interconnection is described. To strengthen stitch bonds made in a gold–silver bonding system when the bonding temperature is as low as 150 °C, ball bumps (security bump) are placed on top of the stitch bonds. The ball–stitch bond and bump forming parameters are optimized using a design of experiment (DOE) method. A comparison of pull test results for stitch bonds with and without security bumps shows a substantial increase of the stitch pull force (PF) due to the use of security bonds. By varying the relative position of the security bumps to the stitch bonds via wedge shift offset (WSO), a WSO window ranging from 15 to 27 μm results in stitch PF higher than 7 gf, which is equivalent to an increase in average stitch PF of 118%.

Wire Bonding UPH and Stitch Bond Improvement using 20 Micron Diameter Insulated Wire with Security Bump

In this study, security bumps are used for strengthening the stitch bonds of two 20 micron diameter insulated Au wire bonding example processes. Bump bonding as a variant of the ball bonding process has been commonly used in the microelectronic industry to make bumps on dies that will later be flip-chip bonded. The optimized stitch bond parameters combined with the security bumps placed upon the stitch bonds substantially improve the second bond strength demonstrated on the two example processes on two different types of wire bonding equipment. A comparison of pull test results shows that security bumps increase stitch pull force up to 100%. The effect of varying the relative position (shift) of the security bump relative to the stitch bond location is investigated for one process. The window with the highest pull force improvement is ranging from 16 to 31 micron shift towards the ball bond. Looping with insulated wire is faster than with bare wire because of less effort to mitigate the risks of wires touching each other and producing a short. If two wire loops touch each other e.g. after molding, the wire insulation prevents shorts. Therefore, the looping requirements of the example processes with security bumps can be relaxed by reducing the number of kinks (reverses) from four to two. Due to the reduced looping complexity, the overall UPH increased with insulated wire by about 3.0 % and 4.9 % for the two processes, respectively. This increase is in spite of the time required for the additional security bumps, and compared to bare wire processes without security bumps but with more complex looping.

Improved Bond reliability through the use of Auxiliary Wires (Security Bumps and Stand-Off Stitch)

Whether the need is due to poorly bondable materials, non-flat bonding surfaces, odd packaging situations, or just the need for high reliability; the integrity of a wire bond interconnect can usually be greatly improved through the proper use of Auxiliary Wires. Auxiliary Wires are defined as Security Wires, Security Bumps, or Stand-Off Stitch (aka Stitch on Bump). The old stand-by Security Wire has been an asset for several decades, however, this is being replaced by Security Bumps which require a smaller second bond termination area. Further, Stand-Off Stitch (SOS) has many more applications and also has many side benefits that could be incorporated into a circuit design for better wire strength properties, fewer interconnects (die to die bonding), and lower loops. Stand-Off Stitch bonding involves the placement of a ball bump at one end of the wire interconnect, then placing a wire with another ball at the other end of the interconnect and stitching off the wire on the previous placed ball bump. This results in a near homogeneous stitch bond interconnect to the bump with an inherent improvement in stitch bond pull strength. Another use for SOS is Reverse Bonding (Stitch bond on bump on die bond pad) often resulting in a lower loop profile than standard forward wire loop and the loop is stronger because the wire hasn't been work annealed above the ball (in the Heat Affected Zone). A major impediment to the implementation of SOS is the retraining of visual inspectors and the approval of quality departments.

Two capillary solutions for ultra-fine-pitch wire bonding and insulated wire bonding

In this article, the new challenges and requirements in wire bonding are discussed, the problems in ultra-fine-pitch wire bonding and insulated wire bonding are analyzed, and then two capillary solutions to the problems are presented. Actual bonding experiments using the new capillaries were carried out and the results were satisfactory. Compared to the standard design, a new capillary design has a larger inner chamfer, a larger chamfer diameter and a smaller chamfer angle. This new capillary design has proved to improve the ball bondability and smaller ball size control for ultra-fine pitch wire bonding. A unique surface characteristic on the capillary tip surface has also been derived. The new finishing process developed creates a new surface morphology, which has relatively deep lines with no fixed directions. Compared to the standard capillary, this capillary has less slipping between the wire and the capillary tip surface in contact, and provides better coupling effect between them and better ultrasonic energy transfer. This capillary has been used to effectively improve the bondability of the stitch bonds for insulated wire bonding.

Fundamentals of thermo-sonic copper wire bonding in microelectronics packaging

Fine copper wire bonding is capable of making reliable electrical interconnections in microelectronic packages. Copper wires of 0.8–6 mil diameter have been successfully bonded to different bond pad metallized and plated substrate materials such as Al, Cu, Ag, Au and Pd. The three metallurgical related factors; solid-solubility and diffusion of dissimilar contact metals, oxide film breakage and plastic deformation of asperities play a critical role in the bonding. Plastic deformation of an asperity is the most significant factor one has to consider to attain good bonding. Soft aluminum metal (30–40 VHN), with a lower % asperity threshold deformation is easier to wire bond than harder metallic surfaces (Ni, W, Mo, Cr, Co, Ta) of 150–500 VHN. Good adhesion of wire bonding is achieved for the surface roughness (Ra) of 0.01–0.15 μm and 0.02–0.6 μm of bare and plated surfaces respectively. It is rationalized that the application of ultrasonic energy principally breaks the oxide film and deform the asperities, while a compressive force increases the proximity of asperities. Hence wire welds to bond pad surface by molecular attraction and inter diffusion. Storage of copper ball bonds at 175 °C for 100–1,000 h forms copper aluminide at the interface. EDAX and Auger analysis reveal 22 at% Al + 78 at% Cu composition of the aluminides and Cu3Al2 empirical formula is calculated, which, does not match with any of the reported copper aluminides. Hardness of the copper ball bonds and stitch bonds are higher than wire exhibiting work hardening of the bonds on processing.

A new bonding-tool solution to improve stitch bondability

A new bonding-tool solution is proposed to improve stitch bondability by creating a new surface morphology on the tip surface of a wire-bonding tool (capillary). The surface has relatively deep lines with no fixed directions. This new capillary has less slipping between the wire and the capillary tip surface and provides better coupling effect between them. Experiments of wire bonding on unstable lead frames/substrates, alloyed wire (2N gold wire) bonding, and copper wire bonding were carried out to confirm the effect of the new capillary on the stitch bondability. The experimental results are promising and have proved that the use of the new capillary could improve the bondability of the stitch bond and minimize the occurrence of short tail defects and non-sticking on lead during bonding.

Acid Decapsulation of Epoxy Molded IC Packages With Copper Wire Bonds

Epoxy molded IC packages with copper wire bonds are decapsulated using mixtures of concentrated sulfuric acid (20%) and fuming nitric acid in an automatic decapping unit and, observed with minimal corrosion of copper wires (0.8-6 mil sizes) and bond interfaces. To attain maximum cross-linking of the molded epoxies, the post mold cured packages (175 degC for 4 h) were further, aged at high temperature of 150 degC for 1000 h. These packages are decapsulated using mixtures of higher ratio of concentrated sulfuric acid (40%) along with fuming nitric acid. The shear strength of copper wire bonds with 1 mil (25 mum) diameter of the decapsulated unit is higher than 5.5 gf/mil2. The present study shows copper stitch bonds to Au, Cu, Pd, and Sn alloy plated surfaces are less affected on decapping, with a few grams of breaking load on stitch pull test, while stitch bonds on silver plated surfaces reveal lifting of wire bonds on decapping

An Evaluation of Gold and Copper Wire Bonds on Shear and Pull Testing

In microelectronic packaging technology wire bonding is a common interconnect technique. The quality and reliability of wire bonds are generally evaluated by ball shear and stitch pull testing. From the load versus time and load versus tool tip displacement plots of the shear test, three regions can be observed. Region I primarily exhibits elastic-plastic deformation occur, while crack nucleate in region II which propagates in region III which finally ends in a catastrophic failure. Fractographs reveal in the case of gold ball bonds shows fracture occurs in Al bond pad metallization close to Au-Al intermetallics. In Cu ball bonds of 1, 2, and 4ml wire sizes also Al bond pad metallization cracks but penetrate deeper into the pad which indirectly shows that the bonding layer is stronger than that of gold ball bonds. Optical microscopic observation of the sheared copper bond surfaces reveal sticking of Al which provides qualitative information of the area of the bond between the ball bond and the bond pad. In thermally aged gold ball bonds, the gold above the intermetallic layer fractures. The energy required to fracture a gold or copper ball bond of 1ml wire size is around 370J∕m2, while an aged gold ball bond consumes about 520J∕m2. Void nucleation and coalescence mechanism of ductile fracture takes place in the ball and stitch bonds, however, silicon particles may be the preferential void nucleation sites in bond pad aluminum metallization failures. To understand the second bond strength, a stitch pull test was conducted and the results showed the neck of the stitched wire cracks thus leaving behind a tail bond on the lead finger.

POTENTIOSTATIC TESTING OF THIN SILICON NITRIDE FILMS

Abstract Micron-thick silicon nitride can be plasma-deposited as a conformal coating over complex geometries in microelectronic assemblies. The resulting films are dense and chemically inert, providing an effective diffusion barrier against chemical attack as long as the films remain mechanically intact. Potentiostatic methods have been developed to evaluate the effectiveness of these films over 3-dimensional microelectronic structures. Coated test structures were made the anode in NaCl solution and the resulting anodic dissolution of underlying metal was found to be a sensitive indicator of cracks or pinholes in these films and is similar to the corrosion reactions that pose reliability problems in field usage. This method was used to rank the film's ability to protect flat metalized silicon, stitch bonds, and Al bondwires from chemical attack. The same electrochemical method was used in conjunction with a four-point bending method to detect the onset of microcracking during measurements of the film's ne...

Potentiostatic testing of plasma-deposited silicon nitride thin protective films for bonds, bondwires and bondpads in microelectronic assemblies

A potentiostatic method was developed to investigate the ability of plasma-deposited silicon nitride thin films to protect microelectronic assemblies from corrosion due to aggressive contaminants. Test articles were immersed in 0.5 M NaCl at 0.0 V(SCE) and the resulting anodic current measured. The protective films reduced the corrosion current density by four orders of magnitude over the smooth, flat metallized Al regions representing bondpads, but by only one order of magnitude over the bondwires and by about 50% at the stitch bonds. These differences were due to the roughness of the bondwires and the occluded geometry of the bonds relative to the smooth metallized silicon areas.

A feasibility study of ic chip wire bond inspection

AbstractProduct inspection, which is an important step in industrial manufacturing, has depended on human inspectors whose performance is generally inadequate and variable. In the past few years, automated machines for wire bonding have been developed and integrated in the production of quality IC chips for the electronic industry. However, inspection of the wire bonds has not been automated as yet. This article describes a feasibility study for the automated visual inspection of IC chip wire bonds conducted in the Computer Vision Research Laboratory at Arizona State University. Both the system setup and algorithms for detecting some of the typical wire bonding defects such as ball bond, stitch bond placement, and size defects, and connecting wire defects such as missing and shorted wires using two‐dimensional digital images are described.

A Monolithic Data Acquisition Channel

A monolithic data acquisition channel has been fabricated using a double level polysilicon NMOS process. The channel consists of a switched-capacitor filter, a continuous-time active RC filter, and a successive approximation analog-to digital converter. The IC is in the form of a parts kit for a data acquisition channel so that each functional component can be characterized independently. Stitch bonds are used to connect the elements together to form the complete monolithic channel. Each element is implemented with a symmetric, fully differential structure. The measured dynamic range of the channel is 86.1 dB when using +- 5 V supplies.

A monolithic data acquisition channel

A monolithic data acquisition channel has been fabricated using a double level polysilicon NMOS process. The channel consists of a switched-capacitor filter, a continuous-time active RC filter, and a successive approximation analog-to-digital converter. The IC is in the form of a parts kit for a data acquisition channel so that each functional component can be characterized independently. Stitch bonds are used to connect the elements together to form the complete monolithic channel. Each element is implemented with a symmetric, fully differential structure. The measured dynamic range of the channel is 86.1 dB when using ± 5 V supplies.

A Programmable Surface Acoustic Wave Matched Filter for Phase-Coded Spread Spectrum Waveforms (Short Papers)

A programmable surface acoustic wave (SAW) matched filter for biphase-coded spread spectrum waveforms has been constructed using a temperature-stable ST-cut quartz tapped delay line (TDL) and silicon-on-sapphire integrated control circuits. Construction is hybrid with wire stitch bond interconnections between the acoustic and microelectronic portions of the device. The SAW TDL operates at 120-MHz center frequency with 100-ns spacing between adjacent taps for a 10-MHz chip rate. The output of each tap can be individually switched to a load with 0 or 180/spl deg/ phase shift by the silicon-on-sapphire integrated control circuits. The high-speed capability of silicon-on-sapphire integrated circuits allows programming (code changing) to be achieved with a serial data input at 10-MHz rates, while the low temperature coefficient of ST-cut quartz allows satisfactory operation over a wide temperature range (-25/spl deg/C to +85/spl deg/C).