This work aims to implement the Boolean and Arithmetic functions with Static Random Access Memory (SRAM) Cell made by nine CMOS Transistor for In-Memory computation. Normally the Von-Neumann architecture is used for current computing system where data and programs are placed in a single memory by sharing and a single Bus is used for memory access, ALU and for controlling of program. This results in minimizing the efficiency of computing when there is high eminence on Data tactless applications. The Von-Neumann architecture is made more efficient by Computation in Memory (CIM) architecture which overcome the drawback of Memory barrier, the power utilization and in the resemblance of wall structure. Here is presented an inside the memory computation method and co-designs of arithmetic circuitry using 9T SRAM cell. The Boolean algebra and Arithmetic operations are illustrated with 9T SRAM cell designed by CMOS technology in 180 nm process. The Boolean algebra for AND- NAND, OR-NOR logic gates are illustrated using 9T SRAM cells with the Latch type sense amplifier to verify the capability of computation in Memory of 9T SRAM cell. To illustrate the arithmetic circuit an array of memory has been made by the 9T SRAM cell and proposed sensing amplifier which is latch type and finally is mapped with circuit of half-adder and half-subtraction.