A rapid thermal chemical vapour deposition system has been used for the growth of epitaxial silicon layers on silicon substrates in the temperature range 590°C 1000°C. Low pressure deposition schedules have been found essential in order to minimise the concentrations of oxygen and carbon in the layers. In-situ pre-cleaning schedules have been established to remove oxide layers from the substrates prior to layer deposition. The application of these deposited epitaxial layers to the production of a buried gate static induction thyristor is described. The deposition of polycrystalline silicon and the growth of epitaxial silicon are vital steps in advanced integrated circuit processes. The technique in almost universal use for the production of these films is chemical vapour deposition (CVD), wherein gaseous species (eg SiH4, SiH2C12) react on a substrate and a solid phase material (silicon) is produced. Both polysilicon and epitaxial silicon have traditionally been produced in atmospheric pressure reactors. However, in the case of polysilicon, low pressure reactors have largely taken over because of improved uniformity and reduced gas consumption. Reduced pressures are also beneficial for the growth of epitaxial silicon, as autodoping and pattern shift effects are alleviated [l] and homogeneous gas phase nucleation of silane is retarded [ Z ] . Low pressure (LP) CVD is thus, becoming the most technologically important means of producing silicon films. Recently, much attention has been given to a refinement of LPCVD which incorporates the concept of rapid thermal processing (RTP). In RTP, the single process wafer is heated by a high-intensity light source, and very fast ramp rates can be achieved. The combination of LPCVD and RTP is known as rapid thermal chemical vapour deposition (RTCVD). In particular, when reactions are triggered by a temperature pulse (rather than by gas switching), the technique has been termed limited reaction processing (LRP) 1 3 1 . Rapid thermal processes have the advantage of a reduced thermal budget, as the fast ramp rates minimize the time for which the wafer is at elevated temperatures. This is an important consideration for high-speed VLSI circuitry, where lateral and vertical device dimensions must be tightly controlled. Because RTP minimises unwanted dopant diffusion, shallow junctions of high quality are more readily obtained by this technique than by traditional furnace methods. The ability to switch temperatures rapidly also means that several different process steps can be carried out sequentially in-situ. Article published online by EDP Sciences and available at http://dx.doi.org/10.1051/jp4:1991291 C2-780 JOURNAL DE PHYSIQUE IV LRP shares the advantages of RTP, and may be used to deposit a sequence of thin, highly abrupt semiconducting layers. Applications include shallow emitter-base structures for heterojunction bipolar transistors [4, 53 and superlattices [ 6 ] , and buried p ' grid structures for advanced static induction thyristors. This paper will describe a twin reactor system used for the production of epitaxial silicon layers for device manufacture. One of the reactors has been dedicated to high temperature epitaxy from SiH2C12 and the other to low temperature epitaxy from SiH,,. The requirements and properties of the two processes will be contrasted.
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