SRF PLL Research Articles

Performance analysis of fractional‐order modified SRF PLL under grid abnormalities

Performance analysis of fractional‐order modified SRF PLL under grid abnormalities

Optimum Setting Algorithm Based PI Controller Tuning for SRF-PLL Used Grid Synchronization System

Synchronous reference frame-phase lock loop (SRF-PLL) is most widely used for grid synchronization applications. PLL structure typically consists of a phase detector (PD), loop filter (LF) and voltage control oscillator (VCO). Design and tuning of proportional-integral (PI) controller based LF is a changeling task under distorted grid voltage conditions. Conventional tuning methods such as symmetrical optimum (SO) and Ziegler-Nichols techniques are used to tune the PI controller, resulting in increased phase margin (PM) of the system. However, high bandwidth develops harmonics in the extracted signals under non-ideal grid conditions and affects the stability. In this research article, a new optimum setting algorithm is proposed to tune the PI controller and effective synchronization is achieved. The plant is reduced as a first-order plus dead time delay (FOPDT) model and critical gain; critical frequency of the open loop system transfer function is used to model the LF of the SRF PLL system. The controller parameters are derived such that minimization of time-weighted integral performance criteria is achieved and phase angle, frequency of the grid voltage is accurately extracted. The performance of the proposed optimum setting algorithm for the SRF-PLL grid synchronization technique is discussed in detail and simulation results are presented.

Comparative Analysis of MDSC based PLL with SRF PLL of a PV Plant in GC and SA Mode of Operation

Comparative Analysis of MDSC based PLL with SRF PLL of a PV Plant in GC and SA Mode of Operation

A fast finite sample count symmetric component extraction method for use in grid side converters

The considerable increase in the number of renewable energy sources in power systems in recent years has led to the grid side converters’ connection requirements being more and more strict. In order to comply with the newly arising grid codes, the synchronization unit has to provide a fast and robust response even under unbalanced and distorted line voltage. This paper proposes a new method for very fast extraction of symmetrical components. The method uses a finite number of grid voltage samples to solve a set of algebraic equations and obtain sine and cosine factors of the direct and inverse sequence components. The corresponding amplitudes and angles are then found by using √ and arctan functions. The proposed extraction algorithm requires a derivative estimation technique to estimate the frequency from the direct sequence angle. The performance of the proposed finite sample count (FSC) method is compared to the all-pass filter (APF) based synchronous reference frame phase-locked-loop (SRF PLL) in simulations and experimentally using a DSP based platform and grid emulator with analog outputs. Under the voltage dip, FSC responds within several hundreds of µs, whereas it takes around 3 ms for the APF SRF PLL to settle.

Implementation of Grid Synchronization Methods on a Real Time Development System

Abstract The paper presents a study regarding the implementation of two representative grid synchronization methods, intended to be used in the control structure of a three phase switch mode voltage rectifier. The methods considered are the Synchronous Reference Frame Phase Locked Loop (SRF PLL) and the Double Synchronous Frame Phase Locked Loop (DSRF PLL), respectively. These synchronization methods have been compared on a real time development system type dSpace 1104 from the point of view of their performance in case of an unbalanced mains voltage system. Finally, the influence of the chosen grid synchronization method on the performance of a synchronous reference frame controlled three-phase switch mode voltage rectifier is studied by simulation, and better results are demonstrated to be provided by the use of the DSRF PLL.

A modernistic PLL based on feed forward frequency estimator with selective harmonic pre filter for grid imperfection

This paper describes a synchronisation technique to track phase and frequency of input signal under abnormal grid condition like frequency variation. Proposed control topology consist of a conventional synchronous reference frame phase locked loop (SRF PLL) type-2 along with a feed forward frequency estimator loop with selective harmonic filtering technique. It eliminates phase and frequency error under wide frequency deviation. Phase error is fed into proportional integral regulator which reduces it to zero. It is observed that faster and better dynamic performance is achieved by frequency estimator with higher stability margin. The stability is evaluated by bode plot. An estimated frequency is smooth and close to fundamental frequency as it uses the information from all three phase to estimate a single value for frequency. The feed forward action is implemented with pre filtering stage to improve dynamic performance of system. Simulation results are presented to validate effectiveness of proposed technique.

Improvement of DSOGI PLL Synchronization Algorithm with Filter on Three-Phase Grid-connected Photovoltaic System

Synchronous Reference Frame Phase Locked Loop (SRF PLL) has been widely used for synchronization three-phase grid-connected photovoltaic (PV) system. On the grid fault, SRF PLL distorted by negative sequence component and grid harmonic that caused an error in estimating parameter because of ripple and oscillation. This work combined SRF PLL with Dual Second Order Generalized Integrator (DSOGI) and filter to minimize ripple and minimize oscillation in the phase estimation and frequency estimation. DSOGI was used for filtering and obtaining the 90o shifted versions from the vαβ signals. These signals (vαβ) were generated from three phase grid voltage signal using Clarke transform. The vαβ signal was the inputs to the positive-sequence calculator (PSC). The positive-sequence vαβ was transformed to the dq synchronous reference frame and became an input to SRF-PLL to create the estimation frequency. This estimation frequency from SRF PLL was filtered by the low-pass filter to decrease grid harmonic. Moreover, the output of low-pass filter was a frequency adaptive. The performance of DSOGI PLL with filter is compared with DSOGI PLL, SRF PLL, and IEEE standard 1547(TM)-2003. The improvement of DSOGI PLL with filter gave better performances than DSOGI PLL and SRF PLLbecause it minimized ripples and oscillations in the phase and frequency estimations.

Single-Phase Grid Voltage Attributes Tracking for the Control of Grid Power Converters

Grid interfacing power converters are indispensable for renewable energy conversion schemes. Fast and precise detection of grid signal parameters is essential for effective operation and control of these converters. For such applications, synchronous reference frame phase-locked loop (SRF PLL) involving two orthogonal signals (OS) is widely deployed. For the single-phase system, this requires another signal orthogonal to the input. In this paper, single-phase SRF PLL with fixed sampling period sliding discrete Fourier transform (SDFT) filter as OS generator is proposed. Additionally, this filter is capable of rejecting dc offset and harmonics present in the grid voltage. With this arrangement, the loop filter of PLL need not be equipped with filtering capability. Therefore, PLL could be designed with larger bandwidth, which will result in better transient performance. However, SDFT output will be erroneous with asynchronous sampling, under grid frequency drift. With suitable study, relation between those errors and deviation of frequency from nominal value is established. Using this relation, error compensation at any grid frequency can be achieved. To validate the proposed method, various grid abnormalities are emulated with the aid of programmable power source and dSPACE real-time controller board. The effectiveness of the proposed scheme is demonstrated through experimental investigations.

A three phase PLL with a dynamic feed forward frequency estimator for synchronization of grid connected converters under wide frequency variations

This paper presents a synchronization technique to accurately track the phase and frequency of the input signal under large frequency deviations. The hybrid FPLL structure consists of a conventional SRF PLL feedback loop along with a feed forward frequency estimator loop. The advantage of this technique is that the feedback controller has to reduce only the phase error and the frequency error is eliminated by the feed forward controller. This increases the dynamic response of the system under frequency deviations. The performance of the hybrid structure is compared with the conventional SRF PLL and the former shows improved performance over the SRF PLL in terms of filtering characteristics and transient response for wide range of frequency deviations. The steady state error analysis is carried out and the necessary condition for stability is also derived. Simulations are carried out in MATLAB/Simulink and implemented in real time using an ALTERA cyclone II FPGA board. The results obtained for various grid conditions such as unbalance, harmonics, phase jump and frequency deviation demonstrate the phase-tracking ability of the technique.