Spin-on Dielectrics Research Articles

Gate oxide wear out using novel polysilazane-base inorganic as nano-scaling shallow trench filling

The phenomenon of floating gate (FG) crystallization and extrinsic gate oxide breakdown ( V bd) are discussed using polysilazane-base inorganic material SOD (Spin-On-Dielectric) as shallow trench isolation (STI) filling for 50 nm flash memory fabrication. The pinholes are found along the FG grain boundary in wide active regions because of tensile stress induced by SOD material in STI process, thus gate oxide wears out by following wet cleaning steps. The chemical oxide formation during FG deposition can effectively inhibit gate oxide early breakdown. Moreover, FG sheet resistance ( R s) in 550 °C/air deposition condition can significantly reduce about 20% in comparison with 520 °C/O 2 and 400 °C/N 2 conditions.

Effect of Wet Treatment on Stability of Spin-On Dielectrics for STI Gap-Filling in Nanoscale Memory

As a design rule of memory devices is scaled down to sub-100 nm, shallow trench isolation (STI) technology is faced with gap-filling problem in case of CVD oxide and O3-TEOS oxide processes. To overcome the gap-filling problem, a perhydropolysilazane (PHPS) based spin-on dielectric (SOD) has been implemented for nanoscale devices because of self-planarization and excellent gap-filling property [1]. However, the stability of the SOD has been concerned about because it has relatively softer and more porous than conventional HDP oxide. In this paper, we report the effect of wet oxidant treatment on the stability of the SOD for STI gap-filling.

Shallow trench isolation liners and their role in reducing lattice strains

Three spin-on dielectric (SOD) shallow trench isolation (STI) structures were studied: nitride liner, nitride liner with anisotropic amorphous silicon (a-Si) bottom fill, and nitride liner with thin conformal a-Si. All samples received the same SOD material conditions and final thermal oxidation. Convergent beam electron diffraction determined the induced STI strain and has been shown to accurately measure strain on 60nm active areas. The results revealed effects that the liners have in balancing stress induced by volume shrinkage of the SOD. The conformal a-Si liner decreased the shear force that causes dislocations that form at the bottom corners of STI structures.

Thermal stability and gap-fill properties of spin-on MSQ low-k dielectrics

Looking onto integration of low-k materials within FEOL used processing temperatures in this field are much higher than within BEOL. In addition partly high aspect ratio features have to be filled without defects, e.g. within usage of spin-on low-k materials for shallow trench isolation. We evaluated two MSQ-based spin-on dielectrics, a porous ultralow-k material and a dense spin-on glass regarding their thermal stability and gap-fill behaviour. The films were annealed from standard curing temperatures up to temperatures of 850 °C and 900 °C, film thickness and refractive index were measured by spectral ellipsometry, electrical film properties were evaluated by a mercury probe measurement and changes within chemistry are studied by FTIR. Both low-k materials are thermally stable up to temperatures of 650–700 °C. Above this range the film thickness is rapidly decreasing, refractive index and corresponding to that the k-value are strongly increasing, as does the leakage current density. FTIR spectra show a shift within Si–O–Si backbone and Si–CH 3 and CH 3 bonds are vanishing, while OH groups are adsorbed, additionally leading to higher k-value and leakage currents. Both materials show very good gap-fill properties, filling features with aspect ratios up to 5 or 10 and Aluminium covered structures without any visible defects.

Core−Shell-Shaped Organic−Inorganic Hybrid as Pore Generator for Imprinting Nanopores in Organosilicate Dielectric Films

Nanoporous thin films, a promising candidate of spin-on ultralow dielectrics for microelectronic applications, have been fabricated via thermally sacrificing a new pore generator octa(2,4-dinitrophenyl)silsesquioxane (ODNPSQ) in a higher molecular weight (Mw = 30 872) polyphenylsilsesquioxane (PPSQ) matrix. The organic−inorganic hybrid ODNPSQ exhibits a core−shell structure (one cubic Si8O12 core covered by eight dinitrophenyl groups as shell) with high decomposition temperature at ∼420 °C. PPSQ holds a chain molecular structure consisting of numbered ladderlike and partial T12 cagelike repeating units, which could be thermally bonded first via an intermolecular condensation reaction, forming two-dimensional sheets, and then further linked by sharing oxygen atoms, generating a highly cross-linked three-dimensional framework by curing at 450 °C, featuring a single strong FT−IR symmetrical Si−O−Si stretching frequency at 1132 cm-1. Nanopores in PPSQ matrix are imprinted by sacrificing ODNPSQ porogen curing ...

Characterization of Low and Intermediate Molecular Weight Hydrogen Silsesquioxanes by Mass Spectrometry

Hydrogen silsesquioxanes (HSQ or H-resin), represented by (HSiO3/2)2n or TH(2n), are an important class of polymers that have gained popularity as spin-on dielectrics by the electronic industry. Previously in the literature, small oligomeric species such as (HSiO3/2)2n, where n = 4-16, have been identified by GC-MS. However, nondestructive mass spectral results for larger H-resin molecules have not been reported, likely due to the nonpolar nature of these molecules. We have utilized a number of "soft" ionization techniques such as field desorption (FD), desorption chemical ionization (DCI), and matrix-assisted laser desorption/ionization (MALDI), and demonstrated that they are amenable to hydrogen silsesquioxanes. The [TH(2n) - H]+* ions were observed by FD-MS while [TH(2n) + NH4]+ and [TH(2n) + Na]+ ions were found utilizing DCI and MALDI, respectively. Based upon the MS results, the polymer compositions as well as molecular weight information can be easily obtained. The detailed structures of H-resin components, however, remain a difficult issue, which cannot be answered by MS data alone. With these preliminary MS results, we have clearly demonstrated that mass spectrometry with the above-mentioned ionization techniques is an invaluable tool that can be utilized when attempting to solve the challenge set forth by the complexity of hydrogen silsesquioxane materials.

Plasma-enhanced-chemical-vapor-deposited ultralow k for a postintegration porogen removal approach

Conventional Cu-ultra low K (ULK) integration schemes lead to a drastic increase of the effective dielectric constant due to porous material degradation during process steps. Although a postintegration porogen removal scheme allows overcoming these issues, only spin-on dielectrics were developed to validate this approach. In this letter, plasma-enhanced chemical-vapor deposition is used to deposit ULK dielectric (k<2.5). The precursor chemistry and the deposition conditions have been chosen to obtain a material with the required characteristics to use a postintegration porogen removal approach: porogen thermal stability up to 325°C, good mechanical properties of the hybrid film, no metallic barrier diffusion in the film, and a minimal shrinkage after the porogen removal treatment.

65.2: Spin-On Polymers for TFT Gate Dielectric Application and Planarization of Stainless Steel

We present spin-on polymer films with significantly improved dielectric properties for TFT gate dielectric applications. Breakdown voltage//leakage current//CV hysteresis are 4.10 MV/cm at 1 μA/cm2//4.9 × 10−8 A/cm2 at 2.5 MV/cm//3.4 V and 4.73 MV/cm//2.6 × 10−8 A/cm2//0.44V at curing temperatures of 250 °C and 425 °C, respectively. In addition, we present our recent results using spin-on dielectrics to planarize and insulate stainless steel substrates for flexible displays and high resolution QVGA mobile displays.

Effect of pore interconnection on Cu-diffusion-induced failures in porous spin-on low-k dielectrics

The porosity dependence of electric reliability in the spin-on low-k dielectric with the same matrix but with various porosities was examined using time-dependent dielectric breakdown and capacitance voltage measurements. Abrupt changes in the time to dielectric breakdown and a flatband voltage shift were observed when the porosity of low-k dielectrics was between 20% and 30%. Such a characteristic agrees with the positronium annihilation lifetime spectroscopy data, which indicates that the interconnectivity of the pores abruptly increased in those materials with a porosity between 20% and 30%, and it causes an increase in Cu-diffusion-induced failures.

Properties of High-Performance Porous SiOC Low-k Film Fabricated Using Electron-Beam Curing

In this paper, we describe the effect of electron-beam (EB) curing on ultra-low-k dielectric porous SiOC material (k=2.2) and the application of this technology to the 90-nm-node Cu/low-k multilevel damascene process. A significant improvement of dielectric porous SiOC films with EB curing has been demonstrated. The mechanical and adhesion strength of these films were increased by a factor of 1.5–1.6 without degrading the film's k. This result can be explained by the reconstruction of a Si–O random network structure from cage Si–O bonds and Si–CH3 bonds through EB curing. Additionally, the EB curing of spin-on dielectric (SOD) porous low-k films contributes to a decrease in their curing temperature and a decrease in their curing time. Under optimum EB curing conditions, no degradation of transistor performance was revealed. The excellent adhesion strength obtained by EB curing, has contributed to the success of multilevel damascene integration. On the basis of our findings, this EB curing technology can be applied in devices of 65-nm-node and higher.

Copper Decontamination Ability of Supercritical-CO<sub>2</sub>/Additives on CVD and Spin-On Porous MSQ Materials

The paper focused on the development of very dilute mixtures of chelating agents, acids and organic solvents for post etch residue (PER) removal and copper (Cu) low-k decontamination under supercritical CO 2 (SCCO 2 ) foradvanced nodes (< 65nm) BEOL integration. The Cu low-k decontamination ability of each mixture was carried out on Spin-On Dielectric (SOD) and Chemical Vapor Deposition (CVD) porous low-k. The copper decontamination ability of SCCO 2 /additives systems were also studied on ashed and unashed low-k blanket wafers. Finally, the paper presented the Cu decontamination performance and Cu PER removal ability of SCCO 2 /additive systems compared to conventional wet chemistries.

Ultralow-k nanoporous organosilicate dielectric films imprinted with dendritic spheres

Integrated circuits that have improved functionality and speed in a smaller package and that consume less power are desired by the microelectronics industry as well as by end users, to increase device performance and reduce costs. The fabrication of high-performance integrated circuits requires the availability of materials with low or ultralow dielectric constant (low-k: k <OR= 2.5; ultralow-k: k <OR= 2.0) because such dielectrics not only lower line-to-line noise in interconnect conductors, but also minimize power dissipation by reducing the capacitance between the interconnects. Here we describe the preparation of low- and ultralow-k nanoporous organosilicate dielectrics from blends of polymethylsilsesquioxane (PMSSQ) precursor with globular ethyl acrylate-terminated polypropylenimine dendrimers, which act as porogens. These dendrimers are found to mix well with the PMSSQ precursor and after their sacrificial thermal decompositions result in closed, spherical pores of <2.0 nm radius with a very narrow distribution even at high loading. This pore size and distribution are the smallest and the narrowest respectively ever achieved in porous spin-on dielectrics. The method therefore successfully delivers low- and ultralow-k PMSSQ dielectric films that should prove very useful in advanced integrated circuits.

High Strength Low Dielectric Constant Aromatic Thermosets

AbstractContinuing miniaturization of microelectronic devices requires development of low dielectric constant materials to lower the RC delay, power dissipation and crosstalk noise. Although spin-on polymer dielectrics usually have better potential for extendibility to lower dielectric constant (k) values compared to chemical-vapor-deposited dielectrics, their low mechanical properties prevent them from being successfully integrated with copper metal lines.Recent evaluation of a new thermosetting oligomer shows high thermal stability, low moisture pick-up and low dielectric constant. Techniques to optimize the solubility and spin coating characteristics of the oligomer have been developed. The thermally cured polymer displayed a thermal stability up to 480°C in nitrogen and 400°C in air. The cured polymer displayed a dielectric constant of 2.7 at 1 MHz and a breakdown strength larger than 230 V/μm. Nanoindentation testing showed that it had an extraordinarily high Young's modulus of 16.8 GPa and a hardness of 3.5 GPa. By use of porogens, a dielectric constant as low as 1.85 was obtained while still maintaining an acceptable high Young's modulus of 7.7 GPa and hardness of 2.0 GPa. Nanoscratch testing indicated that this material had good adhesion to the Si substrate, and Ta which is a diffusion barrier for copper. These results appear unique compared to all commercially available low-k candidates.

SiLK™ etch optimization and electrical characterization for 0.13 μm interconnects

This paper is focused on the optimization of reactive ion etching (RIE) process of low- k polymeric spin-on dielectric (SOD) material, SiLK™ (Trade mark of Dow Chemical, USA), for 0.13 μm Cu-low- k interconnects technology and subsequent electrical characterization of the metallization. Damascene metallization of SiLK™ film was integrated with dual hardmask scheme and “trench first” approach. Etch processes for single damascene metal trench and dual damascene via and metal2 trench structures were developed and evaluated. Effect of SiN and SiC films used as one of the hard mask layers and copper cap layers for single and dual damascene formation were also evaluated. The advantages of using SiC over SiN layer as one of the (bottom) dual hardmask layers were demonstrated through the results of electrical performance. Integration issues related to process development were analyzed and discussed. Electrical and reliability performance of testing vehicles associated to different etch criteria were studied. Electrical yield of >90% was obtained for the structures under study, which indicated the wide process margin. The consistency of processes was further demonstrated through the successful integration of eight metal layers with SiLK™ dielectric film.

Curing Process Window and Thermal Stability of Porous MSQ-Based Low-Dielectric-Constant Materials

The curing process window and properties of both nitrogen and ammonia cured porous methyl silsesquioxane (MSQ) based low-dielectric-constant (low-k) spin-on dielectric (SOD) films are comprehensively explored and compared in this research. Higher curing temperatures, longer curing time, and an atmosphere provide more complete poragen removal and H-OR/H-OH hydration, and thus achieve higher degrees of cross-linking and volume shrinkage of these films. The desorption of water and ethylic organics confirms the release of hydrated and is dominated by the curing temperatures. Smaller refractive indexes, better electrical properties, and stronger mechanical properties are obtained with curing and increased curing temperatures and time because of more complete hydration. With consideration of total thermal budget, the appropriate curing process window locates at 350°C for only 10 min or 300°C for 20-30 min with flows of 10/0.1-10/2.0 slm. All the properties do not degrade with extended thermal-cycle treatments, exhibiting good thermal stability. © 2004 The Electrochemical Society. All rights reserved.

27.1: MICC Poly‐Si TFTs for AMLCDs

AbstractA novel LTPS method called MICC (metal‐induced crystallization using a cap) is introduced. The role of cap layer on a‐Si is the control of the nickel concentration for inducing crystallization as well as the passivation of the surface during thermal process for crystallization. Circular grain growth can be seen, due to lateral grain growth from a seed. Polycrystalline silicon with large grain and smooth surface can be achieved by MICC. We fabricated a AMLCD with high aperture ratio of 80 % using silicon‐based spin‐on low‐K dielectrics as a planarization layer.

Mechanical characterization of low- k dielectric materials using nanoindentation

Improvements in the dielectric constant of low- k materials play an important role in reducing gate delays in modern microelectronics. However, these improvements are often achieved through increases in porosity or usage of materials with low polarizability, which can reduce the overall mechanical strength of the material. This creates difficulties with further fabrication processes such as chemical–mechanical planarization. Therefore, the mechanical properties of low- k materials must be considered when evaluating the material's overall performance. Measuring the mechanical properties of these spin-on dielectrics and chemical vapor deposited films is made challenging by the fact that they have sub-micron thickness. The nanoindentation testing technique is uniquely suited for performing these measurements. Presented here is the mechanical analysis of three such low- k films using nanoindentation. All of these films are on a silicon substrate. Details of the testing methods and equipment are also discussed.

Characterisation of JSR’s spin-on hardmask FF-02

Some of the spin-on interlayer dielectrics (ILD) with dielectric constant k below 2.3, targeted for the 65 nm node and below, are available with their spin-on hard masks (SoHM) to reduce the total effective capacitance and to provide high selectivity to their respective ILDs during integration. In this work, FF-02, JSR’s SoHM is characterised. Its thermal stability, chemical compatibility to stripping solutions and resistance to moisture are investigated. Methods to seal the surface of FF-02 to chemicals are explored. Electrical properties including the dielectric constant, leakage current and breakdown fields are evaluated in planar capacitors and in single damascene structures.

Ta/low-κ CMP with Colloidal Silica Particles

AbstractLow-κ/Cu interconnect integration achievement is one of the key issues for the future sub-100 nm technologies. Nowadays, no definitive integration scheme has been reported. Low-κ integration is especially difficult because the trench/via etching and CMP processes can damage its properties. In the present work, we present results on different materials that could be used in such integration. We focused our study on the barrier (Ta/TaN) and on a low-κ material (dense and porous), that is a spin-on-dielectric (SOD) of the methylsilsesquioxane (MSQ) type. CMP slurries were made from monodisperse colloidal silica particles. In a first approach, the slurries compositions mainly differed by their pH and abrasive characteristics. The particle size ranged from 12 to 80 nm, with a pH varying between 2 and 11. The sensitivity of the Ta/TaN and low-κ removal rates will also be reported. Scanning electron microscopy (SEM) and atomic force microscopy (AFM) of the different films were carried out in order to evaluate the impact of CMP on their surface quality. Measurements did not show any surface degradation or/and scratches, and no delamination has been observed. Post-CMP κ value measurements have been carried out to highlight possible damage on the low-ê dielectric materials.

Mechanical strain evolution in Cu/low K interconnect lines

ABSTRACTThe mechanical stresses in Cu interconnect lines arise from thermal expansion (CTE) differences, and the magnitude of the stress can be calculated based on the measured strain. In the current work, the strain (and stress) state of narrow Cu lines fabricated in oxide and porous organic spin-on dielectrics (low K) has been determined with X-Ray diffraction (XRD) during annealing. The room temperature stress along the length (X) and width (Y) of the lines are not dramatically different while the Z component is somewhat smaller with the spin-on ILD. These small perturbations in the magnitude of the Cu stress do not reflect the dramatic differences in the CTE. More insight into the materials system is obtained by studying the strain-temperature behavior, which illustrates the effect of the ILD clearly. The X strain is similar in magnitude and variation with temperature for both ILDs, supporting strain being imposed by the substrate. However, the Z strain is compressive at RT and linearly increases with temperature for Cu in low K, reflecting the lack of constraint by the ILD and the higher CTE of the ILD.