Space Vector PWM Scheme Research Articles

Characterization and Selection of Probability Density Function in a Discrete Random Switching Period SVPWM Strategy

Aiming at suppressing the switching frequency harmonics in the integrated permanent magnet synchronous motor (PMSM) systems, a discrete random switching period (DRSP) space vector pulse width modulation (SVPWM) technique is proposed in the present study. In the proposed DRSP-SVPWM technique, the switching period is randomized according to a predefined frequency sequence. Accordingly, the narrow-band harmonics of the switching frequency are extended to a wider range. Then, a mathematical correlation between the probability density function and the harmonic distribution is established. Moreover, the effects of discrete uniform and beta distributions on the harmonic spreading are studied. Based on the proposed DRSP-SVPWM technique, the mathematical expression of the harmonic power spectrum is derived, demonstrating the intrinsic dependency between the discrete random factor and the harmonic energy distribution. Finally, a series of simulations and experimental results are compared to evaluate the performance of the proposed technique. The present study is expected to provide a theoretical basis for the design and selection of discrete frequency sequences. Meanwhile, it provides a reference to investigate the random SVPWM and improve noise and electromagnetic interference in power converters.

A Novel Representation Method of Space Vector PWM Schemes with Zero Voltage Vector Ratio as a Parameter

Various PWM modulation schemes have been proposed for three-phase voltage source inverters with different representation methods. This paper proposes a novel representation method for various modulation schemes in a unified manner by introducing a variable called the zero-voltage vector ratio. This paper also shows that the proposed method can represent three conventional modulation schemes.

A seven-level cascaded multilevel inverter based on simplified SVPWM method

The multilevel converters are extremely widespread alternatives within megawatt power level as well as medium voltage level applications due to their excellent execution than the typical two-level converters. The widely applied control strategies aimed at inverters are Sine Pulse Width Modulation (SPWM) and Space Vector Pulse Width Modulation (SVPWM) strategies. In between these two PWM methods, the SVPWM strategy has excellent execution as compared to the SPWM strategy as a result of improved DC link voltage use as well as a decrease in Total Harmonic Distortion (THD) in output voltages. A traditional SVPWM strategy owns numerous weaknesses like computational complications in terms of identification of the reference voltage vector position, to identify sector, triangle and also it requires large memory for storing look up tables used for switching vectors. This paper presents, an innovative modified SVPWM strategy aimed at Cascaded H-Bridge Multilevel Inverter (CHBMLI). The novel modified SVPWM strategy has overwhelm the downsides of traditional SVPWM strategy. A seven-level CHBMLI is used for the implementation of this simplified SVPWM method to assess performance and as well to made comparison with the SPWM strategy. A MATLAB software is used for the simulation.

Single-Phase Transformerless Five-Leg AC–DC–AC Multilevel Converter for Voltage Step-Up Applications

This article proposes a single-phase transformerless ac–dc–ac multilevel converter composed of a three-leg module series-connected to an H-bridge at the load side to achieve a higher and multilevel voltage at this side. The proposed structure is appropriated for applications with the same input and output frequencies, such as uninterrupted power supply and unified power quality conditioner, and for electric power conversion systems in which the output voltage required is higher than the input voltage (voltage step-up applications). System model, converter power analysis, dc-link voltage specifications, and a space vector PWM strategy are developed. The proposed system control ensures fixed load voltage with constant amplitude and frequency, maximizes the grid power factor, and regulates the dc-link voltages. Compared with conventional solutions, the proposed configuration has presented lower dc-link voltage ratings and lower mean switching frequency on the semiconductor devices, lower harmonic contents, and lower switching losses. The comparative analysis shows that the mean weighted total harmonic distortion (WTHD) of the generated voltages of the proposed topology are reduced about 27% and 16%, respectively, compared to the topologies 4L and 3L, and 4L-LLC; and the total semiconductor losses are reduced about 26%, 10%, and 49%, respectively, compared to 4L, 3L, and 4L-LLC, when all topologies operate with the same mean WTHD. Operating with the same switching frequency, the proposed converter presented total semiconductor losses similar to conventional 3L, and about 17% and 45% lower than 4L and 4L-LLC. Experimental results demonstrate the operation of the proposed converter under load transients and grid voltage variations.

Space Vector PWM Based DTC Scheme With Reduced Common Mode Voltage for Five-Phase Induction Motor Drive

In multiphase induction motor drives, lowering the common-mode voltage (CMV) reduces motor insulation degradation and the existence of destructive bearing current. For this investigation, a five-phase two-level voltage source inverter (FPTL-VSI) fed five-phase induction motor (FPIM) drive is used. FPTL-VSI produces increased CMV, which cannot be totally removed. Moreover, CMV can be reduced by 80% in contrast to its peak-to-peak value with suitable selection of small and large voltage vectors in a space vector pulsewidth modulation (SVPWM) scheme. Direct torque control (DTC) combined with the SVPWM scheme can accomplish such reduced CMV performance at constant switching frequency. To provide better speed and torque control, two virtual vector (VV) based SVPWM-DTC (DTC1 and DTC2) methods are proposed in this study. Over a wide range of modulation index, the influence of each voltage VV on motor drive speed and torque response is investigated. The proposed DTC1 and DTC2 schemes are validated under steady-state and dynamic conditions over a wide range of speed fluctuations using a high-power laboratory prototype of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$3.8\,\text{{k}W}$</tex-math></inline-formula> FPIM drive. The efficacy of the proposed DTC1 and DTC2 is compared to the current literature by evaluating the effectiveness of CMV and the switching frequency.

Finite element and analytic equivalent circuit models for MSIM feeded by MPI controlled by SVPWM strategy to minimise circulation harmonic current

This article deals with the determination of the multi-stars induction machine (MSIM) equivalent circuit parameters based on the geometrical and electrical data using two methods namely analytic and finite element method (FEM). Additionally, this paper proposes a general dynamic study of MSIM. This latter is fed by a multi-phase inverter (MPI) controlled by a space vector pulse width modulation (SVPWM) and a sinusoidal pulse width modulation (SPWM). However, when this machine is fed by the voltage inverter for the case of 30° electrical shift between stator stars, large harmonic currents are observed. Thus, the main goal of this paper is to reduce the effect of these harmonic currents. Therefore, to overcome these issues, the machine stars number has been increased to three and four and the inverter has been controlled by the SVPWM. The effectiveness of this association and its capability to reduce the effect of the output harmonic current and electromagnetic torque ripple has been proved by simulation results.

Fault-tolerant deadbeat model predictive current control for a five-phase PMSM with improved SVPWM

The main drawbacks of traditional finite set model predictive control are high computational load, large torque ripple, and variable switching frequency. A less complex deadbeat (DB) model predictive current control (MPCC) with improved space vector pulse-width modulation (SVPWM) under a single-phase open-circuit fault is proposed. The proposed method predicts the reference voltage vector in the α-β subspace by employing the deadbeat control principle on the machine predictive model; thus, the exhaustive exploration procedure is avoided to relieve the computational load. To perform the constant switching frequency operation and achieve better steady-state performance, a modified SVPWM strategy is developed with the same conventional structure, which modulates the reference voltage vector. This new approach is based on a redesigned and adjusted post-fault virtual voltage vector space distribution that eliminates the y-axis harmonic components in the x-y subspace and ensures the generation of symmetrical PWM pulses. Meanwhile, the combined merits of the DB, MPCC, and SVPWM methods are realized. To verify the effectiveness of the proposed control scheme, comparative experiments are performed on a five-phase permanent magnet synchronous motor (PMSM) drive system.

Feedforward Neural Network-DTC of Multi-phase Permanent Magnet Synchronous Motor Using Five-Phase Neural Space Vector Pulse Width Modulation Strategy

In this work, the direct torque control (DTC) is applied to the five-phase permanent magnet synchronous motor (FP-PMSM). The DTC method based on classical space vector pulse width modulation (SVPWM) is a common solution used to overcome traditional problems; such as stator flux ripple, electromagnetic torque ripple and gives more total harmonic distortion (THD) of the stator current. The actual paper is based on improving the performance of DTC-SVPWM by using the feedforward neural networks (FNNs) instead of the proportional-integral (PI) regulators and hysteresis comparators (HCs) of the conventional SVPWM strategy. This algorithm can solve the traditional PI regulators and HCs problems which are represented in responses dynamic and reduce the torque ripple, flux ripple, and the THD of stator current of FP-PMSM drives. The proposed strategy was tested in different tests with simulation using Matlab software.

Simulation and dSPACE Hardware Implementation of Carrier based SVPWM for Open-end Induction motor

This paper deals with the implementation of carrier based Space vector pulse width modulated methods (SVPWM) in conjunction with a three phase open end induction motor(OEIM). Among various PWM methods, now a day’s carrier based PWM methods draws more attention due to their easier digital implementation. The main focus of this paper is effortless digital implementation of PWM methods to drive the open end induction motor which is supplied using two dc to ac converters (VSI), using various carrier-based Space vector PWM schemes. MATLAB Simulink platform is used to simulate different carrier based PWM methods for the VSI fed Induction motor. In the present work dSPACE 1104 is used for the digital implementation. The simulation and hardware results which are obtained from various modulation techniques for the proposed model are secure produced by using voltage and current waveforms, FFT analysis, and the most predominantly the THD is slighter. Theoretical and realistic values are corroborating by simulation and experimentation.

Comprehensive Analysis of Hexagonal Sigma-Delta Modulations for Three-Phase High-Frequency VSC Based on Wide-Bandgap Semiconductors

The efficiency of wide-bandgap (WBG) power converters can be greatly improved using high-frequency modulation techniques. This article proposes using single-loop and doubleloop hexagonal sigma-delta (H-ΣΔ and DH-ΣΔ, respectively) modulations for voltage source converters (VSC) that use silicon carbide (SiC) semiconductors. These allow high switching frequencies to operate more efficiently than silicon devices. Thus, ΣΔ modulations are excellent candidates for taking advantage of WBG devices. The proposed modulation techniques allow working with a variable switching frequency, thus producing an extreme reduction in switching losses and mitigating the low-order harmonics in comparison with the classical space vector pulsewidth modulation (SVPWM) technique, and with the innovative variable switching frequency pulse-width modulation (VSFPWM). The performance and losses of both ΣΔ techniques are analyzed here using MATLAB/Simulink and PLECS, and then compared with SVPWM and VSFPWM. Furthermore, the frequency spectrum and the total harmonic distortion are evaluated. Experimental results performed on a VSC converter that uses SiC MOSFETs show how H-ΣΔ and DH-ΣΔ greatly improve efficiency and generate fewer low-order harmonics than the SVPWM and VSFPWM strategies do.

Implementation of an FPGA-Based Current Control and SVPWM ASIC with Asymmetric Five-Segment Switching Scheme for AC Motor Drives

This paper presents the design and implementation of an application-specific integrated circuit (ASIC) for a discrete-time current control and space-vector pulse-width modulation (SVPWM) with asymmetric five-segment switching scheme for AC motor drives. As compared to a conventional three-phase symmetric seven-segment switching SVPWM scheme, the proposed method involves five-segment two-phase switching in each switching period, so the inverter switching times and power loss can be reduced by 33%. In addition, the produced PWM signal is asymmetric with respect to the center-symmetric triangular carrier wave, and the voltage command signal from the discrete-time current control output can be given in each half period of the PWM switching time interval, hence increasing the system bandwidth and allowing the motor drive system with better dynamic response. For the verification of the proposed SVPWM modulation scheme, the current control function in the stationary reference frame is also included in the design of the ASIC. The design is firstly verified by using PSIM simulation tool. Then, a DE0-nano field programmable gate array (FPGA) control board is employed to drive a 300W permanent-magnet synchronous motor (PMSM) for the experimental verification of the ASIC.

A Novel SVPWM Scheme for Field-Oriented Vector-Controlled PMSM Drive System Fed by Cascaded H-Bridge Inverter

In the motor drive system fed by multilevel inverter, the problems such as the complexity of reference voltage synthesis, high common mode voltage (CMV), and high switching loss are usually the obstacles to the practical application. In order to reduce the computational complexity and improve the performance of permanent magnet synchronous motor (PMSM), a novel space vector pulsewidth modulation scheme, which is practical and independent of level number is proposed for PMSM vector control. First, the space vector plane is redivided, and the coordinates of the nearest three vectors and their duty cycles can be obtained directly by determining the location of reference vector, which simplifies the calculation and does not need any iterative algorithm. Then, the optimal switching state and switching sequence are selected online so as to ensure the minimum switching loss under the premise of minimum CMV. This article provides an original method and new idea for motor drive system fed by multilevel inverter. Finally, the practicability and validity of the proposed method are verified by simulation and experiment.

An Enhanced SVPWM Strategy Based on Vector Space Decomposition for Dual Three-Phase Machines Fed by Two DC-Source VSIs

This article presents an enhanced space vector pulse width modulation (SVPWM) strategy based on vector space decomposition (VSD) for the dual three-phase machines fed by two dc-source voltage source inverters (VSIs). Compared with existing methods that only account for balanced dc-link voltages, the proposed method considers unbalanced dc-link voltages in both the α-β and z <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1</sub> -z <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> planes. Two categories of medium voltage vectors are first defined in this article. An enhanced 12-sector SVPWM strategy that toggles two categories of medium voltage vectors in each fixed 30° sector is proposed. Moreover, the performance of the proposed method, including the modulation depth, the range of the dc-link voltage ratio, and the toggling point of the medium vector is analyzed. The proposed method can reduce the computational burden of the complicated sector classifications and it easily chooses suitable vectors to track the reference voltage with changes in the dc-link voltage ratio. The experimental results of the proposed SVPWM techniques are verified in a dual three-phase permanent magnet synchronous machine (PMSM) fed by two dc-source VSIs.

A Dual-DC Output Three-Phase Three-Level AC–DC Converter for Low-Frequency Pulsed Power Decoupling Applications

A dual-dc output three-phase three-level ac–dc converter is proposed for low-frequency pulsed power decoupling applications. One of the dc output is connected to the dc pulsed load, whereas the other one is used as power decoupling port and connected to the decoupling capacitor. The voltage of the power decoupling dc port can vary in a wide range to reduce the value and volume of the power decoupling capacitor. A buck/boost converter is employed to interface the power decoupling port with the dc pulsed load. A modified space vector pulsewidth modulation strategy is proposed for the ac–dc converter, based on which independent voltage and power regulation of the two dc outputs is achieved. The steady-state power is directly fed to the dc load with single power conversion stage, and the low frequency pulse power is fed to the power decoupling port. As a result, high-power quality and efficient power decoupling with reduced power conversion stages are achieved. Operation principles, modulation, and control strategies of the ac–dc converter are analyzed in detail. A prototype is built and tested to verify the effectiveness and feasibility of the proposed ac–dc converter for pulsed load.

A Family of Asymmetrical SVPWM Schemes with Normal and Open-Circuit Fault-Tolerant Operation Capability for a Three-Phase Isolated AC-DC Matrix Converter

The three-phase isolated ac–dc matrix converter (3P-IMC) inherits all the merits of the conventional matrix converter. But it also suffers from a large number of bidirectional switches and cannot operate safely in an open-circuit fault condition. Hence, with a general space vector PWM (SVPWM) model presented in this article, three types of asymmetrical SVPWM (ASVPWM) schemes are first proposed for normal and open-circuit fault-tolerant operation. The ASVPWM schemes have more kinds of synthetic vectors with asymmetrical distribution, however, also feature a higher freedom and flexibility to further improve the system performance. Then by sectional combining the above ASVPWM schemes with the conventional one, the 3P-IMC could be continued to operate with a tight dc output voltage regulation under single-switch open-circuit fault condition, which has an inherent open-circuit fault-tolerant capability. Compared with the conventional two-phase fault-tolerant operation, the proposed strategy has a smaller output voltage ripple, lower current stress, lower current harmonic, higher maximum output power, etc. The safety and reliability of the converter are greatly improved. Finally, a 3P-IMC experimental prototype is built up to verify the performance of the proposed ASVPWM schemes.

A Hysteresis Space Vector PWM for PV Tied Z-Source NPC-MLI With DC-Link Neutral Point Balancing

The Photo-voltaic (PV) tied Z-source Neutral-point clamped multilevel inverter (Z-NPC-MLI) is used in solar grid connected applications due to its single stage conversion and better performance. Though the Z source inverters adaptation is accepted in grid connected technology, the need for suitable controller and PWM scheme are necessary to meet out the performance such as shoot through switching, neutral point balancing, and harmonic reduction. The space vector pulse width modulation (SVPWM) strategy is a prominent modulation technique for Z-source NPC-MLIs due to the flexibility to select the appropriate voltage vector. Previous publications have shown the control of a Z-source MLI using the SVPWM with and without modification of shoot through switching. However, the current controller (CC) based SVPWM is not matured, which is the most essential consideration for the grid connected inverter to provide neutral point balancing, shoot through control for low harmonic distortion and a high quality current. With all these aims, this paper presents a PV tied Z-NPC-MLI grid connected system with a unique hysteresis current control SVPWM (HSVM) strategy with neutral point (NP) balancing control and direct current control in the inverter input side. Also, the proposed HSVM is assuring the grid connection with high quality voltage and current waveforms. This CC based SVPWM for Z-NPC MLI has been validated through simulation and FPGA based experimental investigations. The results are confirmed the feasibility and reliability of the proposed HSVM for the PV tie grid connected Z- Source NPC-MLI.

Hybrid Discontinuous Space Vector PWM Strategy for Three-Level Inverters under Two-phase Loads Condition

The output performance of three-level inverters will be deteriorated under two-phase loads condition if conventional discontinuous PWM (DPWM) strategies are adopted. To solve the above issue, the amplitude and the phase angle of basic voltage vectors are modified in this article. Accordingly, sectors and triangles of the space vector diagram are reconsidered, duty cycles of basic vectors synthesized the reference vector are recalculated. And then four types of DPWM applicable for two-phase load are put forward. Although the harmonic distortion of the output waveform is reduced, discontinuous intervals are not optimum distributed. To further improve the output waveform quality, the amplitude of average current ripple vector is introduced as the evaluation index to redistribute discontinuous intervals of phase voltage in each fundamental period. Then, a hybrid DPWM strategy is presented and the harmonic distortion of the output waveform is minimized. Meanwhile, the neutral-point voltage ripple and the switching loss are also suppressed. The effectiveness of the hybrid DPWM strategy is verified by both simulation and experimental results.

A Four-Switch Five-Level Inverter

This article introduces a new single-phase five-level inverter with reduced switch count, composed by a coupled-inductor, four switches, and two diodes. Its detailed analysis is provided, including a space-vector pulsewidth modulation strategy and design of its components. Compared with the conventional three-level neutral-point clamped (NPC) inverter, the introduced converter generates an output waveform with five levels, while having the same number of devices. In addition, the topology uses less components and has lower conduction losses than other existing five-level inverters. The reduced number of devices leads to a fewer number of gate drives, decreasing the cost and complexity of the system. Simulation and experimental results validate the theoretical analysis of the introduced inverter.

Research for a three‐level T‐type grid‐connected converter based on the simplified three‐level SVPWM modulation scheme and neutral‐point potential balancing

ABSTRACTT‐type pulse width modulation controlled three‐level circuit is the mainstream topology in current medium power distributed PV inverters, charging station and active power filter system with the advantages of high equivalent switching frequency, high efficiency, small filter inductance and small grid current harmonic. Aiming at the inherent problems of midpoint voltage fluctuation and complex of the traditional three‐level space vector pulse width modulation (SVPWM) scheme of a three‐level T‐type rectifier, a new equivalent method of SVPWM strategy used in three‐level converter based on acting time equivalence was proposed, which needs no trigonometric function, irrational operation, and complex coordinate transformation. By the means of rotating the target vector in other sectors to the first sector, the dwell time of vectors can be calculated by the unified formula, and the formula for calculating the dwell time is deduced based on two levels SVM. Then, the control problems of the neutral‐point voltage balance in T‐type three‐level converter topology are analyzed and studied. Through the PI control of electric charge of one capacitor, the neutral‐point voltage can be kept to be half of the DC supply voltage stably. To verify the correctness and effectiveness of the proposed control strategy, a complete simulation model and experimental prototype platform under the digital control is established. The results show that the implementation of this method is very simple and it could decrease calculation error and keep the neutral point potential balance, which makes the results more accurate. © 2020 Institute of Electrical Engineers of Japan. Published by Wiley Periodicals LLC.

An Overmodulation Strategy for Matrix Converter Under Unbalanced Input Voltages

In this article, an improved space vector pulsewidth modulation strategy for matrix converter is proposed under unbalanced input voltages. First, to obtain the higher output voltage, two novel space vector pulsewidth modulation strategies based on the linear superimposition principle are presented by modifying the magnitude of the reference output voltage and the reference input current vectors. Second, in order to evaluate the performance of the proposed strategy, the harmonic characteristics of the input currents and output voltages are quantitatively analyzed by employing the double Fourier integral transform method. The novelty of this article lies not only in the modification of a conventional space vector pulsewidth modulation strategy for a higher output voltage under unbalanced input voltages, but also in a quantitative analysis that accurately evaluates the overmodulation performance with input unbalance using the double Fourier integral transform approach. Finally, the performance of the proposed strategy and the correctness of the harmonic analysis method are verified by the comprehensive simulation and experimental results for matrix converters.