This paper presents a new advanced bus-clamped space vector pulsewidth modulation (SVPWM) technique to reduce line current harmonic distortion as well as switching loss. The proposed sequence introduces multiple division of active vector time (MDAVT) in a subcycle. An analysis of optimal subdivision of active vector dwell time is presented. Existing bus-clamping pulsewidth modulation techniques use double-switching clamping sequences, which use only one zero state and apply an active vector twice in a subcycle. The proposed MDAVT-based SVPWM technique presents a hybrid SVPWM technique. The additional switching is added when the fundamental voltage crosses zero. The switching patterns for the other two phases are not changed. The harmonic performance and switching loss characteristics of the proposed hybrid SVPWM techniques over the existing SVPWM is verified with experimental results on a 415-V, 2.2-kW induction motor drive.
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