Space Vector PWM Algorithm Research Articles

Dynamic and Adjustable New Pattern Four-Vector SVPWM Algorithm for Application in a Five-Phase Induction Motor

In order to improve the Direct Current (DC) bus utilization ratio and realize harmonic suppression of a five-phase induction motor, the SVPWM (Space Vector Pulse Width Modulation) algorithm was researched in depth. Based on an analysis of the present SVPWM algorithm and the volt-second balance principle, a dynamic and adjustable new pattern four-vector SVPWM algorithm was proposed. The algorithm uses the modulation index and zero vector to improve the characteristics of the inductor motor, the function relationship with real-time dynamic ratio between the action–time ratio of the space voltage vector and the modulation index was proposed to maximize DC bus utilization ratio, and the random zero-vector dynamic modulation mode was used to reduce harmonic influence, being able to spread harmonics concentrated around certain frequencies across a wider frequency band and thus produce a more continuous and uniform power spectrum. The new algorithm model was built using Matlab/Simulink, and the simulation and experimental results demonstrated that the algorithm is effective and feasible.

Novel space vector PWM technology with lower common‐mode voltage for dual three‐phase PMSM

Pulse width modulation (PWM) converters generate switching common-mode voltages (CMV) across the load terminals. These voltages cause common mode currents, leading to bearing failure in motor loads and electromagnetic interference problems. This study proposes a novel space vector PWM strategy to reduce the CMV in the dual three-phase permanent magnet synchronous motor (PMSM) driven by two-level six-phase inverter. The novel space vector PWM algorithm discards the use of zero vectors. Firstly, the two largest voltage vectors of each sector are selected as main vectors to synthesise reference vector. Then, three groups voltage vector, which are opposite to the main vectors, have been selected as auxiliary vectors. Appropriate auxiliary vector selected is based on the length of zero voltage vector working time. Next, zero vector working time is distributed to the main and selected auxiliary vectors based on voltage-second principle. In addition, CMV and the harmonic component in z1z2 subspace of the proposed space vector PWM are analysed in detail. Finally, the expected CMV reduction to one-sixth of DC voltage and change rate of CMV in each cycle promised by the proposed novel space vector PWM are demonstrated with simulation and experimental results.

A Novel Method Simulating Human Eye Recognition for Sector Judgement of SVPWM Algorithm

The conventional space vector pulse width modulation (SVPWM) algorithm is mature and widely used in the control of three-phase inverters. As we know, the position of the voltage vectors can be seen directly by human eyes, which can be used to replace the existing way for sector selection in the conventional SVPWM algorithm. Based on the fact, a novel method simulating human eye recognition for sector selection of SVPWM is proposed in this paper. In the real application, machine can replace human eyes, and it can `see' the sector step by step in which the voltage vector is located, and immediately give the switching time of the two non-zero voltage vectors. Theoretically, it can save the running time and complexity of the SVPWM algorithm reflected in the situation that multiple inverters are connected in parallel with the number of voltage vectors being increased. The feasibility of the proposed SVPWM algorithm has been validated by both simulation and experiments, which offers the possibility of the application in the multiple or multilevel converters.

Voltage Vector Directional Control for IPMSM Based on MTPA Strategy

Space vector pulse width modulation (SVPWM) is used in motor control because of its high dynamic response and flexible control. Maximum torque per ampere (MTPA) strategy has become the most commonly used choice for internal permanent magnet synchronous motor (IPMSM). However, complicated coordinate transformations are required in the usual SVPWM algorithm and the performance of the MTPA algorithm can be affected by the parameters variation. This paper proposes a voltage vector directional control (VVDC) method based on the MTPA strategy. The inverse Park transformation is avoided in the proposed control scheme. And the proposed algorithm not only is briefer and clearer in the sector judgment process but also has lesser calculation during the duty cycle generation. In order to realize the MTPA strategy, two voltage feedback closed loops are designed to compensate for the d -axis and q -axis currents. A simple and effective multi-parameter identification method is also presented to solve the parameters variation problem. The effectiveness of the proposed method is verified by simulation and experiments.

Unified SVPWM Algorithm and Optimization for Single-Phase Three-Level NPC Converters

The high-order harmonics caused by the modulation strategy can deteriorate power quality. The harmonic characteristics of the carrier-based pulsewidth modulation are relatively fixed and difficult to optimize, while space vector pulsewidth modulation (SVPWM) has more flexibility. The unified SVPWM design method for single-phase three-level neutral-point clamped (NPC) converters is fully presented in this article. Based on the proposed unified SVPWM method, two existing traditional vector sequences are designed first, and then several advanced multisegment SVPWM algorithms are proposed. According to the particularity of the three-level NPC topology, two hybrid SVPWM algorithms are proposed to optimize harmonic performance. Moreover, the high-order harmonic characteristics and the number of switching actions are analyzed in detail for all SVPWM algorithm modes. In addition, these SVPWM algorithms are associated and unified by introducing weight coefficients of the redundant vectors. Simulation and experimental results verify the feasibility and effectiveness of the proposed SVPWM algorithms, which show that the proposed methods can optimize high-order harmonic distribution and reduce the line current harmonics.

Simplified double switching SVPWM implementation for three‐level VSI

A generalised space vector pulse width modulation (SVPWM) framework for the realisation of all double switching states with a memory-optimised method is proposed to reduce the total harmonic distortion (THD) and to provide neutral point voltage balancing for three-level NPC voltage source inverter (VSI). The proposal provides an efficient SVPWM implementationwith reduced hardware requirement and zero increase in software complexity in comparison to the existing schemes. Microcontroller analogue-to-digital converter (ADC) hardware replaces multichannel ADC and associated Field programmable gate array hardware in this proposal. The proposed method follows digital control architecture and eliminates the need to sample phase voltages separately. The proposed algorithm samples rms voltage of one phase and generates eight bit modulation index command by a suitable compensation algorithm. The implemented SVPWM algorithm takes the modulation index command value and generates phase voltage values by multiplying with the stored sine angle values. Gate pulses are generated in the proposed implementation by the hardware pulse width modulation (PWM) block and there is no need for digital-to-analogue converter. The proposed strategy is validated with a fundamental frequency of 50 Hz on a 2 KVA three-phase three-level insulated gate bipolar transistor-based VSI using low-cost PIC microcontroller. The superiority of the proposed method lies in providing an efficient three-level SVPWM implementation with reduced THD, neutral point voltage balancing, reduced hardware requirement, small lookup table and zero increase in the software computing overhead.

A Simplified 3-D NLM-Based SVPWM Technique With Voltage-Balancing Capability for 3LNPC Cascaded Multilevel Converter

The nearest level modulation (NLM)-based space vector pulsewidth modulation (SVPWM) algorithms have attracted a great deal of interest since they can provide various degrees of freedom, i.e., optimized switching sequences and adjustable duty cycles. This article proposes a simplified three-dimensional (3-D) NLM-based SVPWM algorithm in a 3-D coordinate system. Compared with the generalized two-dimensional (2-D) NLM-based SVPWM schemes, the proposed method not only provides identical degrees of freedom to optimize switching patterns and obtain adjustable duty cycles, but also presents better digital implementation and lower hardware occupancy to achieve the real-time PWM generation. In addition, based on the NLM-based principle, a method of addressing the issue of unbalanced voltages in a three-phase 3-level neutral point clamped cascaded multilevel converter (3LNPC-CMC) is introduced. The presented method possesses the optimized voltage-balancing capacity and equalizes the unbalanced inner cell and mutual cell voltages in the 3LNPC-CMC with minimum number switching transition. Finally, the whole proposed process is verified by simulation and experimental results.

Space vector PWM algorithm for a three‐level asymmetrical six‐phase motor drive

A space vector pulse-width modulation (SVPWM) algorithm for a three-level asymmetrical six-phase drive based on vector space decomposition (VSD) approach is presented in this paper. A modification in zero plane of the transformation matrix is proposed in order to meet the requirement that the realisation of sinusoidal output phase voltages can be obtained through the chosen output leg voltage space vectors. Furthermore, a method of choosing the switching sequences based on all possible one-level transitions of the leg voltages, i.e. a permutation method, is introduced. The algorithm is then validated experimentally and obtained results show that the developed method successfully achieves the desired fundamental phase voltage, although low order harmonics are present due to uncompensated inverter dead time. Last but not least, the performance of the proposed SVPWM algorithm is compared to several carrier-based PWM algorithms including in-phase disposition with ‘double min-max injection’ (PD-DI). This is a little known type of injection, which is verified to obtain identical performance as the presented multilevel algorithm.

Structure and the space vector modulation for a medium‐voltage power‐electronic‐transformer based on two seven‐level cascade H‐bridge inverters

This study presents the structure and the space vector pulse-width modulation (SVPWM) for power electronic transformer (PET) based on two seven-level cascade H-bridge (CHB) inverters. The DC links of CHB inverters are coupled with nine dual-active bridge (DAB) converters with medium-frequency transformers. The DC-link voltages are equalised with two methods - through the control of DAB voltages and through the modulation strategy applied to both CHB inverters. In the proposed SVPWM, the influence of vector sequences on predicted DC-link voltages is analysed, and the optimum vector sequence is selected to equalise them. Regardless of this, the proposed SVPWM strategy enables the proper generation of output voltage vector also in the case of DC-link voltage imbalance - the calculation of the space-vector area takes into consideration the inequality of the DC-link voltages and its influence on the lengths and positions of active vectors. To simplify the modulation algorithm, the multilevel CHB inverter is considered as a set of three-level inverters connected in series. Each of them is controlled using the same SVPWM algorithm. The proposed modulation method reuses the H-bridges with zero duty cycles determined in the initial stages of the output voltage generation process. This enables the optimal management of the DC-link voltage distribution. The experimental research was carried out on a 600 kW/3.3 kV PET. The results are presented in this study.

Design and implementation of adaptive SVPWM algorithm for multilevel inverters in renewable energy applications

This paper presents a design and an implementation of a generalized adaptive multi-objectives Space Vector Pulse Width Modulation (SVPWM) algorithm for multilevel inverters (MLIs). SVPWM is considered as an influential and resilient tool for optimizing the performance of MLIs. Innumerable objectives can be attained by the proper selection of switching times and states. The performance of MLIs can be improved, as well. Hitherto, achieving multiple objectives could be a challenging mission in the SVPWM algorithms scheming. In this paper, an objective function has been demarcated based on the weighted sum of the desired performance parameters. Then, considering this chosen objective function, the proposed algorithm nominates the optimum switching sequence from valid switching sequences. With this algorithm, the objective function can be weighted for the sake of reaching different performance parameter combinations; to outfit different applications and operating points. Furthermore, different SVPWM design cases for enhancing the operation of MLIs can be accomplished. Voltage balance over the DC-link capacitors in MLIs has been implemented, as a study case, using the proposed SVPWM. Both simulation and experimental platforms have been utilized. The results visibly illustrate the generality of the proposed algorithm, and it can improve different performance limitations of MLI such as; achieving a fast balance of the capacitors voltages with reduced power losses. The selected case study has achieved 21.62% faster voltage balance with 17.61% reduction in the power losses compared to conventional SVPWM method. Notwithstanding its straightforwardness to be implemented without complex calculations, the proposed algorithm can maintain the high operating efficiency of the MLI system for a wide range of operation.

Modified SVPWM Algorithm for Three Level VSI With Synchronized and Symmetrical Waveforms

To generate the required reference vector than triangle comparison based PWM techniques for three-level inverters the space vector based PWM (SVPWM) strategies contain broader choice of switching sequences. This space vector based PWM technique involves in various steps. These steps are computationally exhaustive. The SVPWM has been used in three phase inverter control system. The center-aligned PWM is the most effective way for the Microprocessor Control Unit implementation of the SVPWM, because it can easily generate the center aligned PWM of the multilevel inverters for generation of the signal of space vector pulse width modulation (SVPWM), this concept brings out the method. The inverter leg switching times are generated by this algorithm and middle vector switching times are centered in a sampled interval. The proposed algorithm does not require any sector identification. And it reduces the computational time as a result. The adjacent voltage space vectors are forming the small triangles it is called sectors. Multilevel converters can meet the increasing demand of power ratings and power quality associated with reduced harmonic distortion and lower electromagnetic interference. Furthermore to optimize switching waveforms, space vector pulse-width modulation algorithms offer great flexibility among them. Finally the results are verified through MATLAB/SIMULINK

Research on Energy Efficiency System of New Energy Vehicle Electric Drive

The motors of new energy vehicles adopt the built-in permanent magnet synchronous motor (PMSM) with high system efficiency. The mainstream control method of electric drive system is space vector PWM (SVPWM) algorithm. The SVPWM algorithm has higher low-order harmonic content in the low-speed segment voltage waveform, large asynchronous motor torque, and large motor iron loss, which makes the electric drive system less efficient in the low-speed segment system. This paper creatively proposes to change the modulation ratio M of the SVPWM waveform by adjusting the bus voltage, switching frequency and different control angles to reduce the harmonic content of the system to improve the overall efficiency of the electric drive system. In this paper, a theoretical model is established for the motor phase voltage harmonics, and various factors and components affecting the harmonic content are analyzed. Combined with the digital signal processor (DSP) based SVPWM vector control algorithm, the motor control SIMULINK simulation system is built. The voltage harmonic analysis of the simulation system is carried out by using the FFT tool in POWERGUI. The electric drive system bench is established for testing, the electric drive system simulation and the test bench test data are analyzed, and a clear method and means are proposed to reduce the harmonic content.

A New Direct Power Control of Three-level PWM Rectifier Based on Equivalent Space Vector

This paper analyzes basic principle of DPC of three-phase voltage-source PWM rectifier, and presents its shortcomings of high and unfixed switching frequency. On this base, it proposes the method of combining DPC and three-level voltage space vector pulse width modulation(SVPWM), which reduces and fixes switching frequency. To overcome the shortcomings of complex control and complicated calculations of traditional SVPWM algorithm, the paper proposes an equivalent three-level SVPWM algorithm of dual-carrier modulation, and in the d-q coordinates, and a control strategy of power feed forward decoupling control of traditional DPC, which realizes the dynamic decoupling of active and reactive power. The MATLAB/SIMULINK simulations verify the feasibility of this control strategy.

Space Vector Pulse Width Modulation for High-Speed Induction Motor Implemented in Nios II Softcore Processor

Abstract The purpose of the article was to present the idea of space vector pulse width modulation (SVPWM) and implementation in Nios II softcore processor. The SVPWM module was described in a classical method in hardware description language both as an independent structure and as an additional component to softcore processor. The available methods were compared, and the experiment was carried out in the laboratory to test implemented SVPWM algorithm using high-speed induction motor.

Efficient FPGA‐based real‐time implementation of an SVPWM algorithm for a delta inverter

This study proposes an efficient field programmable gate array (FPGA) implementation method of an enhanced space vector pulse width modulation (SVPWM) algorithm for a delta inverter. The overall hardware configuration of the FPGA is made graphically using the high-level Xilinx system generator (XSG) programming tools. The proposed descriptive XSG model is first evaluated by running a hardware co-simulation test. The comparative study with computer simulations performed with Simulink shows a good agreement between the results of both methods, which approves the accuracy of the proposed descriptive XSG model. Moreover, an experimental test is carried out on a laboratory prototype of the delta inverter feeding an induction machine. The obtained high quality of the load currents confirms the feasibility of the proposed enhanced SVPWM algorithm and the effectiveness of its implementation method on FPGA.

A Space Vector PWM Technique for a Three-Level Symmetrical Six-Phase Drive

A space vector pulse-width modulation (SVPWM) algorithm for a three-level symmetrical six-phase drive, based on a vector space decomposition approach, is, for the first time, presented and experimentally proven in this paper. The process how to correctly select the optimal switching sequences, based on several starting requirements and conditions for the analyzed topology, such that the output phase voltage waveforms do not contain any low-order harmonics, is explained in detail. The developed SVPWM algorithm is verified experimentally using a three-level neutral-point-clamped converter and a symmetrical six-phase induction machine. Obtained results prove the validity of the developed SVPWM algorithm. The performance of the SVPWM algorithm is compared with the corresponding carrier-based modulation strategy, and it is shown that the two techniques yield identical performance. Finally, both simulation and experimental analysis of the voltage and current total harmonic distortion (THD) are reported.

A Discontinuous Space Vector PWM Algorithm in abc Reference Frame for Multilevel Three-Phase Cascaded H-Bridge Voltage Source Inverters

Previous space vector pulse-width modulation (SVPWM) methods for a multilevel three-phase voltage source inverter (VSI) have the problems including the computational complexity to identify the location of the reference voltage vector, the memory requirements of switching states and corresponding duty ratios, or no generalized switching pulse durations of switches. These problems are related to the level number, and they become critical at a high level number. In this paper, a discontinuous SVPWM algorithm in the abc reference frame is first proposed for a multilevel three-phase cascaded H-bridge (CHB) VSI. The L -level three-phase SVPWM problem is solved based on the two-level three-phase SVPWM one. Thus, the computational complexity to determine the nearest three switching states and corresponding duty ratios is independent of the level number. Furthermore, the proposed algorithm provides a systematic approach to calculate the switching pulse durations for a multilevel three-phase CHB VSI, and the approach can be extended to different multilevel three-phase VSIs. The proposed algorithm has no memory requirement and low computational complexity. It is verified by the simulation and experimental results for a five-level three-phase CHB VSI.

A Space Vector Pulse Width Modulation for Five-Level Nested Neutral Point Piloted Converter

This paper introduces a novel five-level nested neutral point piloted (NNPP) converter and analyzes the operating principle of five-level NNPP converter. This paper presents a novel space vector pulse width modulation (SVPWM) algorithm based on gh coordinate for five-level NNPP converter. First, the common-mode voltage is reduced by choosing the appropriate redundant switching states. After that, the floating-capacitor voltage balance control strategy is presented. The appropriate switch combinations of each phase are determined by the control requirements of floating-capacitor voltages respectively and the hardware mapping method of the switching states is presented. Furthermore, the neutral-point voltage balance control strategy is presented. In order to balance the dc-link capacitor voltages, the seven-segment switching sequence is selected according to the control requirements of dc-link capacitor voltages and the neutral-point voltage regulatory factor is introduced to regulate the durations of the redundant switching states in a switching cycle. Finally, the validity of the novel SVPWM algorithm with decoupling control strategies of floating-capacitor voltages and dc-link capacitor voltages is verified by the experimental results of five-level NNPP converter under steady-state and dynamic conditions.

A Novel SVPWM Algorithm Considering Neutral - Point Potential Balancing for Three - Level NPC Inverter

For three-level inverter, complexity of control strategy and neutral-point potential imbalance problem of DC side is the bottleneck restricting its application. In order to solve the problem, a simplified implementation of three- level space vector pulse width modulation (SVPWM) considering neutral-point potential balancing is proposed in this paper. The proposed SVPWM algorithm is based on judging of three phase voltages and voltage-second balance principle, which does not need to perform the sine and cosine c alculations, and thus it is more convenient and effective than traditional SVPWM algorithm. Also, the neutral-point potential balancing can be realized conveniently and effectively. The proposed algorithm can not only effectively simplify the calculation and reduce calculation time greatly, but also achieve the same control effect as traditional SVPWM. It has certain reference significance and can be used to shorten sampling time and improve the inverter performance. Finally, the proposed SVPWM algorithm is verified by simulation and experimental results.

A Random Forest Regression Based Space Vector PWM Inverter Controller for the Induction Motor Drive

This paper presents a random forest (RF) regression based implementation of space vector pulse width modulation (SVPWM) for a two-level inverter to improve the performance of the three-phase induction motor (TIM) drive. The RF scheme offers the advantage of rapid implementation and improved prediction for the SVPWM algorithm to improve the performance of a conventional space vector modulation scheme. In order to show the superiority of the proposed RF technique to other techniques, an adaptive neuro fuzzy inference system (ANFIS) and artificial neural network (ANN) based SVPWM schemes are also used and compared. The proposed speed controller uses a backtracking search algorithm to search for the best values for the proportional-integral controller parameters. The robustness of the RF-based SVPWM is found superior to the ANFIS and ANN controllers in all tested cases in terms of damping capability, settling time, steady-state error, and transient response under different operating conditions. The prototype of the optimal RF-based SVPWM inverter controller of induction motor drive is fabricated and tested. Several experimental results show that there is a good agreement of the speed response and stator current with the simulation results which are verified and validated the performance of the proposed RF-based SVPWM inverter controller.