Source-drain Spacing Research Articles

Effect of source-drain spacing on DC and RF characteristics of 45 nm-gate AlGaN/GaN MIS-HEMTs

A report is presented of the fabrication of 45 nm-gate AlGaN/GaN MIS-HEMTs with a source-drain spacing Lsd range from 0.5 to 2.0 m on sapphire substrate. Their DC and RF characteristics have been measured. The maximum transconductance gm increased with decreasing Lsd. On the other hand, the cutoff frequency fT and maximum oscillation frequency fmax had maximum values at Lsd = 1.0 μm. The maximum values of fT and fmax were 188 GHz and 173 GHz, respectively. The reduction of fT and fmax at Lsd = 0.5 μm results from the greatly increased parasitic gate capacitance.

High‐speed and low‐noise AlInN/GaN HEMTs on SiC

AbstractA comparison of devices with different source–drain gaps has been performed on AlInN/GaN high electron mobility transistors (HEMTs) grown on SiC. The cut‐off frequency is effectively improved through shrinking source drain space and reducing gate parasitic capacitance. Our devices feature an fT of 188 GHz and fMAX of 200 GHz, which is the highest fMAX ever achieved to date for AlInN‐based HEMTs. At 10 (20) GHz, our HEMTs exhibit a low minimum noise figure Fmin of 0.62 (1.5) dB together with a high associated gain GA of 15.4 (13.3) dB. These Fmin values are among the lowest reported for deep submicrometer GaN HEMTs, and the GA are the best values so far in the literature, demonstrating the tremendous potential of AlInN/GaN HEMTs for microwave low‐noise applications.

N-Polar InAlN/AlN/GaN MIS-HEMTs

N-polar metal-insulator-semiconductor high-electron-mobility transistors (MIS-HEMTs) were fabricated from a GaN/AlN/InAlN/GaN heterostructure grown by metalorganic chemical vapor deposition on a vicinal sapphire substrate, using Si3N4 as the gate insulator. Hall measurements in van der Pauw geometry on the heterostructure showed a sheet charge density and a mobility of 2.15 × 1013 cm-2 and 1135 cm2·V-1·s-1, respectively. Resistance measurements revealed anisotropic conductivity with respect to the surface steps induced by the substrate misorientation, and the sheet resistance of the 2-D electron gas was as low as 226 Ω/□ in the parallel direction. MIS-HEMTs with a gate length of 0.7 μm and a source-drain spacing of 2.2 μm had a peak drain current of 1.47 A/mm and an on-resistance of 1.45 Ω·mm. At a drain bias of 8 V, the current- and power-gain cutoff frequencies were 14 and 25 GHz, respectively.

Strained AlInN/GaN HEMTs on SiC With 2.1-A/mm Output Current and 104-GHz Cutoff Frequency

We report on a dc/RF performance of lattice-strained AlInN/GaN high-electron mobility transistors (HEMTs) on SiC substrate. HEMT devices were fabricated with gate periphery of 2 × 150 μm with an 80-nm T-gate and ~2.5-μm source-drain spacing. Fabricated devices simultaneously demonstrated up to 2.11 A/mm with ft-ext = 104 GHz and ft-int = 113 GHz. The high performance is attributed to the combination of low Rsh ~ 230 Ω/sq (μ ~ 1079 cm2/V · s, ns ~ 2.39 × 1013 cm-2) and thin ~110-Å total barrier thickness with a short gate length. Other device parameters include Rc = 0.29 Ω · mm, Ig,leak = 27.9 μA/mm, gm,peak = 432 mS/mm, and Vth = -5.8 V. To our knowledge, this is among the highest current densities reported for any HEMT operating with a unity current gain frequency exceeding 100 GHz.

High performance AlGaN/GaN HEMTs with 2.4 μm source–drain spacing

This paper describes the performance of AlGaN/GaN HEMTs with 2.4 μm source–drain spacing. So far these are the smallest source–drain spacing AlGaN/GaN HEMTs which have been implemented with a domestic wafer and domestic process. This paper also compares their performance with that of 4 μm source–drain spacing devices. The former exhibit higher drain current, higher gain, and higher efficiency. It is especially significant that the maximum frequency of oscillation noticeably increased.

High-Power Ka-Band Performance of AlInN/GaN HEMT With 9.8-nm-Thin Barrier

We report the first CW Ka-band radio-frequency (RF) power measurements at 35 GHz from a passivated Al0.82In0.18N/GaN high-electron mobility transistor on SiC with 9.8-nm-thin barrier. This device delivered a maximum of 5.8 W/mm with a power-added efficiency of 43.6% biased at VDS = 20 V and 10% IDSS when matched for power at CW. The device was grown by metal-organic chemical vapor deposition with 2.8-?m source-drain spacing and a gate length of 160 nm. An excellent ohmic contact was obtained with an Rc of 0.62 ?·mm. The maximum extrinsic transconductance was 354 mS/mm with an IDSS of 1197 mA/mm at a VGS of 0 V, an ft of 79 GHz, and an fmax of 113.8 GHz.

DC and RF Performance Improvement of 70 nm Quantum Well Field Effect Transistor by Narrowing Source–Drain Spacing Technology

A 70 nm InAs channel quantum well field effect transistor (QWFET) fabricated by a narrowing source–drain (S/D) spacing technique was realized for future high-speed and logic applications. The S/D spacing was decreased from 3 to 0.65 µm through a simple fabrication process, which is an ameliorative redeposition ohmic technique. The drain-source current density and transconductance of the device were increased from 391 to 517 mA/mm and from 946 to 1348 mS/mm after the scaling of the S/D spacing, respectively. In addition, the current gain cutoff frequency ( fT) was also increased from 185 to 205 GHz. These results show that the easy method can effectively improve the III–V QWFET device performance for high-frequency and high-speed applications.

Full-band CMC simulations of terahertz HEMTs

High-electron mobility transistors (HEMTs) have become an important device for high frequency and low noise applications. The performance of these devices has been pushed into the range of several hundred GHz for fT. One question that has been asked is just how high a frequency can be obtained with these devices. To study this question, we have used a full-band, cellular Monte Carlo transport program, coupled to a full Poisson solver to study a variety of InAs-rich, InGaAs pseudomorphic HEMTs and their response at high frequency. We have concentrated on pseudomorphic HEMTs with the structure (from the substrate) InP/InAlAs/InGaAs/InAlAs/InGaAs, with the quantum well composed of In0.75Ga0.25As, and have studied gate lengths over the range 10–70 nm. Various source-drain spacings have also been studied, and the performance of scaled devices evaluated to determine the ultimate frequency limit. Here, the importance of the effective gate length has been evaluated from the properties internal to the device.

AlGaN/GaN MIS-HEMTs with f T of 194 GHz at 16 K

45 nm-gate AlGaN/GaN MIS-HEMTs on SiC substrates have been fabricated and their DC and RF characteristics measured at 300 and 16 K. A source-drain spacing Lsd of 1.5 µm was used to reduce parasitic resistances, which was 0.5 µm shorter than that in previous work. High cutoff frequency fT values of 156 GHz at 300 K and 194 GHz at 16 K were obtained. These fT values are about 10% higher than those of AlGaN/GaN MIS-HEMTs with an Lsd of 2 µm.

The Radiation Tolerance of Strained Si/SiGe n-MODFETs

The radiation tolerance of strained Si/SiGe n-MODFETs is investigated, using 10 keV X-rays, 63 MeV high energy protons, and 4 MeV low energy protons. The effects of radiation exposure on two major device design parameters (LSD and LG) in T-gate Si/SiGe n-MODFETs devices are examined. A strong dependence on source-drain spacing is observed for both the DC and RF characteristics. A drift-diffusion TCAD framework is used for 2-D device simulations. We believe that the low energy protons damage the SiGe/strained-Si/SiGe lattice, leading to partial strain relaxation. The conduction band-offset (CBO) of the strained SiGe/Si heterojunction is lowered leading to higher gate current leakage. The presence of radiation-induced bulk traps in the unrelaxed SiGe layers on the device behavior is also investigated.

Compound semiconductor MOSFETs

Enhancement mode, high electron mobility MOSFET devices have been fabricated using an oxide high- κ gate dielectric stack developed using molecular beam epitaxy. A template layer of Ga 2O 3, initially deposited on the surface of the III-V device unpins the GaAs Fermi level while a (Gd xGa 1−x) 2O 3 bulk ternary layer forms the highly resistive layer to reduce leakage current through the dielectric stack. A midgap interface state density of ∼2 × 10 11 cm −2 eV −1 and a dielectric constant of 20 are determined using electrical measurements.. N-channel MOSFETs with a gate length of 1 μm and a source-drain spacing of 3 μm show a threshold voltage, saturation current and transconductance of 0.11 V, 380 mA/mm and 250 mS/mm, respectively.

Enhancement mode high mobility n‐MOSFET on gallium arsenide substrate

MOS heterostructures grown by molecular beam epitaxy on III-V substrates, employing a high-κ dielectric stack (κ ≈ 20) comprising of gallium oxide and gadolinium gallium oxide have been fabricated. Mobilities exceeding 12,000 and 6,000 cm2/Vs, for sheet carrier concentration ns of about 2.5x1012 cm–2 were measured from InP and GaAs based MOSFET structures, respectively. These structures were designed for enhancement mode operation and include a 10 nm thick strained InxGa1–xAs channel layer with In mole fraction x of 0.3 and 0.75 on GaAs and InP substrates, respectively. NMOSFETs with a gate length of 1 μm and a source-drain spacing of 3 μm were fabricated. These devices show a threshold voltage of 0.11 V. The saturation current, transconductance and on-resistance were measured to be 380 mA/mm, 250 mS/mm, 4.5 Ω-mm. (© 2007 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim)

Development of GaAs-based MOSFET using molecular beam epitaxy

Enhancement mode, high electron mobility PHEMT-based metal oxide semi conductor field effect transistor (MOSFET) devices have been fabricated using an oxide high- κ gate dielectric stack developed using molecular beam epitaxy. A template layer of Ga 2 O 3 , initially deposited on the surface of the III–V device unpins the GaAs Fermi level while the deposition of a bulk ternary ( Gd x Ga 1 - x ) 2 O 3 layer forms the highly resistive layer to reduce leakage current through the dielectric stack. The use of molecular beam epitaxy allows for the control and uniformity of the oxide layers along the growth direction and deposition conditions were optimized for oxide surface morphology and interface quality. A midgap interface state density for the high- κ stack on GaAs of ≅ 2 × 10 11 cm - 2 eV - 1 and a dielectric constant of κ ≅ 20 are determined using electrical measurements. Enhancement-mode n-channel MOSFETs with a gate length of 1 μ m and a source-drain spacing of 3 μ m show a threshold voltage, saturation current, transconductance, and on-resistance of 0.11 V, 380 mA mm - 1 , 250 mS mm - 1 , and 4.5 Ω mm , respectively.

Nanofabrication of top-gated carbon nanotube-based transistors: Probing electron-electron interactions in one-dimensional systems

Carbon nanotubes are interesting for studying the remarkable electronic properties of one-dimensional (1D) quantum systems. Electron flow in such systems is not described by Fermi liquid theory—restricted dimensionality leads to the appearance of collective excitations—or Luttinger liquid behavior. Previous studies have probed Luttinger liquid behavior by tunneling into or between one-dimensional systems. We propose to extend these studies by using narrow top gates to introduce tunable tunnel barriers within nanotubes. We report on the scalable fabrication of carbon nanotube-based transistors with nanowire top gates. We have used electron-beam lithography (EBL) to create single-walled carbon nanotube (SWNT) transistors with source-drain spacings down to 200 nm and with sub-30 nm metal top gates for creating tunable tunnel barriers. The top metal gate is isolated from the nanotube by a thin aluminum oxide layer deposited by atomic layer deposition. We fabricated chips with 100 devices using multiple electron-beam lithography alignment steps and achieved overall placement better than 30 nm. The details of top-gated SWNT transistor fabrication are presented, and initial transport measurements on fabricated devices are discussed.

MBE growth and device characteristics of InAlN/GaN HFETs

InAlN/GaN heterostructure field-effect transistors (HFETs) were grown on sapphire substrates by plasmaassisted molecular-beam epitaxy. The In mole fraction in InAlN was estimated to be 0.15 from the X-ray diffraction profile. The room-temperature Hall mobility was 654 cm2/V · s, and the sheet electron density was 2.0 × 1013 cm–2. The InAlN/GaN HFET device, which had a source-drain spacing of 3 µm and a gate length of 1.5 µm, showed a good DC performance and an excellent pinch-off characteristic. The maximum source-drain current density and extrinsic transconductance were 500 mA/mm and 52 mS/mm, respectively. (© 2005 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim)

Optimization of sub-0.1-μm offset Γ-shaped gate MHEMTs for millimeter-wave applications

We examine the effects of device scaling in both vertical and lateral dimensions for the metamorphic high electron mobility transistors (MHEMTs) on the DC and millimeter-wave electrical performances by using a hydrodynamic transport model. The well-calibrated hydrodynamic simulation for the sub-0.1-μm offset Γ-gate In0.53Ga0.47As/In0.52Al0.48As MHEMTs shows a reasonable agreement with the electrical characteristics measured from the fabricated 0.1μm devices. We have calibrated all the parameters using the measurement data with various physical considerations to take into account the sophisticated carrier transport physics in sub-0.1-μm devices. Being simulated with these calibrated parameters, the optimum device performance is obtained at a source-drain spacing of 2μm, a gate length of 0.05μm, a barrier thickness of 10nm and a channel thickness of 12nm.

Fabrication of sub‐50‐nm‐gate i‐AlGaN/GaN HEMTs on sapphire

We fabricated sub-50-nm-gate i-AlGaN/GaN high electron mobility transistors (HEMTs) on sapphire and measured their DC and RF characteristics at room temperature. The fabricated HEMTs exhibited true device operation and good pinch-off characteristics down to a gate length Lg of 25 nm. For the HEMTs with a source–drain spacing Lsd of 2 μm, we obtained the Lg dependence of the cutoff frequency fT under a drain–source voltage Vds of 3 V. The peak fT was measured to be 102 GHz at Lg = 35 nm. At Lg = 25 nm, fT started to decrease due to the short-channel effect. The highest fT of 110 GHz was obtained by reducing Lsd from 2 to 1.5 μm and by increasing Vds from 3 to 4 V. (© 2003 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim)

Unpassivated AlGaN/GaN HEMTs with CW power density of 3.2 W/mm at 25 GHz grown by plasma-assisted MBE

The Ka-band power performance of unpassivated AlGaN/GaN HEMTs grown by plasma-assisted molecular beam epitaxy on 6H-SiC substrates is reported. Transistors with a gate length of 0.2 µm, source-drain spacing of 2 µm, and 100 µm periphery displayed maximum drain currents greater than 1.6 A/mm. Small signal S-parameter measurements yielded an fT of 53 GHz and fMAX of 109 GHz. Passive load pull measurements at 25 GHz of 0.2×100 µm transistors yielded a power density of 3.2 W/mm with 30% PAE and 44% drain efficiency at 1.8 dB gain compression. To the knowledge of the authors, this is the first report of RF output power above 20 GHz from MBE-grown AlGaN/GaN HEMTs.

Unpassivated AlGaN-GaN HEMTs with minimal RF dispersion grown by plasma-assisted MBE on semi-insulating 6H-SiC substrates

High electron mobility transistors (HEMTs) are fabricated from AlGaN-GaN heterostructures grown by plasma-assisted molecular beam epitaxy (MBE) on semi-insulating 6H-SiC substrates. At a sheet charge density of 1.3 × 10/sup 13/ cm/sup -2/, we have repeatedly obtained electron mobilities in excess of 1350 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> /Vs. HEMT devices with a gate length of 1μm, a gate width of 200 μm, and a source-drain spacing of 5 μm show a maximum drain current of 1.1 A/mm and a peak transconductance of 125 mS/mm. For unpassivated HEMTs, we measured a saturated power output of 8.2-W/mm continuous wave (cw) at 2 GHz with an associated gain of 11.2 dB and a power-added efficiency of 41%. The achievement of high-power operation without a surface passivation layer suggests that free surface may not be the dominant source of radio-frequency (RF) dispersion in these MBE-grown structures. This data may help discriminate between possible physical mechanisms of RF dispersion in AlGaN-GaN HEMTs grown by different techniques.

AlN/AlGaN/GaN Metal Insulator Semiconductor Heterostructure Field Effect Transistor

We present the characteristics of a novel AlN/AlGaN/GaN metal insulator semiconductor heterostructure field-effect transistor (MIS-HFET) structure with an AlN cap layer as a gate insulating layer. The gate leakage current for the AlN/AlGaN/GaN MIS-HFET was shown to be more than three orders of magnitude smaller than that for the AlGaN/GaN HFET at around -20 V gate bias. This demonstrates that the wide band gap AlN/AlGaN gate structure suppresses the gate leakage current, resulting in improved device characteristics compared with common HFETs in this study. A maximum gm of 134 mS/mm was observed at a 4 V drain-source bias of a MIS-HFET with a gate length (Lg)=0.85 µm, gate width (Wg)=57 µm, and drain-source spacing (Lds)=3 µm. A threshold voltage (Vt) of -3.06 V and a maximum channel current of 551 mA/mm were observed.