Solution-processed Indium Zinc Oxide Research Articles

Investigation of Donor-like State Distributions in Solution-Processed IZO Thin-Film Transistor through Photocurrent Analysis

The density of donor-like state distributions in solution-processed indium–zinc-oxide (IZO) thin-film transistors (TFTs) is thoroughly analyzed using photon energy irradiation. This study focuses on quantitatively calculating the distribution of density of states (DOS) in IZO semiconductors, with a specific emphasis on their variation with indium concentration. Two calculation methods, namely photoexcited charge collection spectroscopy (PECCS) and photocurrent-induced DOS spectroscopy (PIDS), are employed to estimate the density of the donor-like states. This dual approach not only ensures the accuracy of the findings but also provides a comprehensive perspective on the properties of semiconductors. The results reveal a consistent characteristic: the Recombination–Generation (R-G) center energy ET, a key aspect of the donor-like state, is acquired at approximately 3.26 eV, irrespective of the In concentration. This finding suggests that weak bonds and oxygen vacancies within the Zn-O bonding structure of IZO semiconductors act as the primary source of R-G centers, contributing to the donor-like state distribution. By highlighting this fundamental aspect of IZO semiconductors, this study enhances our understanding of their charge-transport mechanisms. Moreover, it offers valuable insight for addressing stability issues such as negative bias illumination stress, potentially leading to the improved performance and reliability of solution-processed IZO TFTs. The study contributes to the advancement of displays and technologies by presenting further innovations and applications for evaluating the fundamentals of semiconductors.

Analyzing Acceptor-like State Distribution of Solution-Processed Indium-Zinc-Oxide Semiconductor Depending on the In Concentration.

Understanding the density of state (DOS) distribution in solution-processed indium-zinc-oxide (IZO) thin-film transistors (TFTs) is crucial for addressing electrical instability. This paper presents quantitative calculations of the acceptor-like state distribution of solution-processed IZO TFTs using thermal energy analysis. To extract the acceptor-like state distribution, the electrical characteristics of IZO TFTs with various In molarity ratios were analyzed with respect to temperature. An Arrhenius plot was used to determine electrical parameters such as the activation energy, flat band energy, and flat band voltage. Two calculation methods, the simplified charge approximation and the Meyer-Neldel (MN) rule-based carrier-surface potential field-effect analysis, were proposed to estimate the acceptor-like state distribution. The simplified charge approximation established the modeling of acceptor-like states using the charge-voltage relationship. The MN rule-based field-effect analysis validated the DOS distribution through the carrier-surface potential relationship. In addition, this study introduces practical and effective approaches for determining the DOS distribution of solution-processed IZO semiconductors based on the In molarity ratio. The profiles of the acceptor-like state distribution provide insights into the electrical behavior depending on the doping concentration of the solution-processed IZO semiconductors.

The impact of nickel doping on metal-oxide network in solution-processed indium zinc oxide transistors

Solution-processed nickel zinc oxide (IZO) thin-film transistors (TFTs) are of great interest as core elements for future display technology based on the low-cost manufacture. It still remains a challenge to ensure stability in the off-current state of IZO using a dopant that is more resource-friendly than Ga in solution processing. In this study, we suggest a solution-based doping process of the IZO semiconductors with a Ni carrier suppressor and investigated the effects of Ni on their transistor operation. Owing to similar size of Ni2+ to Zn2+, an appropriate concentration of Ni partially substituted Zn sites and the strong bonding force of Ni with O reduces hydroxide groups on the surface bonded to Zn, whereas excess Ni addition rather inhibited the formation of smooth thin film. The resulting Ni-doped IZO TFT devices from an optimized Ni concentration exhibited higher performances with significantly reduced off-state currents while maintaining high on-state currents, compared to IZO TFTs. This approach enriches the current family of solution-processed metal oxide semiconductors by providing another option for resource-friendly carrier suppressor, which can contribute to the inexpensive and simple solution process for fabricating TFTs.

Low-voltage, solution-processed InZnO thin-film transistors with enhanced performance achieved by bilayer gate dielectrics

Fully solution-processed oxide thin-film transistors (TFTs) have shown a great potential in future printable electronics. However, high defect densities at the dielectric/channel interface have limited the simultaneous achievement of low operating voltage and high device performance. In this Letter, we study the effects of bilayer gate dielectrics in potential performance enhancement of solution-processed indium zinc oxide (IZO) TFTs. Several single and bilayer gate dielectrics are studied in terms of their physical and electrical properties. Compared with IZO TFTs using single-layer ZrOx gate dielectrics, optimized TFTs with ZrOx/AlOx gate dielectrics show an increase in carrier mobility and current on/off ratio by a factor of 3.5 and 27, respectively. The inner mechanisms of the performance enhancement are systematically studied, showing that the significantly improved TFT performance originates from the passivation effects of AlOx, which reduce the trap/defect states at the dielectric/channel interface by approximately an order of magnitude. With a low operating voltage of 2 V, a high mobility of over 10 cm2/V s, a subthreshold swing as low as 89 mV/dec, and a high current on/off ratio of >105, the reported devices might have a great potential in future low-cost, low-power printable electronics.

Investigation on Atomic Bonding Structure of Solution-Processed Indium-Zinc-Oxide Semiconductors According to Doped Indium Content and Its Effects on the Transistor Performance.

The atomic composition ratio of solution-processed oxide semiconductors is crucial in controlling the electrical performance of thin-film transistors (TFTs) because the crystallinity and defects of the random network structure of oxide semiconductors change critically with respect to the atomic composition ratio. Herein, the relationship between the film properties of nitrate precursor-based indium-zinc-oxide (IZO) semiconductors and electrical performance of solution-processed IZO TFTs with respect to the In molar ratio was investigated. The thickness, morphological characteristics, crystallinity, and depth profile of the IZO semiconductor film were measured to analyze the correlation between the structural properties of IZO film and electrical performances of the IZO TFT. In addition, the stoichiometric and electrical properties of the IZO semiconductor films were analyzed using film density, atomic composition profile, and Hall effect measurements. Based on the structural and stoichiometric results for the IZO semiconductor, the doping effect of the IZO film with respect to the In molar ratio was theoretically explained. The atomic bonding structure by the In doping in solution-processed IZO semiconductor and resulting increase in free carriers are discussed through a simple bonding model and band gap formation energy.

IZO Thin Film Transistor-Oriented Trap State UV Analysis Using Random Matrix

With the popularization of electronic equipment, indium zinc oxide (IZO) thin film transistor (TFT) research has become a hot spot. Due to the excellent characteristics of solution method, solution-processed IZO TFTs have seen wide applications in various fields. However, the study on the trapping state distribution of solution-processed IZO TFTs is not thorough enough, and the current research methods have limitations. Therefore, the ultraviolet (UV) analysis method is introduced for analyzing the trap state distributions. Then, the UV analysis method is optimized using the random matrix. The interface and bulk trap states are extracted, and the feature of trap states is analyzed. Experimental results show that under the proposed method, the bulk trap concentration of IZO TFTs is 1018∼1019 cm−3 eV−1, and the interface state density is 1012∼1013 cm−2V−1. They all change with wavelength. The proposed method is effective, feasible, and easy to implement. The research will make an important contribution to the preparation of high-performance IZO TFTs.

Neuromorphic Active Pixel Image Sensor Array for Visual Memory.

Neuromorphic engineering, a methodology for emulating synaptic functions or neural systems, has attracted tremendous attention for achieving next-generation artificial intelligence technologies in the field of electronics and photonics. However, to emulate human visual memory, an active pixel sensor array for neuromorphic photonics has yet to be demonstrated, even though it can implement an artificial neuron array in hardware because individual pixels can act as artificial neurons. Here, we present a neuromorphic active pixel image sensor array (NAPISA) chip based on an amorphous oxide semiconductor heterostructure, emulating the human visual memory. In the 8 × 8 NAPISA chip, each pixel with a select transistor and a neuromorphic phototransistor is based on a solution-processed indium zinc oxide back channel layer and sputtered indium gallium zinc oxide front channel layer. These materials are used as a triggering layer for persistent photoconductivity and a high-performance channel layer with outstanding uniformity. The phototransistors in the pixels exhibit both photonic potentiation and depression characteristics by a constant negative and positive gate bias due to charge trapping/detrapping. The visual memory and forgetting behaviors of the NAPISA can be successfully demonstrated by using the pulsed light stencil method without any software or simulation. This study provides valuable information to other neuromorphic devices and systems for next-generation artificial intelligence technologies.

Negative Bias Instability of InZnO-Based Thin-Film Transistors Under Illumination Stress.

In this study, we investigated the threshold voltage (Vth) instability of solution-processed indium zinc oxide (IZO) thin film transistors (TFTs) prior to and after negative bias illumination stress (NBIS) with varying carrier suppressors (Ga, Al, Hf, and Zr). Variations in electrical properties of the IZO-based TFTs as a function of carrier suppressors were attributed to the differences in metal-oxygen bonding energy of the materials, which was numerically verified by calculating the relative oxygen deficient ratio from the X-ray photoelectron spectroscopy analysis. Furthermore, the values of Vth shift (ΔVth) of the devices subjected to negative gate bias stress under 635 nm (red), 530 nm (green), and 480 nm (blue) wavelength light irradiation increased as the incident photon energy increased. IZO TFTs doped with Ga atoms demonstrated weaker metal-oxygen bonding energy compared to the others and exhibited the largest ΔVth. This result was attributed to the suppressor-dependent distribution of neutral oxygen vacancies which determine the degrees of photon energy absorption in the IZO films. Then, the ΔVth instability of IZO-based TFTs under NBIS correlated well with a stretched exponential function.

Enhancement of electrical characteristics and stability of self-patterned In\u2013Zn\u2013O thin-film transistors based on photosensitive precursors

We report a novel self-patterning method for solution-processed indium zinc oxide (IZO) thin films based on photosensitive precursors. This approach is an alternative and evolutionary approach to the traditional photoresist patterning techniques. Chelate bonds between metal ions and β-diketone compounds in ultraviolet light-exposed IZO solutions provided intrinsic photosensitivity, which resulted in a solubility difference between exposed and non-exposed regions. This difference enabled self-patterning of the IZO for thin-film transistor (TFT) fabrication. Compared with previously reported self-patterning methods based on photosensitive activators, our self-patterned IZO TFTs based on photosensitive precursors displayed excellent electrical characteristics and stability. The field-effect mobility increased from 0.27 to 0.99 cm2/Vs, the subthreshold swing decreased from 0.54 to 0.46 V/dec, and the threshold voltage shift under a positive bias stress test (1,000 s) improved from 9.32 to 1.68 V. The photosensitive precursor played a key role in these improvements permitting fewer organic species which act as defect sites after metal oxide formation. Consequently, our approach compares favorably with that of conventional fabrication process using photoresist in terms of its simplicity, cost efficiency, and electrical performance.

Primary color generation from white organic light-emitting diodes using a cavity control layer for AR/VR applications

Abstract In this paper, we report primary color generation method from white top-emission organic light emitting diodes (WTEOLEDs) by applying cavity control layer (CCL) for achieving high resolution display. In order to realize primary colors, we applied high efficiency two-stack WTEOLED structure with solution processed indium zinc oxide CCL. Using optically designed two-stack WTEOLED with CCL, we fabricated red, green, and blue TEOLEDs with current efficiency of 34.9, 79.5, and 3.4 cd/A, respectively. However, there is an issue of intense blue emission in the red color device due to its cavity condition. To suppress this blue emission, silver nanoparticles doped electron transfer layer and rubrene doped hole transport layer methods were successively used due to their high absorption in the blue region. By applying these two methods together, top-emission red device showed 80% reduction in blue color intensity.

Deep-UV-Enhanced Approach for Low-Temperature Solution Processing of IZO Transistors with High-k AlOx/YAlOx Dielectric

Solution processing is an attractive alternative to standard vacuum fabrication techniques for the large-area manufacturing of metal oxide (MOx)-based electron devices. Here, we report on thin-film transistors (TFTs) based on a solution-processed indium zinc oxide (IZO) semiconductor utilizing a deep-ultraviolet (DUV)-enhanced curing, which enables a reduction of the annealing temperature to 200 °C. The effects of the DUV light exposure and the subsequent post-annealing parameters on the chemical composition of the IZO films have been investigated using Fourier-transform infrared spectroscopy and X-ray photoelectron spectroscopy. The semiconductor layer has been combined with an high-k aluminum oxide/yttrium aluminum oxide (AlOx/YAlOx) dielectric stack to realize fully solution-processed MOx TFTs at low temperature. The IZO/AlOx/YAlOx TFTs treated for 20 min DUV followed by 60 min at 200 °C exhibited Ion/Ioff of >108, a subthreshold slope (SS) of <100 mV dec–1, and mobility (μsat) of 15.6 ± 4 cm2 V–1 s–1. Devices realized with a reduced semiconductor curing time of 5 min DUV and 5 min at 200 °C achieved Ion/Ioff of >108, a SS <100 mV dec–1, and μsat of 2.83 ± 1.4 cm2 V–1 s–1. The TFTs possess high operational stability under gate bias stress, exhibiting low shifts in the threshold voltage of <1 V after 1000 s. The DUV-enhanced approach reduces the thermal budget required for the curing of solution-processed IZO semiconductors films, paving the way for its further implementation on temperature-sensitive substrates in future.

Proton Conducting Perhydropolysilazane-Derived Gate Dielectric for Solution-Processed Metal Oxide-Based Thin-Film Transistors.

Perhydropolysilazane (PHPS), an inorganic polymer composed of Si-N and Si-H, has attracted much attention as a precursor for gate dielectrics of thin-film transistors (TFTs) due to its facile processing even at a relatively low temperature. However, an in-depth understanding of the tunable dielectric behavior of PHPS-derived dielectrics and their effects on TFT device performance is still lacking. In this study, the PHPS-derived dielectric films formed at different annealing temperatures have been used as the gate dielectric layer for solution-processed indium zinc oxide (IZO) TFTs. Notably, the IZO TFTs fabricated on PHPS annealed at 350 °C exhibit mobility as high as 118 cm2 V-1 s-1, which is about 50 times the IZO TFTs made on typical SiO2 dielectrics. The outstanding electrical performance is possible because of the exceptional capacitance of PHPS-derived dielectric caused by the limited hydrolysis reaction of PHPS at a low processing temperature (<400 °C). According to our analysis, the exceptional dielectric behavior is originated from the electric double layer formed by mobile of protons in the low temperature-annealed PHPS dielectrics. Furthermore, proton conduction through the PHPS dielectric occurs through a three-dimensional pathway by a hopping mechanism, which allows uniform polarization of the dielectric even at room temperature, leading to amplified performance of the IZO TFTs.

Solution-processed Pb0.8Ba0.2ZrO3 as a gate dielectric for low-voltage metal-oxide thin-film transistor

A solution-processed low-voltage metal-oxide thin-film transistor (TFT) is fabricated by using ferroelectric perovskite structure barium zirconate (PBZ) as gate dielectric. This PBZ thin film is deposited on heavily doped Si substrate (p++-Si) by low-cost sol-gel process followed by annealing at 830 °C. The thin film is characterized by XRD, UV-Vis absorption spectroscopy and atomic force microscopy (AFM) that reveals fully oxidized PBZ thin film is highly crystalline in nature with high optical transparency in visible region that exhibited a lower roughness of 4.6 nm. Solution-processed indium zinc oxide (IZO) has been used as a channel semiconductor for bottom-gate top-contact TFT. The fabricated device require < 5 V operating voltage to saturate with high drain current which is very beneficial for low-power electronics because of its low operating voltage with respect to convention SiO2 gate dielectric device that required ~ 40 V operating voltage. This typical TFT shows an excellent electron mobility of 4.5 cm2 V−1 s−1 with on/off ratio 5 × 103 and subthreshold swing 0.35 V/decade.

Capacitance-Voltage Characteristics Analysis of Indium Zinc Oxide Thin Film Transistors Based Ultraviolet Light Irradiation.

The mechanism of solution-processed indium zinc oxide (IZO) thin film transistors (TFTs) made by simultaneous spin coating and ultraviolet (UV) light irradiation was investigated by capacitance-voltage (C-V) measurement. The application of UV light on the IZO TFTs was found to improve the thin film surface structure, and pledge to receive low degree of roughness. Meanwhile, electrical characteristics indicated that the TFT prepared at the UV light irradiation with 90 s exhibits the best performance with field-effect mobility 5.6 cm²/Vs, threshold voltage ═ -0.13 V, subthreshold gate swing 0.64 V/decade and on/off ratio ═ 1.7 × 106. In the C-V contrastive analysis with different UV light irradiation time by 60 s and 90 s, the frequency was varied from 100 Hz to 10 kHz to investigate low as well as high frequency C-V.

Performance improvement of solution-processed InZnO thin film transistor with HfO2 vertical diffusion layer

This work introduces a solution-processed indium zinc oxide (IZO) thin-film transistor (TFT) with hafnium oxide (HfO2) vertical diffusion layer. Conventional solution-processed IZO TFTs have the disadvantages of low threshold voltage (Vth), low subthreshold swing (SS), and high off current. In this paper, we propose a stable optimized solution-processed IZO TFT with an HfO2 vertical diffusion layer. The proposed device is an IZO (0.3 M, In:Zn = 7:3) TFT with a 0.03 M HfO2 vertical diffusion layer (0.03 M Hf-diffused IZO TFT), which exhibits superior electrical performance with a saturation mobility of 0.46 cm2 / V∙s, ION/OFF ratio of 6.31 × 105, Vth of 3.04 V, and SS of 0.48 V/decade. X-ray photoelectron spectroscopy is performed to compare the O 1 s peaks of the conventional IZO TFT and the optimized device. Bias stability tests confirm that the proposed optimized device is more stable than the conventional IZO TFTs.

Effect of strontium doping on indium zinc oxide thin film transistors fabricated by low-temperature solution process

Solution-processed metal oxide semiconductors for thin film transistors (TFTs) require high-temperature annealing to improve the electrical performance. On the other hand, a high-temperature process cannot be applied to flexible substrates, which is an obstacle preventing the application of MOS films to flexible devices. This paper reports a simple method for improving the electrical characteristics of low-temperature solution-processed indium zinc oxide (IZO) TFTs with strontium (Sr)-doping and vacuum annealing. The addition of Sr to the IZO thin film decreased the density of oxygen vacancies due to the strong bonding energy of Sr with oxygen ions and improved the electrical stability of the IZO TFTs. On the other hand, vacuum annealing increased the number of oxygen vacancies in the IZO film resulting from the low oxygen partial pressure, which led to an increase in carrier concentration. By combining these two methods, Sr-doped IZO TFTs with a high field-effect mobility of 8.75 cm2 V−1 s−1 at 2 mol. % of Sr doping were fabricated.

Capillary-Force-Pattern Formation of Indium-Zinc-Oxide Thin-Film Transistor.

Studies of the pattern-formation technique used with solution-processed oxide thin-film transistors (TFTs) continue to explore its uses as an efficient manufacturing method. However, research remains to be completed to achieve high performance and to apply the refined technique to various current industrial technologies. We studied the patterning technique of solution-processed indiumzinc-oxide (IZO) by using the capillary-force phenomenon, the method of controlling the pattern of the IZO semiconductor layer, and approaches to reducing problems such as the cracking that occurs during patterning. The device we fabricated was filled uniformly with droplets in the capillary-force pattern. It showed a high current-on/current-off ratio, high mobility, low threshold voltage, and low subthreshold slope. Consequently, this paper demonstrates a strategy that uses the capillary-forcepattern technique to exceed the performance of traditional fabrication techniques in managing the electrical properties of solution-processed oxide TFTs.

Improving Thermal Stability of Solution-Processed Indium Zinc Oxide Thin-Film Transistors by Praseodymium Oxide Doping.

Praseodymium-doped indium zinc oxide (PrIZO) channel materials have been fabricated by a solution process with conventional chemical precursor. The PrIZO-based thin-film transistors (TFTs) exhibited a field-effect mobility of 10.10 cm2/V s, a subthreshold swing value of 0.25 V/decade, and an Ion/ Ioff ratio of 108. The as-fabricated PrIZO-TFTs showed an improved device performance against positive bias temperature stress (PBTS shift of 1.97 V for 7200 s), which was evidently better than the undoped IZO-TFTs (PBTS shift of 9.52 V). This result indicates that the organic residual (-OCH3 and -CH2-) in metal-oxide semiconductor, which is confirmed to be a dominant effect on the performance of PBTS, can be passivated by the rare earth of praseodymium element. The residual is intended to be oxidized with a more stable ester group with the assistant of PrOx, weakening the electron-withdrawing characteristic during the thermal bias stress.

Effects of Pre-annealing on the Performance of Solution-processed Indium Zinc Oxide Thin-film Transistors

We report on thin-film transistors (TFTs) with indium zinc oxide (IZO) channel layers fabricated via a pre-annealing process at various temperatures. The solution-processed IZO semiconductor matched the pre-annealing well at temperatures as low as 120 °C, and showed good performance: field-effect mobility of 7.9 ㎠/Vs, threshold voltage of 1.4 V, subthreshold slope of 0.48 V/dec, and a current on/off ratio of 2.9 x 10SUP7/SUP. To investigate the static response of IZO TFTs with preannealing at 120 °C, simple resistor load–type inverters were fabricated by connecting a resistor (10 MΩ).

Modeling drain current of indium zinc oxide thin film transistors prepared by solution deposition technique

Indium zinc oxide (IZO) thin film transistor (TFT) deposited by solution method is of considerable technological interest as it is a key component for the fabrication of flexible and cheap transparent electronic devices. To obtain a principal understanding of physical properties of solution-processed IZO TFT, a new drain current model that account for the charge transport is proposed. The formulation is developed by incorporating the effect of gate voltage on mobility and threshold voltage with the carrier charges. It is demonstrated that in IZO TFTs the below threshold regime should be divided into two sections: EC − EF > 3kT and EC − EF ≤ 3kT, where kT is the thermal energy, EF and EC represent the Fermi level and the conduction band edge, respectively. Additionally, in order to describe conduction mechanisms more accurately, the extended mobility edge model is conjoined, which can also get rid of the complicated and lengthy computations. The good agreement between measured and calculated results confirms the efficiency of this model for the design of integrated large-area thin film circuits.