Solid Phase Epitaxial Si Research Articles

Aluminum-induced iso-epitaxy of silicon for low-temperature fabrication of centimeter-large p+n junctions

Aluminum-induced crystallization of Si is achieved on crystalline Si substrates in a manner that produces near-ideal p+n diodes for centimeter large sizes. A layer-stack of physical-vapor-deposited materials, amorphous Si on aluminum, is inverted at an anneal temperature of 400°C to form a monocrystalline p-doped Si layer by solid-phase epitaxy (SPE). The stages of the crystallization process are been reviewed here and studied with respect to the filling of the large-area SPE Si layers. It is shown that a complete iso-epitaxy coverage of large areas is possible if the starting c-Si substrate is free of nucleation centers. This can be achieved by appropriate wet-etching of the oxide to the Si followed by diluted HF dip-etching and Marangoni drying before deposition of the Al mediator layer and α-Si layer. Near-ideal p+n diodes have been fabricated at 400°C with areas up to 1×1cm2, having ideality factors down to 1.02 and low leakage currents of a few nA/cm2. From temperature-dependent measurements it can be concluded that the dominant origin of the leakage current is from ideal diffusion over the depletion regions and not from defect-related generation–recombination currents. The full coverage by p+ SPE-Si is confirmed by material analysis.

Accurate SIMS Doping Profiling of Aluminum-Doped Solid-Phase Epitaxy Silicon Islands

A procedure has been implemented for a quantitative aluminum-doping profiling of µm-scale aluminum-induced solid-phase-epitaxy (SPE) Si islands formed at 400°C. The aluminum concentration was measured to be 1–2×1019 cm?3, which is about 10 times higher than previously reported electrical activation levels. The elemental concentration was measured by secondary-ion-mass-spectroscopy (SIMS) on arrays of SPE Si islands grown by a recently developed process that allows control of the island geometry.

Low-Temperature Solid-Phase Epitaxy of Defect-Free Aluminum p+-doped Silicon for Nanoscale Device Applications

ABSTRACTA solid phase epitaxy (SPE) technique was developed to grow p+ aluminum-doped crystalline Si in a fully CMOS compatible process. This paper describes the experimental conditions leading to the selective growth of nanoscale single crystals where the location and dimensions are well controlled, even in the sub-100 nm range. The SPE Si crystals are defined by conventional lithography, show excellent electrical characteristics, and are uniform over the whole wafer. Fifty nanometer thick p+ SPE Si crystals were used to fabricate p+-n diodes and p+-n-p bipolar junction transistors. The high quality of the SPE Si and the remarkable control of the whole process, even in the sub-100 nm range, make this module directly usable for Si-based nanodevices.

Minority carrier lifetime and diffusion length in Si 1− x− yGe xC y and Si 1− yC y heterolayers

The minority carrier lifetime and diffusion length in partially strain-compensated Si 1− x− y Ge x C y ternary alloys or tensilely strained Si 1− y C y layers have been measured by using capacitance–time ( C– t) transient technique. The substrate doping ( N B) of molecular beam epitaxy (MBE) grown Si 0.835Ge 0.15C 0.015 films and solid phase epitaxial Si 0.99C 0.01 films was found to be approximately 1×10 17 cm −3 which has been extracted from high frequency capacitance–voltage ( C HF– V G) characteristics of MIS capacitors fabricated using SiO 2 and ZrO 2 films on Si 0.99C 0.01 and Si 0.835Ge 0.15C 0.015, respectively. Minority carrier lifetimes of Si 0.835Ge 0.15C 0.015 and Si 0.99C 0.01 films are found to be 2.4×10 −6 and 9.2×10 −9 s, respectively. The average values of the diffusion length were found to be 27 and 3 μm for Si 0.835Ge 0.15C 0.015 and Si 0.99C 0.01 films, respectively.

Defects in amorphous and solid phase epitaxial silicon

The microstructural morphology of amorphous Si (a-Si) layers deposited in ultrahigh vacuum, as well as crystalline Si grown by solid phase epitaxy (SPE), was studied as a function of Al doping and vapour beam incidence angle. The microstructure of the films was investigated using cross-section transmission electron microscopy. All a-Si layers have a columnar structure, with an average column width of ⩽ 5 nm. The direction of the columns abruptly changes with the change of deposition direction and shows local column tilts and void formation at substrate surface irregularities. These built-in defects in the a-Si films also influence the defect structure in epitaxial Si films grown by SPE. Voids are initially aligned along the column directions and extra voids form owing to irregularities of the columnar structure. Doping of amorphous Si with Al to 10 18−10 20 cm −3 does not leave detectable effects in the amorphous structure itself, but will increase the void density of the re-grown SPE Si layers. Furthermore, segregation of Al resulting in metallic inclusions in the amorphous crystalline interface causes metal induced crystallization of Si at temperatures far below the normal SPE regrowth temperature, thus preventing the formation of single crystalline silicon in a single-step process.

Structure of (√3×√3) R 30°-B at the Si interface studied by grazing incidence x-ray diffraction

The boron-induced ( 7/8 × 7/8 )R30° reconstruction at the Si interface has been investigated by grazing incidence x-ray diffraction. The in-plane projected struture is found from the structure factors near zero perpendicular momentum transfer. At the a-Si/Si (111) interface, boron atoms at 1/3 ML are substituted for silicon atoms, thus forming a ( 7/8 × 7/8 )R30° lattice and the boronsilicon bond is contracted compared with the siliconsilicon bond. Even at the interface between a solid phase epitaxial Si (111) layer and a Si (111) substrate, the boron-induced ( 7/8 × 7/8 )R30° reconstruction has also been observed and the structure is similar to that observed at the a-Si/Si (111) interface.

Si-gate CMOS devices on a Si lateral solid-phase epitaxial layer

Si-gate CMOS devices fabricated on a lateral solid-phase epitaxial Si layer grown from vacuum-deposited amorphous Si over SiO/sub 2/ patterns are discussed. Electrical characteristics are examined and correlated with microstructural characteristics of the layer by performing transmission electron microscopy on actual transistors. The layer can be divided into three regions. Carrier mobilities obtained from each region are discussed in terms of the crystalline quality. The maximum obtained field-effect mobilities are 570 cm/sup 2//V-s and 160 cm/sup 2//V-s for n-channel and p-channel transistors, respectively. The SMOS inverter chain with 100 stages and a channel length of 1.5 mu m has a delay time of 310 ps per gate. These results indicate that the lateral solid-phase epitaxy has potential for the fabrication of high-speed silicon-on-insulator devices. >

Interfacial Superstructures Studied by Grazing Incidence X-Ray Diffraction

ABSTRACTSurface superstructures (reconstructed structures) have been observed by many authors. However, it is not easy to confirm that a superstructure does exist at an interface between two solid layers. The present paper reports a direct observation, by a grazing incidence x-ray diffraction technique with use of synchrotron radiation, of superstructures at the interface. Firstly, the boron-induced R30° reconstruction at the Si interface has been investigated. At the a Si/Si(111) interface, boron atoms at 1/3 ML are substituted for silicon atoms, thus forming a R30° lattice. Even at the interface between a solid phase epitaxial Si(111) layer and a Si(111) substrate, the boron-induced R30° reconstruction has been also observed. Secondly, SiO2/Si(100)-2×l interfacial superstructures have been investigated. Interfacial superstructures have been only observed in the samples of which SiO2 layers have been deposited with a molecular beam deposition method. Finally, the interfaces of MOCVD-grown AIN/GaAs(100) have been shown to have 1×4 and 1×6 superstructures.

High Resolution Tem Studies of Solid-Phase Epitaxial Si at Contact Holes Through Al-Si Alloy

High Resolution Tem Studies of Solid-Phase Epitaxial Si at Contact Holes Through Al-Si Alloy

Effects of Substrate-Surface Cleaning on Solid Phase Epitaxial Si Films

The effects of two substrate-surface cleaning procedures were studied for solid-phase epitaxy of chemical vapor deposited amorphous Si (a-Si) films with respect to crystalline quality. These a-Si films were deposited on Si (100) wafers after surface cleaning by HF-dipping or in-reactor gas etching. The a-Si films were then crystallized by furnace annealing. The film quality was estimated using several techniques, such as etch-pit density measurements. For the samples etched by HF-dipping, the film crystallinity became worse with increasing film thickness owing to a residual oxide layer at the deposited-film/substrate interface. As a result, the electron mobility decreases with increasing deposited film thickness. For in-reactor gas-etched samples, the residual at the interface was negligible, and the crystallinity of a SPE film was as good as that of bulk Si.

Enhancement of Lateral Solid Phase Epitaxial Growth of Si on SiO2 with 31P Implantation

AbstractThe lateral solid phase epitaxial growth of amorphous Si on SiO2 patterns with 31P implantation is studied. By implanting 31P into only the surface region of the sample to form a doped channel, the Si growth rate is enhanced and the random crystallization of Si is suppressed. The maximum length of lateral solid phase epitaxial Si obtained from samples with the doped channel (∼9μπι) is a factor of 3 more than that of the undoped sample. This Si on SiO2 film has a low dopant concentration after the highly doped channel is removed and should be useful for device application.

Crystalline defects in solid phase epitaxy Si films deposited at elevated temperatures

Si layers deposited on Au-Si substrates at temperatures above 380 °C are epitaxial with the underlying Si substrate. The layers analyzed contain a high density of microtwins which is the main factor resulting in dechanneling in the aligned RBS spectrum. The deposited layers also contain stacking faults and residual Au inclusions adjacent to primary twins.

The distribution of gold and oxygen in solid phase epitaxy Si films

Silicon films deposited on Au/Si layers at deposition temperatures at or above 380 °C are single crystal, while Si films deposited on Si with a native oxide are amorphous up to 500 °C and ordered polycrystalline above 500 °C. The initial gold (300 Å) deposit migrates to the growing epitaxy surface where it nucleates in clusters. RBS and AES analysis indicated that 0.1 at.% gold remains distributed throughout the epitaxial film.