SOI PIN Diodes Research Articles

Modeling of Thin-Film Lateral SOI PIN Diodes with an Alternative Multi-Branch Explicit Current Model

We propose the use of an alternative multi-exponential model to describe multiple conduction mechanisms in thin-film SOI PIN diodes with parasitic series resistance over a wide operating temperature range, from 90 to 390 K. This alternative multi-exponential model can be used for semiconductor junctions which exhibit multiple conduction mechanisms with series and shunt resistances. Using Thevenin’s theorem and the Lambert W function, the terminal current is expressed explicitly as a function of the terminal voltage. Its explicit nature allows higher computational efficiency and makes this model better suited for repetitive simulation applications than conventional implicit models. Additionally, direct analytic differentiation and integration are possible. This alternative model is used to describe the I-V characteristics of real SOI PIN diodes.

Thin-Film Lateral SOI PIN Diodes for Thermal Sensing Reaching the Cryogenic Regime

This paper presents the performance of lateral SOI PIN diodes for temperature sensing in the range of 100 K to 400 K. Experimental results indicate that PIN diodes can be used to implement temperature sensors with high accuracy in cryogenic regime, provided that a suitable temperature range is chosen for calibration. Numerical simulations using Atlas two-dimensional simulator were performed in order to confirm this hypothesis and extend the analysis, verifying the accuracy of the existing model.

Fast recovery SOI PiN diode with multiple trenches

In this paper, a 500V SOI PiN lateral diode is proposed and investigated by simulations and experiments. The proposed structure features multiple deep-oxide trenches (MDOT) arranged in the silicon region. Two DOTs (T1 and T2) locating in the i-layer help to block the cathode-anode voltage (VCA), allowing the diode to shorten its i-layer length. With a similar breakdown voltage (BV) of 560V, the i-layer length is shortened from 47 μm for the conventional diode to 21.9 μm for the proposed MDOT diode. The shortened i-layer leads to a reduced number of stored carriers in the i-layer. Another DOT (T3) is inserted at the anode region of proposed MDOT diode and shorted with P+ anode. T3 acts as a vertical field plate, reshaping the electric potential distribution at the anode region and accelerating the depletion during the reverse recovery process. Thanks to the decreased number of the stored carriers and the accelerated depletion, the reverse recovery time (trr) of the proposed MDOT diode (211 ns) can be decreased by 56.7% compared with the conventional diode (487 ns) at the forward current density of 400 A/cm2 at T = 300 K. The proposed MDOT diode exhibits a better trade-off between forward voltage drop (VF) and reverse recovery time (trr) than the conventional and other reported diodes.

Analytical model for thin-film SOI PIN-diode leakage current

An analytical model for the thin-film silicon-on-insulator pin-diode leakage current is presented. Particularly the back-gate potential influence on the leakage current is addressed. The two-dimensional Poisson equation is simplified and then solved including the influence of the back-gate potential. Subsequently the analytical model is verified by comparison with numerical simulation and measurements. For the verification of the model the dependence on the back-gate potential, reverse voltage, device geometry, doping concentration and -polarity is considered. In this procedure the interface recombination velocity is used as fitting parameter. The model verification shows an accurate modeling of the leakage current at full depletion in combination with a back-gate potential dependence. The usage of the model is limited to back-gate and reverse potentials close to full depletion state of the pin-diode.

Approximate analytical expression for the tersminal voltage in multi-exponential diode models

We propose a simple approximate solution for the terminal voltage as an explicit function of the terminal current for diodes which need to be modeled by two or more ideal diodes in parallel. As a result, this solution is better suited for repetitive simulation applications than conventional implicit equations because of its inherently higher computational efficiency. Its explicit nature also makes direct analytic differentiation and integration possible. The approximate solution’s applicability has been assessed by parameter extraction and subsequent playback using measured I–V characteristics of lateral thin-film SOI PIN diodes and also using synthetic I–V characteristics of a solar cell.

Characterization of Thin-Film SOI PIN Diodes from Cryogenic to Above Room Temperatures Using an Explicit I-V Multi-Branch Model

A multi-branch model is proposed to describe multiple conduction mechanisms in thin-film SOI PIN diodes with parasitic series resistance over a wide operating temperature range, from 90 to 390 K. The model is composed of the parallel combination of three branches, each of them incorporating a diode and a series resistance. The model's unique advantage is its explicit nature which allows the terminal current to be continuously expressed as an explicit analytical function of the applied terminal voltage. The resulting explicit equation is convenient for repetitive simulation applications as well as for analytic differentiation and integration, in contrast to conventional models which only allow numerical solutions. The model's suitability has been assessed by parameter extraction and subsequent playback on real SOI PIN diode forward I-V characteristics.

Analysis of Lateral SOI PIN Diodes for the Detection of Blue and UV Wavelengths in a Wide Temperature Range

This work presents an analysis on the performance of lateral thin-film SOI PIN diodes for the detection of short wavelengths, in the range of blue and ultra-violet (UV) wavelengths, as a function of the temperature, reaching the cryogenic regime. Measurements performed for temperatures ranging from 100 K to 400 K showed that the optical responsitivity of these photodetectors is affected by temperature change, being reduced at low and moderately high temperatures. Two-dimensional numerical simulations were performed showing the same trends as the experimental data, and were used to predict the influence of silicon film thickness downscaling on the photodetector performance.

Physical modeling of millimetre wave signal reflection from forward biased PIN diodes

This paper examines the DC power requirements of PIN diodes which, with suitable applied DC bias, have the potential to reflect or to permit transmission of millimetre wave energy through them by the process of inducing a semiconductor plasma layer in the I region. The study is conducted using device level simulation of SOI and bulk PIN diodes and reflection modeling based on the Drude conduction model. We examined five diode lengths (60–140μm) and seven diode thicknesses (4–100μm). Simulation output for the diodes of varying thicknesses was subsequently used in reflection modelling to assess their performance for 100GHz operation.It is shown that substantially high DC input power is required in order to induce near total reflection in SOI PIN diodes at 100GHz. Thinner devices consume less DC power, but reflect less incident radiation for given input power. SOI diodes are shown to have improved carrier confinement compared with bulk diodes.

Analysis of geometric charge-pumping components in a thin-film SOI device

A numerical analysis of the charge-pumping experiment in thin-film SOI pin-diodes is presented. The approach is based on the self-consistent two-dimensional numerical solution of the time-dependent semiconductor equations including the interface trap dynamic equations, which are solved for interface traps on the front and on the back interface of the SOI device. We can identify two distinct mechanisms of parasitic recombination on the back interface which show up for steep edges of the front gate pulse train. The influence of accumulation or inversion of the back interface on the appearance of these parasitic effects is analyzed numerically and comparisons of simulation results with measurement data are shown.