Slow Trap Research Articles

Tuneable electrical properties of hafnium aluminate gate dielectrics deposited by metal organic chemical vapour deposition

Hafnium aluminate (HfAlO) high- k films deposited by Metal Organic Chemical Vapour Deposition (MOCVD) with various Al concentrations were investigated. The results of electrical measurements show the feasibility of adjusting the relative dielectric constant of the layers in a wide range (9–16), when the aluminium concentration varies between 4% and 38%. The minimum leakage current occurs for Al concentrations up to 9%. The thinner films show Poole–Frenkel-like conduction at low field and Fowler–Nordheim-like conduction at moderate/high field, even at higher concentrations of Al into the film, while thicker films show a higher hysteresis due to an increased number of slow trapping centres in the film.

Elevation of Melting Temperature for Confined Palmitic Acid inside Cylindrical Nanopores

High resolution 13C nuclear magnetic resonance was employed to study the phase behavior of the amphiphilic long-chain palmitic acid (PA) confined inside the cylindrical nanopores in the matrix of titanate nanotubes. For a series of mixtures of titanate nanotubes and palmitic acid at various mass ratios, it was shown that annealing at the bulk melting temperature (approximately 335.5 K) of PA induced fast chemisorption of PA on the nanotube surface followed by slow physical trapping of PA into the cylindrical nanopore. It was found that the trapped PA remained solidlike substantially above the bulk melting temperature. Contrary to the bulk neat PA, for the trapped PA, the isotropic molecular-chain reorientation was shown to remain arrested even above the bulk melting temperature. When destabilized at approximately 349 K, the trapped PA deserted the nanopore and formed bulk PA, which could be retrapped into the nanopore upon annealing at the bulk melting temperature. The entire process was shown as reversible.

Trapping in deep defects under substrate hot electron stress in TiN/Hf-silicate based gate stacks

Substrate hot electron stress was applied on n+-ringed n-channel MOS capacitors with TiN/Hf-silicate based gate stacks to study the role of O vacancy induced deep bulk defects in trapping and transport. For the incident carrier energies above the calculated O vacancy formation threshold, applied on MOS devices with the thick high-κ layer, both the flatband voltage shift due to electron trapping at the deep levels and the increase in leakage current during stress follow tn (n≈0.4) power law dependence. Negative-U transitions to the deep levels are shown to be possibly responsible for the strong correlation observed between the slow transient trapping and the trap-assisted tunneling.

Effects of ambient conditions in thermal treatment for Ge(0 0 1) surfaces on Ge–MIS interface properties

Effects of thermal treatment under various ambient conditions for Ge(0 0 1) substrates on MIS interface properties have been investigated. Ge–MIS capacitors with Al gates have been fabricated by depositing SiO2 layers on thermally treated Ge surfaces. We characterized the interface structures by transmission electron microscopy, x-ray photoelectron spectroscopy and C–V, G–F (conductance–frequency) measurements. It is found that the ambient conditions significantly change the MIS interface structures and, thus, the interface trap density. As a result, the thermal treatment under O2 ambient condition is very effective at decreasing the interface trap density and the slow trap density as well. This decrease in the interface traps is attributable to the reduction in dangling bonds by forming stoichiometric GeO2 at the MIS interfaces.

Investigation of optical and electronic properties of hafnium aluminate films deposited by Metal–Organic Chemical Vapour Deposition

Alloying elemental high-k metal oxides (such as HfO 2) with other metals is seen as an effective method of controlling the properties of the dielectric based on the concentration of cations in the mixture; in particular, mixing HfO 2 with Al 2O 3, and forming hafnium aluminate layers which will still have a relatively high dielectric constant (typically k ∼ 15) and remain amorphous up to high processing temperatures. This paper summarizes the results of physical and electrical characterisation of hafnium aluminate (HfAl x O y ) films prepared by Metal–Organic Chemical Vapour Deposition. We show how, using ultraviolet–visible, single angle ellipsometry, the thickness and composition of the deposited and of the transition/interfacial layers can be extracted, and further used for the estimation of the relative dielectric constant. Moreover, a methodology for extracting the band gap of these materials and its dependence on the aluminium concentration is presented. This has been achieved by using a simple parameterization model (Wemple–Di Domenico) to account for the optical dispersion of the films. Preparing thin films with a relatively high dielectric constant and with an amorphous structure even at high processing temperatures, are not the only requirements to be achieved when such layers are to be used as gate dielectrics. The electrical characteristics – such as leakage current, density of interface states, fixed charge in the oxide – are extremely important. The results obtained through capacitance–voltage and current–voltage measurements show the possibility of adjusting the relative dielectric constant of the layers in a wide range (9–16), when the aluminium concentration varies between 4% and 38%. The minimum leakage current occurs for Al concentrations up to 9%. The thinner films show Fowler–Nordheim conduction even at higher concentrations of Al into the film, while thicker films show a higher hysteresis due to an increased number of slow trapping centres in the film.

Interfacial Properties of SiO<sub>2</sub> Grown on 4H-SiC: Comparison between N<sub>2</sub>O and Wet O<sub>2</sub> Oxidation Ambient

Many investigations have been conducted on the growth conditions of SiO2 on SiC to improve the oxide quality and the properties of the silicon carbide-silicon dioxide interface. In this work a comparison between a wet oxidation and an oxidation in N2O ambient diluted in N2 is proposed. The interface state density Dit near the conduction-band edge of SiC has been evaluated by conventional C-V measurements obtaining results similar or better than the literature data. Furthermore, the slow trapping phenomena have been studied and preliminary results are reported.

The electrical properties of HfO/sub 2/ dielectric on germanium and the substrate doping effect

MOS devices built on various germanium substrates, with chemical vapor deposited (CVD) or physical vapor deposited (PVD) HfO2 high-kappa dielectric and TaN gate electrode, were fabricated. The electrical properties of these devices, including the capacitance equivalent thickness (CET), gate leakage current density (Jg), slow trap density (Dst), breakdown voltage (Vbd), capacitance-voltage (C-V) frequency dispersion, and thermal stability, are investigated. The process conditions such as surface nitridation treatment, O2 introduction in CVD process and postdeposition anneal temperature in PVD process, exhibit significant impacts on the devices' electrical properties. The devices built on germanium substrates with different dopant types and doping concentrations show remarkable variations in electrical characteristics, revealing the role of the substrate doping in the reactions occurring at the dielectric/Ge interface, which can significantly affect the interfacial layer formation and Ge updiffusion. A possible mechanism is suggested that two competing processes (oxide growth and desorption) take place at the interface, which govern the formation of the interfacial layer. Doped p-type (Ga) and n-type (Sb) impurities may enhance the different process at the interface and cause the variations in the interfacial layer formation and so on in electrical properties. The high diffusivities of impurities and Ge atoms in Ge and the induced structural defects near the substrate surface could be one possible cause for this doping effect. As another behavior of the substrate doping effect, Ge n-MOS and p-MOS stacks show quite different C-V characteristics after high temperature postmetallization anneal treatments, which can be explained by the same mechanism

In situ cleaning effect on the electrical properties of Ge MOS devices by Ar gas anneal

An in situ surface-cleaning technique by annealing germanium substrates at 550 degC in Ar gas is investigated. Reduced equivalent oxide thickness confirms the effective removal of native oxides by this technique. Improved electrical characteristics in terms of reduced interface-state density and slow trap density are demonstrated in the Ge MOS devices, with surface-nitridation treatment and chemical vapor deposited HfO2 high-kappa dielectric, suggesting the advantage of this technique. Significant elimination of GeOxN y interfacial layer is observed from cross-sectional transmission electron microscopy images after 600 degC postmetallization anneal, suggesting that an interface passivation technique having better thermal stability is required in order to suppress the severe interdiffusion across the interface between Ge substrate and the upper dielectric layer

Static and low-frequency noise characterization in submicron MOSFETs for memories cells applications

In this paper, we present the extraction of oxide traps properties of n-metal-oxide-semiconductor (N-MOS) field effect transistors with W×L=0.5×0.1μm2 using low-frequency (LF and random telegraph signal) noise and static I(V) characterizations. The impact of oxide thickness, on static and noise parameters is analyzed. Static measurements on N-MOS devices with different tunnel oxide thickness show anomalies (a significant increase in Vt values for low temperature and kink effect) attributed to traps located in the oxide. From LF noise analysis we find that 1/f noise stems from carrier number fluctuations. The slow oxide trap concentration deduced from the noise data is about 1015eV/cm3 in agreement with the state-of-the-art gate oxides. Finally, drain current RTS amplitude as large as 10% have been observed.

Optothermal Molecule Trapping by Opposing Fluid Flow with Thermophoretic Drift

Thermophoresis moves molecules along temperature gradients, typically from hot to cold. We superpose fluid flow with thermophoretic molecule flow under well-defined microfluidic conditions, imaged by fluorescence microscopy. DNA is trapped and accumulated 16-fold in regions where both flows oppose each other. Strong 800-fold accumulation is expected, however, with slow trapping kinetics. The experiment is equally described by a three-dimensional and one-dimensional analytical model. As an application, we show how a radially converging temperature field confines short DNA into a 10 microm small spot.

Charge Trapping Effects in High-k Transistors

Fast transient and relatively slow constant voltage stress (CVS) electron trapping phenomena in high-k gate dielectrics are investigated. It is suggested that the resonance tunneling of the injected electrons directly into the shallow defect states is responsible for the fast transient trapping, while the temperature-activated electron migration between the traps govern slow CVS trapping. The extracted trap energies and their effective dimensions fit the calculated characteristics of the O vacancies in monoclinic hafnia. The relationship between trap characteristics and the reduction of trapping observed in ultra- thin high-k gate stacks is discussed.

Characterization of oxide charge trapping in ultrathin N 2O oxide using direct tunneling current

This work studies the constant current stressing effects on the ultrathin (1.7–3 nm) oxides prepared by thermal oxidation of silicon in nitric oxide (N 2O). A simple process evaluation formula for extracting the stress-induced flatband shift is developed and validated with capacitance–voltage measurements. We find that the flatband degradation does not follow the power law, rather an exponential law with a quasi-saturation region is observed as a result of the slow trap generation rate or the generation of positive charge during the constant current stressing. The sources of trap generation are attributed to the Si–Si bonds, P b centers, and nitride-related defects due to the over-constrained silicon atoms in the Si 3N 4 clusters at the interface.

Study of carrier recombination and trapping processes in γ-ray- and proton-irradiated silicon

Carrier lifetime variations dependent on proton irradiation at fluences in the range from 5×10 12 to 10 15 cm −2 and γ-ray doses ranging from 50 to 400 Mrad were investigated in high-resistivity oxygenated silicon wafers and pad detectors. Fast recombination and slow trapping constituents within recombination transients have been distinguished by combining analyses of excess carrier decays dependent on excitation intensity and temperature, measured using the technique of microwave absorption by free carriers. Difference in defect formation rate and type of defects in the ranges of moderate and highest proton irradiation fluences as well as between γ-ray- and proton-irradiated material have been revealed from the inverse lifetime dependence on irradiation fluence and on temperature. The activation factors of the capture centers have been evaluated from carrier lifetime variations in the range of low and elevated temperatures.

Oxide traps characterization of 45 nm MOS transistors by gate current R.T.S. noise measurements

A characterization of traps in ultrathin-oxide MOSFETs by low frequency noise measurements is presented. Drain and gate current noise measurements are investigated. 1/f drain noise magnitude allows extraction of slow oxide interface trap density. Random Telegraph Signal (R.T.S.) gate noise allows to extract properties of defects of the dielectric, such as trap energy level, cross section and its localization from the Si/Si02 interface.

Impact of Al incorporation in hafnia on interface states in (100)Si/HfAlxOy

Interface states in (100)Si/HfAlxOy entities were studied as affected by the oxide composition and post-growth thermal treatment. Incorporation of Al in hafnia is found to reduce the total (fast and slow) trap density compared to the case of elemental Al2O3 and HfO2, though the fast interface traps are only marginally influenced. As compared to the (100)Si/SiO2case, the excessive density of interface traps in the high-κ oxide/silicon structure is mainly caused by a significant contribution of some oxide-related defects.

Characterization of carrier recombination and trapping processes in proton irradiated silicon by microwave absorption transients

Carrier lifetime variations dependent on proton irradiation with fluences in the range from 5×10 12 to 10 15 cm −2 were investigated in high resistivity oxygenated silicon wafers and pad detectors. The fast recombination and slow trapping constituents within recombination transients have been distinguished by combining analyses of the excess carrier decay dependence on the excitation intensity, bias illumination and temperature, measured using the technique of microwave absorption by free carriers. Differences in the rate of formation and type of defects in the ranges of moderate and highest proton irradiation fluences have been revealed from the inverse lifetime dependence on irradiation fluence. The activation factors of the capture centres have been evaluated from carrier lifetime variations in the range of low and elevated temperatures.

Slow motion, trapping, and sorting of water- and chloroform-soluble porphyrins in nanowells.

A two-step self-assembly procedure on smooth, aminated silica particles established holey monolayers. At first, single, flat-lying porphyrin tetraamides (A) were bound covalently, followed by the build-up of a rigid monolayer made of diamido bolaamphiphiles (bolas) around the porphyrin islands. "Nanowells" around porphyrin (A) bottoms with a uniform diameter of 2.2 nm and varying depths of 0.6, 1.0, or 1.5 nm depending on the length of the applied bolas were thus obtained. Oligoethylene headgroups solubilized the particles in water, ethanol, and chloroform/ethanol, and two hydrogen bond chains between the secondary amide groups prevented swelling of the monolayer. Manganese(III) porphyrinates (B) migrated from the bulk solution to the bottom of the form-stable nanowells with a speed of about 1 pm/s and were trapped there above porphyrin (A). After isolation of the (A,B) particles by centrifugation or ultrafiltration, the particles were suspended in a chloroform solution of a chlorin (C), which was also fixated irreversibly on the bottom of the nanowells. The nanowells thus contained three different porphyrins A,B,C in a noncovalent stack. The reverse sequence A,C,B was built-up correspondingly, first in chloroform/ethanol, and then in water. The "sorting" of A,B,C and A,C,B systems was characterized by visible spectra, sequence-dependent fluorescence quenching, and cyclic voltammetry of the top component. The molecular sorting method is the first of its kind and should be generally useful for the production of noncovalent reaction systems on any smooth surface.

Low frequency noise characterization in 0.13 μm p-MOSFETs. Impact of scaled-down 0.25, 0.18 and 0.13 μm technologies on 1/ f noise

This paper presents an experimental analysis of the noise measurements performed in 0.13 μm technology p-MOS transistors operating from weak to strong inversion in ohmic and saturation regimes. The 1/ f noise origin is interpreted in terms of carrier number with correlated mobility fluctuations. The contribution of the access resistance noise is noticed for large overdrive voltages. The slow oxide trap density N t( E F) and the Coulomb scattering noise parameter α s have been extracted. Then the 1/ f noise level in the three scaled-down p-MOSFETs generations (0.25, 0.18 and 0.13 μm) is compared. The variation of the noise parameter values is discussed with respect to the technology node. The highest oxide trap density is obtained for the thinnest gate oxide. It is concluded that the oxide thinning should lead to noise reduction only if the product t ox 2. N t is taken into consideration. This trend will be significant in future scaled-down MOSFETs.

SN1 Reactions with Inverse Rate Profiles

Carbocations may accumulate during solvolysis reactions! The fact that fast ionization followed by slow trapping of the carbocation R+ is a characteristic pattern of many solvolysis reactions requires that the generally accepted energy profiles of these reactions be revised. Supporting information for this article is available on the WWW under http://www.wiley-vch.de/contents/jc_2002/2004/z53468_s.pdf or from the author. Please note: The publisher is not responsible for the content or functionality of any supporting information supplied by the authors. Any queries (other than missing content) should be directed to the corresponding author for the article.

Overview of the impact of downscaling technology on 1∕f noise in p-MOSFETs to 90 nm

An overview of theoretical 1/f noise models is given. Analytical expressions showing the device geometry and bias dependencies of 1/f noise in all conduction regimes are summarised. Novel experimental studies on 1/f noise in MOS transistors are presented with special emphasis on p-channel transistors from 90 nm CMOS technology. In addition to the noise in the drain terminal, the gate current noise is investigated because the gate insulator is very thin and significant gate leakage current appears at high gate biases. In the subthreshold regime, the drain current noise agrees with the ΔN model, whereas in strong inversion the evolutions of the noise level can be described by Hooge's empirical relation. The gate current noise shows 1/f and white noise components. The white noise is very close to shot noise and the 1/f noise component is almost a quadratic function of the gate leakage current. Coherence measurements reveal that the increase of drain noise at high gate biases can be attributed to tunnelling effects in the gate insulator. Both the input-referred (gate) noise and the slow oxide trap density can be used as a figure of merit of the low-frequency noise in MOSFETs.