Capacitor Size Research Articles

Novel Five-Phase Permanent Magnet Generator Systems for Wind Turbine Applications

This paper discusses the benefits of five-phase technology for applications including wind turbine generators. The performances of three-phase and five-phase permanent magnet generator (PMG) systems that use diode rectifier circuits are discussed. Investigations proved that the five-phase topology harnesses some specific and important benefits that are not provided by three-phase systems. The benefits include improved fault tolerance and reliability, and reduced voltage and torque ripple and size of DC link capacitor. These are general improvements that are sought after in many applications including renewable energy applications. The paper also discusses the design of a novel five-phase wind turbine generator which was optimised to make use of the key competitive advantages of our five-phase technology in renewable energy sector. Finite element (FE) and Matlab / Simulink are used in the investigations. Test results are also presented in this paper and used to validate simulations where possible.

Operation of induction motor-drive under different voltage sag conditions

Simulation of an Induction Motor-Drive system under various voltage sag conditions using Matlab/Simulink is presented in this paper. Variation of input current, speed and output torque for induction motor-drive is investigated in this paper. Simulation results show that the variation of speed and current in motor-drive system basically depends on the size of the dc link capacitor. It is shown that the maximum reduction of dc-link voltage happens during voltage sag type A. Unsymmetrical VS types E and G cause the maximum reduction and type B causes the minimum reduction of dc-link voltage respectively. The reduction of dc-link voltage depends to dc-link and source inductances. The higher reduction in dc-link voltage is resulted when the larger inductance is used.

Optimal Allocation and Sizing of Capacitor Banks in Distribution System to Reduce the Power Loss Using Beluga Whale Optimization

One portion of the distribution system is the distribution feeder. Buses carrying more loads and having long‐distance route lines are significant problems due to the presence of power loss and the increase in the overall cost of the transportation process. Hence, the overall power loss minimization is taken as the major objective. The best sizing and allocation of capacitors in a bank in the distribution line are used to minimize the total loss. BWO technique is utilized in this optimization process. The backward‐forward sweep load flow is used for the computation of the power flow in MATLAB. The sensitive buses have been chosen according to the factor of loss sensitivity (LSF) and using BWO. The validity of the test has been made on the standard IEEE 34 and 85 bus radial distribution system. The simulation results in the 34‐bus radial system are much different from the results of PSO, GWO, WO, and IWO. In the 85‐bus radial system, the results are seen with the outcomes of PSO, WO, and BFOA. In both cases, the results of the proposed technique are found to be better than the existing methods. Therefore, the result shows that BWO can be effective for future selection to improve large distribution networks by sizing and locating the capacitors optimally.

Active and Reactive Power loss Minimization Along with Voltage profile Improvement for Distribution Reconfiguration

Optimal distribution network reconfiguration (DNR), distributed generations location and sizing (DGs-LS), tap changer adjustment (TCA), and capacitors bank location and sizing (CAs-SL) are different methodologies used to reduce loss and enhance the voltage profile of distribution systems. DNR is the process of changing the network topography by changing both sectionalized and tie switch states. The optimal location looks to find the optimal setting of the DG and CA within the distribution network. Optimal size seeks to find the optimal output generation of both DG and CA. The TCA looks to find the optimal position for TC. These methods are challenging optimization problems and resort to meta-heuristic techniques to find a globally optimal solution. This paper presents a new methodology with which to simultaneously solve the problem of DNR, DGs-LS, TCA, and CAs-SL in distribution networks. This work aims to minimize active and reactive power losses, including voltage profile improvement using a multi-objective decision approach. The firefly algorithm (FA) and analytic hierarchy process (AHP) are used to optimize the fitness function and determine the function weight factors through the use of MATLAB software. Several scenarios were considered on the IEEE 69-bus network. In terms of active power and reactive losses, reductions in the test system of 96.16% and 92.7%, respectively, were achieved, evidencing the positive impact of the proposed methodology on distribution networks.

Capacitor current analysis of a three-level neutral point clamped converter under unbalanced loading conditions

A neutral point clamped (NPC) converter is considered a forefront in industrial applications. Supplying a typically balanced stand-alone load is one of those applications. However, the loading may become unbalanced which can impact the capacitors’ current and voltage ripple. In this work, an approach is proposed that analyze the capacitor current under unbalanced loading. The proposed method is based on a combination of two-dimensional Fourier series and symmetrical components. Since, two-dimensional Fourier series sectorize the spectrum into harmonics that are either defined by multiples of, fundamental, carrier or both frequencies, the method derives the Fourier coefficients for each sector, corresponding to a sequence current. Therefore, based on the presented approach, each harmonic amplitude in the spectrum sector is defined by three Fourier coefficients reflecting zero, positive and negative sequence current. The capacitor current spectrum is obtained by vector summing sequence coefficients. The method is tested on unbalanced load conditions with (out) a ground path. Results verify feasibility of the proposed method in deriving Fourier coefficients of capacitor currents that accurately reflects the loading status of the NPC. This is vital for converter design in terms of proper sizing of DC capacitor and can help in avoiding components failure.

Optimal Distributed Generation and Capacitor Bank Allocation and Sizing at Two Voltage Levels

Optimal Distributed Generation and Capacitor Bank Allocation and Sizing at Two Voltage Levels

Simulation Of Single-Phase Half-Wave Rectifier Circuit Based on Wind Energy Storage Circuit

Wind energy storage has broad application prospects in renewable energy. In view of many problems in the conversion and transmission of electric energy in wind energy storage system, research and simulation based on single-phase half-wave rectifier circuit can effectively solve these problems. This paper introduces the simulation study of a single-phase half-wave rectifier circuit based on wind energy storage circuit. Firstly, the principle and basic composition of wind energy storage system, as well as the working principle and circuit composition of single-phase half-wave rectifier circuit are introduced from the theoretical aspect. Subsequently, the simulation tool Multisim was used to establish a model of single-phase half-wave rectifier circuit and simulated it. Through simulation research, it can be found that the single-phase half-wave rectifier circuit has the advantages of high conversion efficiency, simple structure and low cost. In practice, the capacitor size in the circuit can be increased to optimize the efficiency of the circuit. In the future, the application range of wind energy storage system will become more and more extensive, and the research and application of single-phase half-wave rectifier circuit based on wind energy storage circuit will also receive more extensive attention and application.

Optimal allocation of multiple capacitors in a hybrid AC/DC microgrid for power quality improvement

Along with the various features for implementing the Hybrid AC/DC Microgrid (HMG), this article proposes an approach for optimal allocation of multiple capacitors which are investigated in a proposed modeling based on the IEEE 14-bus distribution system. The power quality of the HMG has been investigated during the urgent intermittent of Distributed Energy Resources (DERs) and Reactive Power Compensation (RPC) methods. Moreover, the investigation has been achieved in the presence of unbalanced loads and nonlinear loads with maximum and minimum demand scenarios. To cope with the power quality concerns in the studied cases, the fixed capacitor bank as an RPC system in Medium Voltage (MV) level load buses has been utilized. Although the performance indices of the power quality improved in MV-level buses, the Low Voltage (LV) level load buses still endure extensive operation performance deteriorations caused by unbalanced loads. Therefore, in this article, a compensation scheme applied in LV-level load buses and MV-level buses has been proposed consistent with the power flow computations. The Multi-Objective Grey Wolf Optimizer (MOGWO) algorithm is implemented to optimize both the size and location of capacitor banks over different voltage levels with high accuracy. The comprehensive assessment and discussion of the simulation results demonstrate the superiority of utilizing the proposed compensation scheme in both MV-level and LV-level load buses. Hence, the power quality is not only enhanced but also the installation cost is reduced. The complete model of the studied system has been validated using MATLAB/ Simulink.Article HighlightsThe reactive power compensation method is used to improve the power quality in a hybrid AC-DC microgrid.The applied RPC method verifies using the MOGWO algorithm to optimize both the location and size of multiple capacitor banks.Power quality challenges and future research trends are debated.

Analysis of the Effect of Capacitor Placements at High and Low Voltage Transformer Sides as Voltage Profile and Total Cost in Distribution Systems

This study mentions the problem of determining optimal placements and sizes for capacitor banks by comparing different schemes that allow implemented buses at both high and low voltage side, only high voltage side or low voltage side of transformers in distribution systems. Criterions evaluated for each scheme are active and reactive power losses in whole system, voltage value at all buses, installation and operation cost and accumulative profit saving. Standard with and without transformer branches in distribution systems and Newton-Raphson method are introduced to make clear about the way to analyze power flows in whole system. Optimal placements and sizes for capacitor banks are determined by using a proposed algorithm and optimal capacitor placement tool in ETAP software. Simulation results can help to show the comparisons, evaluations and make decision about optimal capacitor placements and sizes. The contribution shows the best scheme that install capacitors at low voltage side of transformers because it has the lowest implemented capacity, highest economic factors while voltage quality is always in allowable range. Achieved results can be applied in any distribution system, help managers have overall review and decide optimal placements and sizes for capacitor banks. Keywords: Capacitor bank, OCP Tool, ETAP software, Optimal placement, Optimal size, Voltage quality, Optimal cost.

Nonlinear control of permanent magnet synchronous generators (PMSG) using feedback linearization

This paper presents nonlinear control of permanent magnet synchronous generators using feedback linearization. Permanent-magnet synchronous generators (PMSGs) are commonly used for small variable-speed wind turbines to produce highefficiency, high-reliability, and low-cost wind power generation. To eliminate the effects of nonlinearity caused by magnetic saturation, an input–output feedback linearization technique is applied to design the high-performance nonlinear current controllers. With this nonlinear control scheme, output voltage responses become faster than those in cascade control structures. Thus, the size of the output filter capacitor can be much reduced since fast voltage control is feasible. As with usual PWM power converters, in addition, the input current is regulated in a sinusoidal waveform. The proposed control scheme provides the wind generation system with the maximum efficiency and high dynamic performance.

A 4.5 μW Miniaturized 3-Channel Wireless Intra-Cardiac Acquisition System.

This article presents a chip designed for wireless intra-cardiac monitoring systems. The design consists of a three-channel analog front-end, a pulse-width modulator featuring output-frequency offset and temperature calibration, and inductive data telemetry. By employing a resistance boosting technique in the instrumentation amplifier feedback, the pseudo-resistor exhibits lower non-linearity, leading to a total harmonic distortion of below 0.1%. Furthermore, the boosting technique enhances the feedback resistance, leading to a reduction in the size of the feedback capacitor and, consequently, the overall size. To make the modulator's output frequency resilient to temperature and process changes, coarse and fine-tuning algorithms are used. The front-end channel is capable of extracting the intra-cardiac signal with an effective number of bits of 8.9, while exhibiting an input-referred noise of less than 2.7 μVrms, and consuming 200 nW per channel. The front-end output is encoded by an ASK-PWM modulator, which drives an on-chip transmitter at 13.56 MHz. The proposed System-on-Chip (SoC) is fabricated in a 0.18 μm standard CMOS technology and consumes 4.5 μW while occupying 1.125 mm2.

Innovative shielding technique for wireless power transfer systems

AbstractThe High Magnetic Passive Loop (HMCPL) technique is proposed as an innovative passive shielding system to mitigate the undesired dispersion of the magnetic field produced by a wireless power transfer (WPT) system, thus reducing the risk of hazardous human exposure. The magnetic structure is described both in terms of lumped parameters circuit, useful for sizing, and in terms of a geometrical representation solved by finite element method, useful to assess the field attenuation effects. Sizing of the resonance capacitors in the shielded WPT structure is approached as a Pareto optimization problem and solved via genetic algorithm. HMCPL shielding design guidance is provided to reduce the magnetic field emission in the surrounding environment. Furthermore, the influence of the shielding on the performance of the WPT system is also evaluated.

Capacitor Condition Monitoring Method for Low-Capacitance StatComs: An Online Approach Using the Inherent Second-Harmonic Oscillations

The cascaded H-bridge low-capacitance static compensator (LC-StatCom) deliberately reduces the capacitor size while allowing large oscillations in capacitor voltages. When a capacitor deteriorates, its capacitance decreases or/and its equivalent series resistance (ESR) increases, compromising StatCom performance and safety. For this reason, the condition monitoring of the capacitors is important to schedule maintenance before failure. This letter introduces a cost-effective and nonintrusive method to monitor the condition of capacitors online. The proposed method offers real-time monitoring without requiring additional hardware or signal injection. The method uses averaged low-frequency signals instead of instantaneous high-frequency signals that can be corrupted by undesired high-frequency noise. Specifically, the method takes advantage of the inherent twice-fundamental-frequency oscillations on the capacitor voltage and current to identify the ESR and capacitance values. The method takes into account the influence of antialiasing filters required for sampling process. The letter shows experimental results that validate the fast and accurate performance of the proposed capacitor condition monitoring.

Bulk-driven CMOS linear transconductance-cell for AC amplifiers with very low cut-off frequency

This manuscript proposes a novel linearized transconductor for AC amplifiers with a very low cut-off frequency. The cell uses an alternative solution that is based on a modified source-degeneration OTA, using two bulk-driven buffers, incorporating bootstrapping techniques to a buffer and a degenerated resistor. In the buffer, the bootstrapping effect is implemented by using a pseudo-resistor and a linear capacitor properly configured, whereas in the resistor the output voltages of the buffers are used with this goal. Thus, the proposed solution allows realizing a very large time constant, avoiding the use of very large size resistors and capacitors, thus saving chip area. The technique is demonstrated in an 0.18μm CMOS technology by designing an OTA operating with a supply voltage of 0.6 V and achieving a low cut-off frequency of around 2Hz with a power consumption of 462 nW.

Optimal Reactive Power Injection in Distribution Networks to Maximize Cost Savings Via AOA

Utilities have been forced to raise the overall efficiency towards a better position in radial distribution systems (DS). The literature has proved that reactive power compensation performs well in minimizing the power loss ( PLoss ) and enhancing the bus voltage profile within the permissible range in radial DSs. This work presents Archimedes optimization algorithm (AOA) to resolve the problem efficiently. The merit of this technique is that it can offer a global or near-global optimum for capacitor siting and sizing. The main intention of this study is to obtain annual financial benefit (AFB) using the placement and sizing of capacitors optimally. This can, however, be achieved by minimizing the objective function composed of cost-based PLoss and capacitor investment cost on radial DSs. The proposed technique has been tested on four renowned DS: the Indian 10-bus, modified 12-bus, IEEE 69-bus, and 94-bus Portugal system. The previously published papers are compared with the outcomes of AOA in terms of PLoss reduction and AFB and prove that AOA achieves better performance and more AFB.

Assessment of Energy Conversion in Passive Components of Single-Phase Photovoltaic Systems Interconnected to the Grid

This paper presents a mathematical analysis of how energy return in grid-connected single-phase photovoltaic systems affects the sizing of passive components. Energy return affects the size of the link capacitor, making it larger than reported in the literature. One of the main points of this article is that an inverter connected to the grid using a DC–DC converter with an appropriate link capacitor is analyzed. The energy return is caused by the value (in Henry units) of the L-filter, which is also analyzed in this paper. The analysis shows that there is a link between the value of the L-filter and the voltage of the DC bus. The analysis assumes two conditions: (1) the DC bus voltage is always higher than the peak value of the grid sinusoidal voltage, and (2) there is a unity power factor at the connection point between the grid and the L-filter. To operate in an open loop, a compensation phase angle is calculated and introduced in the single-phase inverter modulation; this phase angle compensates the phase shift caused by the L-filter, avoiding the use of a phase-locked-loop (PLL) control system. The L-filter ripple current is evaluated by Fourier analysis, and the DC bus ripple voltage is evaluated by considering the energy returned to the link capacitor. The results of the analyses are compared with existing methods reported in the literature. The results also show that, to minimize the value of the L-filter, the DC voltage must be almost equal to the maximum voltage of the grid. Equations to assess the value of the DC-link capacitor and the L-filter in function of their ripples are developed. The results were verified with simulations in Simulink and experimentally.

Design high voltage gain DC converter based on maximum power point resistance for photovoltaic applications

Due to the nonlinear properties of photovoltaic (PV) modules, the design of the high-gain direct current (DC) converter for maximum power point tracking (MPPT) is complicated. In this paper, the design of a new step-up DC converter for MPPT applications is proposed. The proposed converter is structured of two symmetrical reverse-parallel DC-DC boost converters. This structure is supported by voltage multiplier cells equipped to increase output voltage and decrease voltage stress on semiconductor switches. To simplify the high-gain DC converter design, the PV module's maximum power point is treated as resistance by using the incremental conductance (INC) method. The MPPT boost converter's inductance, input capacitance, and output capacitance are calculated using the derived equations using nine parameters. The results showed that the proposed DC converter simulation meets the necessary requirements. The size of the input capacitor, inductor, and output capacitor have been decreased. When the proposed converter is compared to a traditional converter, there is less voltage stress, low current ripple, and an increase in voltage gain. This has led to an improvement in the overall converter efficiency.

Design high voltage gain DC converter based on maximum power point resistance for photovoltaic applications

Due to the nonlinear properties of photovoltaic (PV) modules, the design of the high-gain direct current (DC) converter for maximum power point tracking (MPPT) is complicated. In this paper, the design of a new step-up DC converter for MPPT applications is proposed. The proposed converter is structured of two symmetrical reverse-parallel DC-DC boost converters. This structure is supported by voltage multiplier cells equipped to increase output voltage and decrease voltage stress on semiconductor switches. To simplify the high-gain DC converter design, the PV module's maximum power point is treated as resistance by using the incremental conductance (INC) method. The MPPT boost converter's inductance, input capacitance, and output capacitance are calculated using the derived equations using nine parameters. The results showed that the proposed DC converter simulation meets the necessary requirements. The size of the input capacitor, inductor, and output capacitor have been decreased. When the proposed converter is compared to a traditional converter, there is less voltage stress, low current ripple, and an increase in voltage gain. This has led to an improvement in the overall converter efficiency.

Circulating current control of MMC-fed induction motor drive under entire speed range operation

ABSTRACT A modular multilevel converter (MMC) is reflected to be an emerging multilevel topology for medium- to high-power induction motor drives due to its highly reliable structure, modularity and scalability. However, large circulating current produced in the phase arm of MMC during low-speed operation of induction motor drive is a major drawback of MMC, which leads to affect the size of a sub-module capacitor, inductor and switch rating. To mitigate the circulating current and improve the performance of MMC-fed induction motor drive, this paper proposed a new circulating current error compensator (CCEC) technique with reduced arm current peak. By proper control of instantaneous voltage between arms and DC link current, second-order fundamental frequency current harmonic from circulating current is eliminated which leads to a significant reduction in circulating current. A comparative evaluation between conventional control scheme and the proposed CCEC control scheme is presented. The performance and effectiveness of the proposed CCEC technique are validated using a MATLAB-based simulation. Scale-down laboratory experimental setup is also developed to check the effectiveness of the proposed CCEC control technique. Reduction in circulating current for entire speed range with improved DC link current profile is observed as compared to conventional circulating current suppression control.

3D HfO2 Thin Film MEMS Capacitor with Superior Energy Storage Properties

AbstractCapacitors are ubiquitous and crucial components in modern technologies. Future microelectronic devices require novel dielectric capacitors with higher energy storage density, higher efficiency, better frequency and temperature stabilities, and compatibility with integrated circuit (IC) processes. Here, in order to overcome these challenges, a novel 3D HfO2 thin film capacitor is designed and fabricated by an integrated microelectromechanical system (MEMS) process. The energy storage density (ESD) of the capacitor reaches 28.94 J cm−3, and the energy storage efficiency of the capacitor is up to 91.3% under an applied electric field of 3.5 MV cm−1. The ESD can be further improved by reducing the minimum period structure size of the 3D capacitor. Moreover, the 3D capacitor exhibits excellent temperature stability (up to 150 °C) and charge‐discharge endurance (107 cycles). The results indicate that the 3D HfO2 thin film MEMS capacitor has enormous potential in energy storage applications in harsh environments, such as pulsed discharge and power conditioning electronics.