SiO2 Capping Layer Research Articles

Annealing effects on optical and structural properties of 1.3-μm GaInNAs/GaAs quantum-well samples capped with dielectric layers

Effects of thermal annealing on photoluminescence (PL) and x-ray diffraction from metastable GaInNAs/GaAs quantum-well samples covered by dielectric layers have been studied. PL from uncoated samples exhibits a saturable blueshift of 22 meV relative to PL from the as-grown samples in these experiments. The shift is attributable to a change in the nearest neighbors of nitrogen in short-range-order N-InmGa4−m (0⩽m⩽4) clusters at a fixed composition with negligible Ga/In/N interdiffusion. A Si3N4 cap layer effectively prevents the blueshift in the early stage of annealing and improves emission intensity. Under severe annealing conditions (750 °C for 1500 s), the maximum blueshift for the Si3N4-covered samples is 31 meV. A SiO2 cap layer causes a large nonsaturable blueshift, almost 100 meV in these experiments. The large blueshift is assigned to the formation of defects (likely Ga vacancies) at the SiO2/GaAs interface. The defects are believed to diffuse into the bulk at elevated temperatures and to assist Ga/In/N interdiffusion.

Influence of semiconductor cap layer on the impurity-free vacancy disordering of the In0.2Ga0.8As/GaAs multiquantum-well structure by dielectric capping layers

The feasibility of normal GaAs, low-temperature-grown GaAs (LT-GaAs) and low-temperature-grown InGaAs (LT-InGaAs) as the capping layers for impurity-free vacancy disordering (IFVD) of the In0.2Ga0.8As/GaAs multiquantum-well (MQW) structure has been studied. The normal GaAs, LT-GaAs and LT-InGaAs layers were tested as the outermost capping layer and the intermediate cap layer underneath the SiO2 or Si3N4 capping layer. The degree of quantum-well intermixing (QWI) induced by rapid thermal annealing was estimated by the shift of the photoluminescence (PL) peak energy. It was found that the IFVD of the In0.2Ga0.8As/GaAs MQW structure using LT-GaAs (LT-InGaAs) as the outermost capping layer was much smaller (larger) than that using a SiO2 (Si3N4) capping layer. It was also observed that the insertion of the normal GaAs, LT-GaAs and LT-InGaAs cap layers below the SiO2 or Si3N4 capping layer reduces the degree of QWI and the PL intensity after the QWI. A plausible explanation for the influence of normal GaAs, LT-GaAs and LT-InGaAs cap layers for the QWI of the InGaAs/GaAs structure is also discussed.

Formation of platinum-based silicide contacts: Kinetics, stoichiometry, and current drive capabilities

A detailed analysis of the formation of Pt2Si and PtSi silicides is proposed, based on x-ray photoelectron spectroscopy (XPS), transmission electron microscopy (TEM), and electrical characterizations. Published kinetics of the Pt2Si and PtSi transformations under ultrahigh vacuum condition are consolidated on the basis of XPS measurements performed during an in situ annealing at a constant heating rate. At room temperature, an incomplete PtxSi reaction is clearly identified by XPS depth profiling. Using rapid thermal annealing at 300, 400, and 500 °C, the sequential Pt–Pt2Si–PtSi reaction chain is found to be completed within 2 min. Outdiffusion of silicon to the top surface is shown to be responsible for the formation of a thin SiO2 capping layer at 500 °C. Pileup of oxygen occurring at the Pt2Si/Pt reaction front is clearly identified as an inhibiting factor of the silicidation mechanism. Another incomplete reaction scheme limited to the unique formation of Pt2Si is exemplified in the case of ultra thin silicon-on-insulator films. Finally, current drive measurements on PtSi Schottky contacts have allowed us to identify 300 °C as the optimum annealing temperature while TEM cross sections demonstrate the formation of a smooth and continuous PtSi/Si interface at 300 °C.

Electrical characterization of impurity-free disordering-induced defects in n-GaAs using native oxide layers

Defects created in rapid thermally annealed n-GaAs epilayers capped with native oxide layers have been investigated using deep-level transient spectroscopy (DLTS). The native oxide layers were formed at room temperature using pulsed anodic oxidation. A hole trap H0, due to either interface states or injection of interstitials, is observed around the detection limit of DLTS in oxidized samples. Rapid thermal annealing introduces three additional minority-carrier traps H1 (EV+0.44 eV), H2 (EV+0.73 eV), and H3 (EV+0.76 eV). These hole traps are introduced in conjunction with electron traps S1 (EC-0.23 eV) and S2 (EC-0.45 eV), which are observed in the same epilayers following disordering using SiO2 capping layers. We also provide evidence that a hole trap whose DLTS peak overlaps with that of EL2 is present in the disordered n-GaAs layers. The mechanisms through which these hole traps are created are discussed. Capacitance–voltage measurements reveal that impurity-free disordering using native oxides of GaAs produced higher free-carrier compensation compared to SiO2 capping layers.

A Comparison of Low-Energy As Ion Implantation and Impurity-Free Disordering Induced Defects in N-Type GaAs Epitaxial Layers

We have compared the electrical properties of n-type GaAs layers disordered by either 40 keV As ion implantation or an impurity-free process employing an SiO2 capping layer. Current–voltage and capacitance–voltage measurements on Au Schottky barrier diodes fabricated on the processed layers showed that the impurity-free method retained the much better electrical quality of the GaAs epitaxial layers. Different sets of defects were observed in the implanted samples and impurity-free disordered samples, which meant that the charge transfer across the Schottky barriers was different in the two cases. Our results further reveal that the concentrations and diffusion lengths of defects created by ion implantation were much larger. The impurity-free method retains the better electrical quality of the semiconductor material.

Fabrication of wavelength-shifted In0.2Ga0.8As/GaAs multiple quantum well laser diodes by impurity-free vacancy disordering at different thermal annealing temperatures

We fabricated ridge-waveguide laser diodes with In0.2Ga0.8As/GaAs multiple quantum wells (MQWs) that have undergone impurity-free vacancy disordering (IFVD) using the SiO2 capping layer. The SiO2-capped MQW samples were annealed by rapid thermal annealing (RTA) at different temperatures. The magnitude of the blueshift estimated by the shift of photoluminescence peak energy increases with the increase of RTA temperature due to the enhanced interdiffusion of the MQWs. The electrical characteristics and lasing performance of the annealed laser diodes were compared with those of the as-grown laser diode. The operation wavelengths of 967, 946 and 927 nm with device performance comparable to that of the as-grown device were obtained in the laser diodes fabricated by the MQWs that have undergone IFVD at 850, 900 and 950 °C for 50 s, respectively. Thus, the RTA for the IFVD employed to fabricate wavelength-shifted laser diodes is believed not to seriously degrade the electrical and optical properties of the devices.

Effect of SiO2 Capping Layer on a Laser Crystallization of a-Si Thin Film

AbstractEffect of SiO2 capping layer(C/L) on recrystallization of amorphous Si (a-Si) film was investigated. When a thick C/L over 500 Å was deposited on an a-Si film before crystallization, fine p-Si grains less than 100nm were obtained at full range of energy density window. However, when a thin C/L below 200 Å was used, Si-melt spouted out through C/L at over critical energy density. When Si-melt started spouting, abrupt change of grain size also occurred. These large grains could be explained by a non-uniformity of heat flow caused by Si-melt spouting. With this polycrystalline Si (p-Si) material having appreciable grain size protected by C/L, fabrication of low-cost Low Temperature Poly Si (LTPS) without additional cleaning of p-Si surface could be successfully developed.

Effects of a SiO2 Capping Layer on the Electrical Properties and Morphology of Nickel Silicides

The effects of a SiO2 capping layer on the electrical and structural properties of nickel silicide have been investigated as a function of rapid-thermal-annealing temperature. X-ray diffraction results show that regardless of the capping, NiSi phase is formed when annealed at temperatures ≥400°C, while NiSi2 phase is formed at temperatures ≥700°C. For both the capped and uncapped samples, the sheet resistance increases with increasing temperature, although the former is better than the latter. It is shown that the capped samples exhibit better thermal stability than the uncapped samples. It is further shown that the reverse leakage current of the capped samples is about one order of magnitude lower than those of the uncapped ones.

Dielectric cap quantum well disordering for band gap tuning of InGaAs/InGaAsP quantum well structure using various combinations of semiconductor-dielectric capping layers

The spatially selective band gap tuning of quantum well structure has been an essential tool to realize the integration of optoelectronic or photonic devices on a single wafer [1, 2]. Quantum well disordering (QWD) techniques are widely employed for the band gap tuning, which induces a change of shape of the quantum well profile by intermixing the well and the barrier materials during annealing. Among the QWD techniques Dielectric cap QWD (DCQWD) method uses the vacancies created both in the dielectric capping layer and at the dielectric-semiconductor interface. There have been many studies of dielectric capping layers, such as SiO2[3], SiNx [4, 5], SrF2[6], and WNx [7], to control the QWD. In this study, DCQWD method was employed for band gap tuning. We were concerned about the effect of the various semiconductor-dielectric capping layer combinations on the band gap tuning as a function of the annealing temperature. The vertical structure of the samples used in this study is schematically shown in Fig. 1. We employed chemical beam epitaxy (CBE) to grow the undoped In0.53Ga0.47As/InGaAsP (Q1.25) single quantum well and the subsequent semiconductor capping layers. The CBE growth temperature was 500 ◦C. The single quantum wells (In0.53Ga0.47As/InGaAsP (Q1.25)) capped with different semiconductor capping layers (InP, In0.53Ga0.47As and InGaAsP (Q1.25)) with 50 nm-thick were prepared, and each was then subjected to topmost capping with dielectric material. The dielectric layers of SiO2 and SiNx (300 nm thick and 100 nm thick, respectively) were deposited by plasma enhanced chemical vapor deposition technique. For SiNx capping layers, dilute Silane (5% SiH4 in N2, flow rate of 40 sccm) and NH3 (99.999%, flow rate of 25 sccm) were used as reactant gases, while Silane (5% SiH4 in N2, flow rate of 40 sccm) and N2O (99.999%, flow rate of 40 sccm) were used for SiO2 layer. The process pressure and temperature were maintained at 0.9 torr and 200 ◦C, respectively. The RF power was 30 W. The growth time was 6 min 40 s for SiNx , and 3 min for SiO2. The refractive index of SiNx film was 1.91. The band gap of virgin quantum well prior to capping was 0.8 eV (λPL = 1550 nm) at room temperature. Thermal treatment was accomplished in N2 atmosphere at various annealing temperatures (600 ◦C– 800 ◦C) for 8 min. PL measurement was carried out at room temperature to identify the degree of band gap tuning. Fig. 2 shows the energy shifts achieved by the various annealing temperatures. The maximum energy shift occurred at 800 ◦C for all samples studied in this work. The energy shift generally increased with the increase of the annealing temperature, which has been reported previously [8]. Fig. 3 shows the blue shift difference between SiNx capped samples and SiO2 capped samples. In cases of InP and InGaAsP semiconductor capping layers, the difference amounted to about 135 meV after annealing at 800 ◦C, while the difference for InGaAs reached about 80 meV. As a result of interdiffusion of atoms between quantum well and barrier, a change in band gap width of the quantum well may happen when the structure is heated above a specific temperature. In our work, the threshold temperature was around 750 ◦C. The overall experimental results of this study, which can be seen in Fig. 2, is that SiNx capping layer caused larger blue shifts than SiO2 capping layer, which means that SiNx layer has many more vacancies than SiO2 layer. However, there was another report for band gap tuning of InGaAsP/InP

Intermixing behavior in InGaAs/InGaAsP multiple quantum wells with dielectric and InGaAs capping layers

The influence of the InGaAs capping layer on the intermixing behavior of dielectric-capped In0.53Ga0.47 As/In0.81Ga0.19As0.37P0.63 multiple quantum wells (MQWs) was investigated by measuring the change in the photoluminescence spectra after rapid thermal annealing. The magnitude of the energy shift in the transition energy from the first electronic sub-band to the first heavy- and light-hole sub-bands of the MQWs is large when SiO2 and InGaAs hybrid capping layers are employed, but it is rather small when Si3N4 and InGaAs hybrid capping layers are employed. This result indicates that the InGaAs capping layer holds promise for applications involved in the fabrication of integrated photonic devices, but only when it is incorporated with the SiO2 capping layer. The reason why the InGaAs capping layer behaves differently under the SiO2 and Si3N4 capping layers is also discussed.

Growth, structure, and optical properties of carbon-reinforced silica fibers

We report the synthesis of carbon-reinforced silica fibers by methane exposure of metallocene-treated oxidized-Si(001) substrates at 1100 °C. The SiO2 cap layer transforms into silica fibers reinforced by glassy carbon in the core during methane exposure. High-resolution electron microscopy and spatially resolved spectroscopy measurements of the fibers reveal an amorphous structure without a hollow, and domains of glassy carbon embedded at the fiber core. The carbon-reinforced fibers are optically transparent and have an optical band gap of ≃3.1 eV. These fibers are organized in radial patterns that vary for different metallocene species. On nickelocene-treated substrates, the fibers originate from the circumference of the circular templates and grow outwards, forming radial patterns. On ferrocene-treated substrates, randomly oriented fibers grow within as well as slightly outside the perimeter of the templates, forming wreath-like patterns. Aligned growth of such fibers could be useful for fabricating optoelectronics devices and reinforced composites.

Effects of rapid thermal annealing and SiO2 encapsulation on GaNAs/GaAs single quantum wells grown by plasma-assisted molecular-beam epitaxy

Effects of rapid thermal annealing and SiO2 encapsulation on GaNAs/GaAs single quantum wells grown by plasma-assisted molecular-beam epitaxy were studied. Photoluminescence measurements on a series of samples with different well widths and N compositions were used to evaluate the effects. The intermixing of GaNAs and GaAs layers was clearly enhanced by the presence of a SiO2-cap layer. However, it was strongly dependent on the N composition. After annealing at 900 °C for 30 s, a blueshift up to 62 meV was observed for the SiO2-capped region of the sample with N composition of 1.5%, whereas only a small blueshift of 26 meV was exhibited for the bare region. For the sample with the N composition of 3.1%, nearly identical photoluminescence peak energy shift for both the SiO2-capped region and the bare region was observed. It is suggested that the enhanced intermixing is mainly dominated by SiO2-capped layer induced defects-assisted diffusion for the sample with smaller N composition, while with increasing N composition, the diffusion assisted by interior defects become predominant.

Multi-functionalization Of Silicon By Nanoparticles Through “Plug and Play” Approach

ABSTRACTIn this paper, we demonstrate a “Plug and Play” approach, whereby externally synthesized nanoparticles of desired functions and size are incorporated into the semiconductor, followed by the manipulation of surface chemical bonds in order to achieve multiple functionality. Sonochemically synthesised Fe2O3 nanoparticles were introduced onto device quality Si wafers. On annealing the particle-treated Si wafer in ultra high vacuum, oxygen changes the bonding partner from Fe to Si and desorb as SiO at ∼ 760°C, leading to the formation of uniform sized Fe nanoparticles ( size ∼6-8 nm) on the surface and the sample shows ferromagnetic behaviour. More importantly, the particle treated Si exhibits light emission at wavelengths 1.57, 1.61 and 1.65 microns (full width at half maximum ∼ 20 meV). Emission in this wavelength range is crucial for optical communications and is highly desired from a Si based material. Further, oxidation of this material leads to the formation of a selective capping layer of SiO2. Thus, by manipulating the surface chemical bonds, we are able to introduce optical, magnetic, metallic and insulating functions to Si. Additionally, the particles exhibit self-assembly on a patterned Si surface. We believe that this approach is universal and the material developed here is compatible with the planar Si technology, bringing us closer to realization of Si based monolithic electronics.

The annealing effects of Mg-doped GaN epilayers capped with SiO2 layers

We have investigated the annealing effect of Mg-doped GaN epilayers capped with SiO2 layer. Each of the Mg-doped GaN epilayers with and without SiO2 was annealed at temperatures of 850, 900, and 950°C after growth. The Van der Pauw technique and photoluminescence (PL) were used to evaluate the changes in their electrical and optical characteristics. The SiO2 capping layers were removed by chemical etching after heat treatment. The hole concentration of the GaN:Mg epilayers capped with SiO2 after annealing is much higher than that of the layer annealed without SiO2 at any temperatures. But, the two types of epitaxial layers show very similar concentration change with variation of the annealing temperature. The electrical resistivities as well as the hole concentration of the epilayers capped with SiO2 is much lower than that of the layers annealed without SiO2 at any temperatures and the two types of epitaxial layers show very similar resistivity changes with the variation of annealing temperature. The luminescence intensity of the GaN:Mg epilayers capped with SiO2 measured by PL at both RT and 10K is higher than that of the epilayers annealed without SiO2 is very similar to the data of hole concentration, the intensity of the epilayers annealed without SiO2 capping decreases continuously with the increase of the annealing temperature which is different from the hole concentration. Judging from these results, it can be concluded that the SiO2 cap layer plays an important role in protecting the out-diffusion of cracked Mg from MgH complex during annealing at temperatures of 850, 900, and 950°C. It is also possible to conclude that the cracked Mg is still out-diffused from the GaN:Mg epitaxy during annealing at temperatures 850, 900, and 950°C in spite of the SiO2 cap layer.

Barrier properties of Ta–RuO2 diffusion barrier for dynamic random access memory capacitor bottom electrodes

We proposed the Ta–RuO2 diffusion barrier for oxygen in the dynamic random access memory capacitor bottom electrode, and investigated the barrier and electrical properties of the developed diffusion barrier. The Ta–RuO2/TiSi2/poly-Si/SiO2/Si contact system deposited with and without the SiO2 capping layer showed the lower total resistance and ohmic characteristics up to 800 °C. For the Ta–RuO2/TiSi2/poly-Si/SiO2/Si contact system, no other phases observed except for the formation of conductive RuO2 phase in the barrier film by reaction with the indiffused oxygen after annealing in air, but the thin oxidized layer at the Ta–RuO2/TiSi2 interface was formed by external oxygen. However, a large number of the crystallites in the annealed samples compared to that of as-deposited film were observed even after depth profile. The crystallites consisted of Ru and O containing a small amount of Ta. In addition, the embedded RuO2 crystalline phase was observed in the thin oxidized TiSi2 surface layer. Correspondingly, we suggest that the ohmic mechanism of the Ta–RuO2/TiSi2/poly-Si/SiO2/Si contact system is an embedded RuO2 crystalline phase involving a small amount of Ta in a Ta amorphous structure.

The formation of 3C-SiC in crystalline Si by carbon implantation at 950°C and annealing — a structural study

3C-SiC(cubic) was formed by carbon implantation into (001) and (111)Si with doses ranging between 0.2 × 1018 and 1 × 1018cm−2 at 200 keV. During implantation the samples were maintained at a temperature ≈ 950°C and they were subsequently annealed at 1250°C for 6 h. In all samples a buried 3C-SiC layer was formed, which consists of a high density of 3C-SiC precipitates having the same orientation as the Si matrix. The coherency of the SiC precipitates with the Si matrix is shown for the first time by high resolution transmission electron microscopy (HRTEM) observations. The 22% misfit between the two lattices is accommodated by misfit dislocations, which form loops around the precipitates. From the shift of the displacement type moirépatterns which were formed by superposition of the mismatched 3C-SiC and Si lattices the portion of the misfit accommodated by partial dislocations was deduced. The stability of the SiC precipitates during the high temperature anneal is shown. A mechanism for the formation of the 3C-SiC, without the generation of defects in the Si matrix, is proposed. Low dose high temperature carbon implantation through a SiO2 capping layer into the near surface region of the underlying silicon results in the preferential nucleation and growth of 3C-SiC on the silicon side of the SiO2/Si interface, the advantages of such structures are discussed.

Raman microstructural analysis of silicon-on-insulator formed by high dose oxygen ion implantation: As-implanted structures

A microstructural analysis of silicon-on-insulator samples obtained by high dose oxygen ion implantation was performed by Raman scattering. The samples analyzed were obtained under different conditions thus leading to different concentrations of defects in the top Si layer. The samples were implanted with the surface covered with SiO2 capping layers of different thicknesses. The spectra measured from the as-implanted samples were fitted to a correlation length model taking into account the possible presence of stress effects in the spectra. This allowed quantification of both disorder effects, which are determined by structural defects, and residual stress in the top Si layer before annealing. These data were correlated to the density of dislocations remaining in the layer after annealing. The analysis performed corroborates the existence of two mechanisms that generate defects in the top Si layer that are related to surface conditions during implantation and the proximity of the top Si/buried oxide layer interface to the surface before annealing.

Band-gap blue shift by impurity-free vacancy diffusion in 1.5-μm-strained InGaAsP/InP multiple quantum-well laser structure

The effects of defect-enhanced, impurity-free, quantum-well (QW)-barrier compositional intermixing caused by the SiO2 cap annealing at 750 °C of a 1.5-μm InGaAsP/InP multiple quantum-well (MQW) laser structure have been studied by photoluminescence (PL). A substantial band-gap blue shift, as much as 112 nm (∼66 meV), was found in the structure and the value of the shift can be controlled by the anneal time. The amount of the shift does not depend on the thickness of the SiO2 cap layer. Ridge-waveguide lasers were fabricated on the different areas of the wafer, with and without a SiO2 cap during a 60 s anneal. The lasing wavelength of the laser produced with the SiO2 cap has a 78 nm blue shift over that of the laser without the SiO2 cap.

SiGeC alloy layer formation by high-dose C+ implantations into pseudomorphic metastable Ge0.08Si0.92 on Si(100)

Dual-energy carbon implantation (1×1016/cm2 at 150 and at 220 keV) was performed on 260-nm-thick undoped metastable pseudomorphic Si(100)/ Ge0.08Si0.92 with a 450-nm-thick SiO2 capping layer, at either room temperature or at 100 °C. After removal of the SiO2 the samples were measured using backscattering/channeling spectrometry and double-crystal x-ray diffractometry. A 150-nm-thick amorphous layer was observed in the room temperature implanted samples. This layer was found to have regrown epitaxially after sequential annealing at 550 °C for 2 h plus at 700 °C for 30 min. Following this anneal, tensile strain, believed to result from a large fraction of substitutional carbon in the regrown layer, was observed. Compressive strain, that presumably arises from the damaged but nonamorphized portion of the GeSi layer, was also observed. This strain was not significantly affected by the annealing treatment. For the samples implanted at 100 °C, in which case no amorphous layer was produced, only compressive strain was observed. For samples implanted at both room temperature and 100 °C, the channelled backscattering yield from the Si substrate was the same as that of the virgin sample.

Interfacial Reactions in Thin Film and Bulk Iron/Silicon Couples

ABSTRACTInitial phase formation in thin film and bulk Fe/Si couples has been investigated using transmission and scanning electron microscopy (TEM and SEM). For the thin film couples, ≈165 nm of Fe was deposited by electron beam evaporation onto <111> oriented Si substrates. SiO2 capping layers (≈100nm thick) were used to protect the Fe from oxidation during subsequent annealing. Bulk diffusion couples were fabricated by clamping together polycrystalline Fe pieces and <111> oriented single crystal Si pieces and sealed in evacuated (≈10-4 torr) quartz capsules. Annealing of thin film couples was done at temperatures ranging from 300°C to 500°C for up to several hours. Bulk couples were annealed at 700°C for up to ≈1000hrs.Interfacial reactions were detected in as deposited thin film couples. A layer =5nm thick was identified, through electron diffraction, as poorly crystalline off-stoichiometric Fe3Si. Iron was the major diffuser during the formation of Fe3Si. During annnealing off-stoichiometric Fe3Si transformed to stoichiometric Fe3Si. FeSi was the next phase to form - initially detected after annealing at 300°C for 3 hrs. Similar results were obtained for bulk couples. The first phase to form was ordered stoichiometric Fe3Si (initially detected after 7 hrs), followed by FeSi (≈23 hrs) and then FeSi2 (>200 hrs). The formation behavior of these phase is discussed.