SiO2 Buffer Research Articles

Build a Rigid-Flexible Graphene/Silicone Interface by Embedding SiO2 for Adhesive Application.

An effective strategy was developed to enhance the adaptability of graphene/silicone matrices under external stimuli by embedding nanoscale SiO2 into the graphene/silicone interfaces as a buffer layer. Chemically reduced graphene (rGE) was first covered by SiO2 using an in situ preparation, forming sandwichlike rGE/SiO2 (rGES). Then, rGES was integrated into methyl vinyl polysiloxane, followed by vulcanization, producing the final rGES/silicone rubber (SR) nanocomposite. Such interfacial modification actually built a rigid–flexible SiO2 buffer layer between rGE and polysiloxane. Obvious improvements were seen in both thermal and mechanical properties due to improved interfacial interaction. In a vulcanized rGES/SR system, the addition of 30 wt % rGES (3 wt % rGE) yielded a tensile strength of 6.13 MPa (up to 25 times that of the unmodified rGE in filled SR), a tear strength of 18.08 kN/m, and an elongation at break of 267%, several times higher than those of an rGE/SR nanocomposite. Thermal analysis results indicated that the initial decomposition temperature of rGES/SR containing 5 wt % rGES (0.5 wt % rGE) increased by more than 98 and 288 °C compared to that of SiO2/SR and rGE/SR, respectively. The rGES/polysiloxane matrices showed a tensile shear adhesive strength of 1.78 MPa when used as an adhesive for aluminum sheets, which is higher than that of the rGE/polysiloxane matrix (0.93 MPa).

Electrical and Optical Properties of the IZTO Thin Film Deposited on PET Substrates with SiO2 Buffer Layer

Electrical and Optical Properties of the IZTO Thin Film Deposited on PET Substrates with SiO2 Buffer Layer

Effect of SiO2 Buffer Layer Thickness on Performance and Reliability of Flexible Polycrystalline Silicon TFTs Fabricated on Polyimide

This letter investigates flexible polycrystalline silicon thin film transistor performance variation due to different buffer layer thicknesses. In flexible electronics, thermal expansion stress during device fabrication is inevitable. A thicker SiO2 buffer demonstrates better endurance to thermal expansion stress from the polyimide substrate during device annealing. However, if the SiO2 buffer thickness is above a critical point, its weak heat dissipation capability causes the optimal ELA crystallization condition to shift. A thermal expansion stress simulation and TEM photos were utilized to verify performance variation. Furthermore, a similar trend was observed in electrical characteristics after negative bias temperature instability.

Characterization of Al2O3/4H-SiC and Al2O3/SiO2/4H-SiC MOS structures

Abstract The paper presents the results of characterization of MOS structures with aluminum oxide layer deposited by ALD method on silicon carbide substrates. The effect of the application of thin SiO2 buffer layer on the electrical properties of the MOS structures with Al2O3 layer has been examined. Critical electric field values at the level of 7.5–8 MV/cm were obtained. The use of 5 nm thick SiO2 buffer layer caused a decrease in the leakage current of the gate by more than two decade of magnitude. Evaluated density of trap states near the conduction band of silicon carbide in Al2O3/4H-SiC MOS is about of 1×1013 eV−1cm−2. In contrast, the density of the trap states in the Al2O3/SiO2/4H-SiC structure is lower about of one decade of magnitude i.e. 1×1012 eV−1cm−2. A remarkable change in the MOS structure is also a decrease of density of electron traps located deeply in the 4H-SiC conduction band below detection limit due to using of the SiO2 buffer layer.

Mobility and Stability Enhancement of Amorphous In-Ga-Zn-O TFTs With Atomic Layer Deposited Al2O3/SiO2Stacked Insulators

Amorphous In-Ga-Zn-O (a-IGZO) thin film transistors (TFTs) were fabricated with an atomic-layer-deposited (ALD) SiO2 buffer layer between the a-IGZO channel and the Al2O3 dielectric. Compared with the TFTs with a single Al2O3 dielectric, the a-IGZO TFTs with the Al2O3/SiO2 stacked insulator demonstrated improved performance. That is, the field-effect mobility increased from 12.3 to 16.2 cm $^{2}\text{V}^{-1}\text{s}^{-1}$ , the threshold voltage ( ${\mathrm{ V}}_{\mathrm{ th}} $ ) and subthreshold swing (SS) decreased from 1.14 to 0.72 V and from 0.48 to 0.30 V/dec, respectively. Furthermore, the Al2O3/SiO2 device also exhibited better electrical stability under negative gate bias stress and negative bias illumination stress than the Al2O3 device. These are mainly attributed to improved interfacial properties between IGZO and SiO2. Such a buffer layer of ALD SiO2 in a-IGZO TFTs is very promising for practical applications.

Sensitivity Enhancement in Si Nanophotonic Waveguides Used for Refractive Index Sensing

A comparative study is given for the sensitivity of several typical Si nanophotonic waveguides, including SOI (silicon-on-insulator) nanowires, nanoslot waveguides, suspended Si nanowires, and nanofibers. The cases for gas sensing (ncl ~ 1.0) and liquid sensing (ncl ~ 1.33) are considered. When using SOI nanowires (with a SiO2 buffer layer), the sensitivity for liquid sensing (S ~ 0.55) is higher than that for gas sensing (S ~ 0.35) due to lower asymmetry in the vertical direction. By using SOI nanoslot waveguides, suspended Si nanowires, and Si nanofibers, one could achieve a higher sensitivity compared to sensing with a free-space beam (S = 1.0). The sensitivity for gas sensing is higher than that for liquid sensing due to the higher index-contrast. The waveguide sensitivity of an optimized suspended Si nanowire for gas sensing is as high as 1.5, which is much higher than that of a SOI nanoslot waveguide. Furthermore, the optimal design has very large tolerance to the core width variation due to the fabrication error (∆w ~ ±50 nm). In contrast, a Si nanofiber could also give a very high sensitivity (e.g., ~1.43) while the fabrication tolerance is very small (i.e., ∆w < ±5 nm). The comparative study shows that suspended Si nanowire is a good choice to achieve ultra-high waveguide sensitivity.

Electrical Stabilities of In2O3-ZnO-SnO2 (IZTO) Films Against the External Stresses

ABSTRACTThe (In2O3)77.34(ZnO)x(SnO2)22.66-x (denote to IZTO-2) films with x = 13, 15, 17, 19 wt.% were prepared on PET film with a 100-nm-thick SiO2 buffer layer by using RF-magnetron sputtering method, and their electrical stabilities were tested under various external stresses such as moist heat, temperature fluctuations and bending of substrate films. The lowest resistivity of 4.8 × 10−4 Ω•cm was observed in the IZTO-2 film of x = 17 wt.% which also had such good properties as high electrical stability, surface uniformity, and high conductivity as compared with those of another (In2O3)90(ZnO)7(SnO2)3 (IZTO-1) film. These results suggest that the optimum starting composition for IZTO film with high quality as a flexible transparent conducting oxide(TCO) film is In2O3 : ZnO : SnO2 = 77.34 : 17 : 5.66 wt.%. The electrical stability of the optimum IZTO-2 film was greatly improved because the SiO2 buffer layer introduced between IZTO thin film and PET substrate acted as a blocking barrier to water vapour and organic solvents diffusing from the PET film and also as a buffer layer withstanding the bending damage.

Effect of buffer layer on thermochromic performances of VO2 films fabricated by magnetron sputtering

As a well-developed industrial fabricating method, magnetron sputtering technique has its distinct advantages for the large-scale production. In order to investigate the effect of buffer layer on the formation and thermochromic performances of VO2 films, using RF magnetron sputtering method, we fabricated three kinds of buffer layers SiO2, TiO2 and SnO2 on soda lime float-glass. Then according to the reactive DC magnetron sputtering method, VO2 films were deposited. Due to the restriction of heat treatment temperature when using soda lime float-glass as substrates, dense rutile phase TiO2 cannot be formed, leading to the formation of vanadium oxide compounds containing Na ions. When using SnO2 as buffer layer, we found that relatively high pure VO2 can be deposited more easily. In addition, compared with the effect of SiO2 buffer layer, we observed an enhanced visible transparency, a decreased infrared emissivity, which should be mainly originated from the modified morphology and/or the hetero-structured VO2/SnO2 interface.

Optimization of a guided-mode resonance filter by varying the thickness of the buffer layer

In this Letter, we demonstrate that by adjusting the thickness of the buffer layer, the optical responses of a guided-mode resonance filter (GMRF) can be improved for sensor applications. The GMRF is fabricated using a replica molding with a plastic substrate and a UV-curable polymer. SiO2 buffer layers of different thicknesses are deposited before the waveguide-layer deposition. The sensitivity of the GMRFs decreases slightly with increasing SiO2 layer thickness. By contrast, the full width at half-maximum reduces substantially with increasing SiO2 layer thickness, resulting in the improvement of the overall figure of merit.

Notice of Retraction: Electro-Optic Long Period Grating Based on Ti:LiNbO3 Optical Waveguide

We demonstrate electro-optic long period grating in Ti:LiNbO3 strip waveguide embedded in a planar waveguide. The device was fabricated starting from a Z-cut congruent plate with a technological process in sequence of planar waveguide, strip waveguide, SiO2 buffer layer, and periodical electrode. The rejection band of the device with a grating pitch 675 $\mu \text{m}$ is observed at the 1.1–1.3- $\mu \text{m}$ wavelength regime with a maximum contrast of 27 dB under the 360 V driving voltage. It is found that the band red-shifts linearly with the voltage increase. The shift is $\sim 160$ nm as the voltage is increased from 100 to 500 V and lasts 1 min. Accompanying the shift, the contrast reduces. The shift is attributed to different photorefraction effects in planar and strip waveguides. Higher than 360 V, the contrast decreases due to photorefraction effect and over-coupling phenomenon.

Formation of palladium hydrides in low temperature Ar/H2-plasma

20nm thick Pd coatings deposited on Si substrates with 800nm SiO2 and 1nm Cr buffer layers were treated in a 2.45GHz microwave plasma source at 700W plasma power and 40Pa working pressure without substrate heating. For obtaining information on the effect of energy influx due to ion energy on the palladium films the substrate potential was varied from Usub=0V to −150V at constant gas flow corresponding to mean ion energies Ei from 0.22eV∙cm−2∙s−1 to 1.28eV∙cm−2∙s−1.In contrast to high pressure reactions with metallic Pd, under plasma exposure we do not observe solid solutions over a wide range of hydrogen concentration. The hydrogen incorporation in Pd films takes place discontinuously. At 0V substrate voltage palladium hydride is formed in two steps to PdH0.14 and PdH0.57. At −50V substrate voltage PdH0.57 is formed directly. However, substrate voltages of −100V and −150V cause shrinking of the unit cell. We postulate the formation of two fcc vacancy palladium hydride clusters PdHVac(I) and PdHVac(II). Under longtime plasma exposure the fcc PdHVac(II) phase forms cubic PdH1.33.The fcc PdH0.57 phase decomposes at temperatures >300°C to form metallic fcc Pd. The hydrogen removal causes a decrease of lattice defects. In situ high temperature diffractometry measurements also confirm the existence of PdHVac(II) as a palladium hydride phase. Stoichiometric relationship between cubic PdH1.33 and fcc PdHVac(II) becomes evident from XR measurements and structure considerations. We assume both phases have the chemical composition Pd3H4. Up to 700°C we observe phase transformation between both the fcc PdHVac(II) and cubic PdH1.33 phases. These phase transformations could be explained analog to a Bain distortion by displacive solid state structural changes.

Properties of IZTO Thin Films on Glass with Different Thickness of SiO&lt;sub&gt;2&lt;/sub&gt; Buffer Layer

The properties of the IZTO thin films on the glass were studied with a variation of the SiO₂ buffer layer thickness. SiO₂ buffer layers were deposited by plasma-enhanced chemical vapor deposition (PECVD) on the glass, and the In-Zn-Tin-Oxide (IZTO) thin films were deposited on the buffer layer by RF magnetron sputtering. All the IZTO thin films with the SiO₂ buffer layer are shown to be amorphous. Optimum SiO₂ buffer layer thickness was obtained through analyzing the structural, morphological, electrical, and optical properties of the IZTO thin films. As a result, the IZTO surface roughness is 0.273 ㎚ with a sheet resistance of 25.32 Ω/sq and the average transmittance is 82.51% in the visible region, at a SiO₂ buffer layer thickness of 40 ㎚. The result indicates that the uniformity of surface and the properties of the IZTO thin film on the glass were improved by employing the SiO₂ buffer layer and the IZTO thin film can be applied well to the transparent conductive oxide for display devices.

Optimizing magneto-optical effects in the ferromagnetic semiconductor GaMnAs

A trilayer of the ferromagnetic semiconductor GaMnAs, a SiO2 buffer layer and a piezoelectric ZnO layer, is investigated in view of its use in device implementation to study surface acoustic wave-assisted magnetization switching. The magneto-optical properties: Kerr rotation and ellipticity and magnetic contrast in Kerr microscopy images are investigated as a function of temperature. While the ZnO layer prevents any good quality imaging of magnetic domains, we show that with the SiO2 layer only the polar Kerr rotation and the magnetic contrast are increased by a factor of 2. This result is in good quantitative agreement with calculations using an optical interference model and could be further improved. The detrimental effects of the dielectric layers capping on the Curie temperature and coercive field of the GaMnAs layer can be kept to a reasonable level.

Properties of IZTO Thin Films Deposited on PEN Substrates with Different Working Pressures

In this work, the properties of Indium-Zinc-Tin-Oxide (IZTO) thin films, deposited on polyethylene naphthalate (PEN) with a SiO₂ buffer layer, were analyzed with different working pressures. After depositing the SiO₂ buffer layer on PEN substrates by plasma-enhanced chemical vapor deposition (PECVD), the IZTO thin films were deposited by RF magnetron sputtering with 1 to 7-mTorr working pressure. All the IZTO thin films show an amorphous structure, regardless of the working pressure. The best morphological, electrical, and optical properties are obtained at 3-mTorr working pressure, with a surface roughness of 2.112-nm, a sheet resistance of 8.87-Ω/sq, and a transmittance at 550-nm of 88.44%. These results indicate that IZTO thin films deposited on PEN have outstanding electrical and optical properties, and the PEN plastic substrate is a suitable material for display devices.

TiO2-Based Indium Phosphide Metal-Oxide-Semiconductor Capacitor with High Capacitance Density.

We report a low-temperature InP p-MOS with a high capacitance density of 2.7 µF/cm2, low leakage current of 0.77 A/cm2 at 1 V and tight current distribution. The high-density and low-leakage InP MOS was achieved by using high-κ TiLaO dielectric and ultra-thin SiO2 buffer layer with a thickness of less than 0.5 nm. The obtained EOT can be aggressively scaled down to < 1 nm through the use of stacked TiLaO/SiO2 dielectric, which has the potential for the future application of high mobility III-V CMOS devices.

Influence of oxide buffer layers on the growth of carbon nanotube arrays on carbon substrates

Controllable growth of carbon nanotube (CNT) arrays on carbon substrates requires an oxide buffer layer material such as Al2O3 and SiO2. This research analyzes the influence of these buffer layers on a model carbon substrate composed of pyrolyzed carbon film on flat silicon. Electron microscopy was used to analyze nanocatalyst morphology, particle density, CNT nucleation rate, and CNT morphology for selected growth conditions. It was observed that nanotubes grown on Al2O3 buffer layers had the fastest CNT nucleation rates and more uniform tube diameters, with residual nanocatalyst particles having elongated shapes. In contrast, CNTs formed on SiO2 buffer layers nucleated slower and had more variation in tube diameters, while the nanocatalyst particles remained spherical. Comparisons among SiO2 buffer layers deposited using three different techniques—atomic layer deposition, microwave plasma enhanced chemical vapor deposition and thermal oxidation—indicated that surface roughness plays an important role. Silica layers with the highest roughness had the highest catalytic particle density and tallest carpet height for identical growth conditions. These results provide new insight into the importance of buffer layer chemistry and morphology on growth and controllability of CNT arrays.

Impact of thermal expansion of substrates on phase transition temperature of VO2 films

Non-epitaxial, (010)M1-oriented VO2 thin films were grown on various substrates [amorphous SiO2, Si (001), Al2O3 (0001), and CaF2 (001)] with Pt (111)/SiO2 buffer layers. Phase transition from MoO2-type monoclinic to rutile-type tetragonal structures of these VO2 layers was investigated with temperature-controlled micro-Raman spectroscopy. It was confirmed that substrates with larger thermal expansion coefficient cause larger out-of-plane lattice spacings of both Pt and VO2, and thus lower transition temperatures of VO2 films, as a result of higher in-plane shrinkage during cooling from the deposition temperature. The transition temperatures and aM1/2 lengths, estimated from bM1 lengths, of present samples were compared with previous reports in a strain—temperature phase diagram. The present results fit with previous reports better by assuming that in-plane lattice aspect ratio of VO2 films is not clamped by the substrates but is flexible during the temperature change. Thermal expansion of substrates is an essential parameter to be taken into account when one considers device application of the phase transition properties of VO2 films, especially thick or non-epitaxial.

Effects of Nb2O5 and SiO2 buffer layers on the suppression of potassium out-diffusion into indium tin oxide electrode formed on chemically strengthened glass

We have investigated the electrical properties of indium tin oxide (ITO) thin films deposited on chemically strengthened glass (CSG) substrate by room-temperature ionized physical vapor deposition (IPVD). The ITO thin film on the CSG substrate shows a higher sheet resistance after high-temperature anneal process (>200 °C) possibly due to the out-diffusion of potassium ions (K+) from the CSG. We have improved the electrical properties of the ITO thin film by inserting Nb2O5/SiO2 buffer layers between the ITO layer and the CSG substrate. As a result, a protected and index-matched 30-nm-thick ITO thin film with sheet resistance less than 120 Ω/sq and optical transmittance higher than 90% (at 550 nm) has been achieved.

Crystallization of Mg(Fe0.8Ga0.2)2O4-δ films on silicon with SiO2 and TiO2 buffer layers

The results of analysis of conceivable interactions between film and substrate materials during crystallization of Mg(Fe0.8Ga0.2)2O4-δ films with SiO2 and TiO2 buffer layers on silicon are reported. The calculated data are compared with the physicochemical parameters of Mg(Fe0.8Ga0.2)2O4-δ/Si, Mg(Fe0.8Ga0.2)2O4-δ/TiO2/Si, and Mg(Fe0.8Ga0.2)2O4-δ/SiO2/Si film heterostructures.

The Preparation of ZnO: Al Thin Films on Flexible Substrates by Magnetron Sputtering Method

ZnO: Al film was deposited on TPT substrate with SiO2 buffer layer by RF magnetron sputtering. The obtained film had a hexagonal structure and highly (002) preferred orientation. The lattice constant distortion of the film with buffer layer was decreased and the compressive stress was 0.779GPa. The carrier concentratio reached to 3.15×10+20/cm3. The resistivity of ZAO film with SiO2 buffer layer was about 9.2×10-3 Ω·cm and the average transmittance was over 72% in the range of 380~900nm.