Single-walled Carbon Nanotube Interconnects Research Articles

Effect of temperature and single event transient on crosstalk in coupled single‐walled carbon nanotube (SWCNT) bundle interconnects

AbstractAlthough they have better electrical and thermal properties, thermal issues have become an important challenge to design modern integrated circuits with single‐walled carbon nanotube (SWCNT) bundle interconnects. The equivalent RLC model for SWCNT bundle interconnect is analyzed. Based on the proposed circuit for single event crosstalk (SEC), the influences of the length of line, nanotube diameter, metallic nanotube ratio, and technology node on SEC at different temperatures are studied. The potential impact mechanisms are also discussed. The simulation results show that, compared with one in copper line, peak voltage and pulse width of SEC in SWCNT interconnect are reduced by an average of 23.7% and 8.8%, respectively. The larger the diameter of SWCNT is or the more the ratio of metallic SWCNT is, the weaker the effect of SEC will be. With the increase of the length of line, the crosstalk effect will increase. The pulse width of SEC is more sensitive to the temperature when the length of line is longer. However, the peak voltage is more sensitive to the temperature when the length of line is shorter. As the technology node shrinks from 21 nm to 9.5 nm, the noise area of SEC increases from 0.55 V•ns to 1.89 V•ns, which results in that the crosstalk action time increases significantly.

Investigation on the combined effects of variable Fermi energies and temperatures on the performance of multilayer graphene nanoribbon as interconnects

In the present research, the Fermi energy and temperature-dependent performance of a multilayer graphene nanoribbon (MLGNR) in terms of signal delay and power delay product (PDP) at the global interconnect length for three different technology nodes (32 nm, 22 nm, and 16 nm) were investigated in detail. A Fermi energy and temperature-dependent equivalent single conductor (ESC) based on the analytical model of MLGNR was proposed to evaluate the parasitic parameters, which capture the variations in Fermi energy and electron–phonon scattering as a function of temperature. It was found that the intercalation doping significantly raised the Fermi energy of each layer of MLGNR and consequently, increased its overall conductivity for all three technology nodes. The simulation program with integrated circuit emphasis (SPICE) tool was employed to simulate the parasitic parameters of MLGNR, and results revealed that signal delay and PDP of MLGNR increased with the increasing temperatures (200–500 K); however, gradually decreased with the rise in Fermi energy at 2000 μm length for all three technology nodes. Further, the performances of MLGNR, single-walled carbon nanotube (SWCNT), and copper interconnects were compared in the SPICE simulator, and it was noticed that the intercalation doping of MLGNR yielded a much better performance (as compared to SWCNT and copper interconnects) in terms of signal delay and PDP for all three technology nodes.

Modeling the impact of fundamental and quantum resistance on the performance of SWCNT‐based RLC interconnects

AbstractAn analytical interconnect model for single‐walled carbon nanotube (SWCNT) interconnects is proposed using Fourier method. Nonapproximated transfer function of the RLC SWCNT interconnect is modeled. The effect of fundamental and quantum resistance of SWCNT is incorporated in the transfer function. The propagation delay and overshoot/undershoot voltages are computed using Fourier series technique for SWCNT interconnects. Further, the effect of inductance that is prominent in CNTs is shown in terms of increased number of harmonics. Comparative analysis is carried out for SWCNT and Cu interconnects using MATLAB and SPICE at 65‐nm technology node for various performance parameters. Good accuracy is observed between the analytical and simulated results.

Atomistic- to Circuit-Level Modeling of Doped SWCNT for On-Chip Interconnects

In this paper, we present a hierarchical model for doped single-walled carbon nanotube (SWCNT) for on-chip interconnect application. Our model aims to study CVD grown SWCNTs while considering defects and contacts to metal electrodes. Both defects and poor contacts can worsen CNT conductivities and ultimately deteriorate their interconnect performance. We investigate the fundamental physical mechanism of charge-based doping with the purpose of improving SWCNT electrical conductivity as well as a potential solution to alleviating the impact of defects and contact resistances. We present an atomistic model to study the number of conducting channels of doped SWCNT with different vacancy defect configurations. Circuit-level electrical modeling and simulations are performed on SWCNT interconnect while considering the impact of doping, defects, and contact resistance. Simulation results show up to 80% resistance reduction by doping, where 17% of delay increases due to defects. Additionally, we observe doping can mitigate the impact of defects by more than 12%, but there is almost no improvement in the contact resistance.

Insertion of an Optimal Number of Repeaters in Pipelined Nano-interconnects for Transient Delay Minimization

A novel and highly accurate finite-difference time-domain model is developed for bundled single-walled carbon nanotube (SWCNT) interconnects by considering a fixed configuration that consists of a CMOS driver, a bundled SWCNT interconnect system, and an optimal number of repeaters. Using superposition theorem, this iterative model is applied to the entire chain of repeaters to calculate the total closed-loop delay. An accurate transfer function is modeled for the chain of equi-spaced repeaters in the interconnect system. The transfer function is further used to develop an analytical model for closed-loop delay, considering the optimum number of repeaters as dependent parameter. Further, in order to determine the minimum delay, an analysis is performed to find out the optimum number of repeaters for a given interconnect length. In addition, a detailed study is carried out to observe the impact of interconnect length on time delay, the time delay reduction on increasing the number of repeaters and the effect of excitation magnitude on time delay with power delay product. It is observed that by using SWCNT interconnects, the total number of repeaters and the time delay are reduced by more than 40 and 50%, respectively, compared with the copper (Cu) interconnects. However, the proposed model achieves extreme accuracy, with 4% relative tolerance at maximum, in predicting interconnect performance based on comparison with the HSPICE simulations.

Signal integrity analysis for coupled SWCNT interconnects using stable recursive algorithm

This paper presented a novel stable FDTD algorithm to analyze the crosstalk for coupled metallic single walled carbon nanotube (SWCNT) interconnect based system. This algorithm considers the effect of parameter variation such as: interconnect parasitics, ambient temperature, driver aspect ratios, supply voltages and load capacitance. It has been observed that, the proposed algorithm takes lesser central processing unit (CPU) runtime compared to the conventional FDTD and overcomes the stability problem found in the conventional FDTD and remains stable for all time. Further, we have analyzed the propagation delay of SWCNT interconnect based system for different interconnect parameters. Based on the parameters, minimum delay and crosstalk is obtained. Moreover, the obtained delay and crosstalk is compared with the industry standard HSPICE simulations to check the model accuracy. Additionally, the relative stability of the response obtained from proposed FDTD model is verified using Bode plot and Root locus, the margin of stabilities are noticed as: stability margin for gain is −50 dB and phase stability margin is 40°.

Buffering Carbon Nanotube Interconnects Considering Inductive Effects

While copper interconnect scaling is approaching its fundamental physical limit, increasing wire resistivity and delay have greatly limited the circuit miniaturization. The emerging carbon nanotube (CNT) interconnects, especially single-walled CNTs (SWCNTs) bundle interconnects, have become a promising replacement material. Nevertheless, physical design optimization techniques are still needed to allow them achieving the desired performances. While the preliminary conference version of this work [L. Liu, Y. Zhou and S. Hu, Proc. IEEE Computer Society Annual Symp. on VLSI (ISVLSI), 2014] designs the first timing driven buffer insertion technique for SWCNT interconnects, it only considers resistive and capacitive effects but not inductive effects. Although inductance could be negligible for prevailing CNT-based circuit designs, it becomes important when designing ultra-high performance chips in the future. Thus, this paper considers buffering inductive bundled SWCNTs interconnects through developing a dynamic programming algorithm for buffer insertion using the RLC tree delay model. Our experiments demonstrate that bundled SWCNTs interconnect-based buffering can effectively reduce the delay by over [Formula: see text] when inductive effects are considered. With the same timing constraint, bundled SWCNTs interconnect-based buffering can save over 20% buffer area compared to copper interconnect based buffering, while still running about [Formula: see text] faster.

Effect of electric field on metallic SWCNT interconnects for nanoscale technologies

The influence of an electric field on metallic single walled carbon nanotube (SWCNT) interconnects is studied. A voltage-dependent equivalent circuit model is presented for the impedance parameters of single-wall carbon nanotubes that capture various electron-phonon scattering mechanisms as a function of the electric field. To estimate the performance of SWCNT bundle interconnects, signal delay and power dissipation are calculated based on the field dependent model that results in an improvement in the delay and power estimation accuracy compared to the field-independent model. We find that the power delay product of a SWCNT bundle increases with the increase in electric field but decreases with technology scaling showing that at a low electric field, the SWCNT bundle is a potential reliable alternative interconnect for future high performance VLSI industry at scaled technologies.

Performance and stability analysis of monolayer single‐walled carbon nanotube interconnects

SummaryIn this paper, the monolayer single‐walled carbon nanotube (SWCNT) interconnects are modeled and investigated comprehensively. On the basis of the ratio of the resistance–capacitance values between Cu and SWCNT interconnects, it is demonstrated that the monolayer SWCNT interconnect can provide comparable and even better performance than Cu wire at the 19 nm technology node and beyond. Furthermore, the relative stability analysis is carried out for the monolayer SWCNT interconnects by investigating the relative position of the Nyquist diagram with respect to the critical point (−1, 0). It is shown that the relative stability can be improved by increasing the length and decreasing the SWCNT diameter. Meanwhile, the relative stability also can be improved with the technology advancement. Finally, the crosstalk effects are studied on the basis of the tri‐interconnect architecture. As the monolayer SWCNT interconnects possess much smaller capacitance, the signal integrity can be improved, with the peak noise voltage suppressed greatly. Copyright © 2014 John Wiley & Sons, Ltd.

Repeater insertion for carbon nanotube interconnects

In this reported work, the effects of repeater insertion on the electrical performance of carbon nanotube (CNT) interconnects are studied theoretically. It is shown that the time delay of CNT interconnects, when the length becomes larger than the transition length, can be effectively suppressed by inserting a series of equispaced repeaters. Furthermore, the impact of contact resistance on the repeater insertion is examined and compared. As the single-walled CNT interconnects can endure large contact resistance, its optimal repeater insertion can be determined analytically by neglecting the contact resistances. However, for multi-walled CNT interconnects, the contact resistance must be taken into account in the design of optimal repeater insertion when it exceeds a certain value.

Cu Interconnect Limitations and Opportunities for SWNT Interconnects at the End of the Roadmap

The historical understanding of the interconnect problem in electronics has been that the penalty due to the performance degradation of interconnects with technology scaling would be most severe for long interconnects at the global level. At the nanoscale, however, the nature of the interconnect problem changes and paves the way for new opportunities. This is because of the fact that the metal resistivity at small interconnect dimensions drastically increases due to size effects. In this paper, it is shown that the historical trend of achieving smaller interconnect latency for short local- and intermediate-level interconnects will not hold true for future technology nodes. This paper investigates new opportunities that rise as a consequence of this radical change in the nature of the interconnect problem. Contrary to the previous publications, which have indicated that individual single-wall carbon nanotube (SWNT) interconnects are too resistive for high-performance CMOS applications and must be used in bundles, this paper demonstrates that they can offer significant delay and energy-per-bit improvements in high-performance circuits at the end of the roadmap. Performances of various design scenarios that comprise one or a few parallel individual SWNT interconnects are compared against the performance of the conventional Cu/low- k interconnect technology at future technology nodes using delay, energy per bit, and energy-delay product as metrics.

Modeling of single-wall carbon nanotube interconnects for different process, temperature, and voltage conditions and investigating timing delay

The performance of Single-Wall Carbon Nanotube (SWCNT) based interconnect is investigated in this paper. CNT has become the most promising replacement for Cu based interconnects in future VLSI technologies in the nanometer regime. The process, temperature, and voltage (PTV) dependent equivalent circuit model for CNT based interconnect is developed. The performances of Cu and CNT based interconnects are compared for different ITRS technology nodes. The timing delay is analyzed in CNT based interconnect under different PTV conditions for 32 nm and 16 nm technology nodes. Process variation is modeled by considering the variations in CNT diameter, spacing, and metallic fraction. The delay variation is more than 100 % with process variation whereas with voltage and temperature the delay variations are ±20 % and ±50---60 % from the nominal voltage and room temperature, respectively. The diameter variation of CNT has almost no effect on the timing of SWCNT bundle based interconnects.

Analysis of MWCNT and Bundled SWCNT Interconnects: Impact on Crosstalk and Area

Multiwalled carbon nanotube (MWCNT) and bundled single-walled carbon nanotube (SWCNT) interconnect have provided potentially attractive solution in current deep submicrometer and nanoscale technology. This letter presents a comparative analysis between the MWCNT and the bundled SWCNT at different global interconnect lengths in terms of crosstalk-induced time delay and area by using a three-line-bus architecture. Each line of the bus architecture is replaced by the RLC models of the MWCNT and bundled-SWCNT interconnects. The crosstalk-induced time delay is predicted at the middle line (victim) when the other two lines (aggressors) are switched in the opposite direction. From HSPICE circuit simulation results, it has been observed that the overall improvement in the delay is 52.4% more for the MWCNT as compared with the equivalent bundled-SWCNT interconnects. Consequently, on an average, the MWCNT requires 97.8% lesser area as compared with the bundled-SWCNT interconnects for the same crosstalk-induced time delay.

AC Power Consumption of Single-Walled Carbon Nanotube Interconnects: Non-Equilibrium Green's Function Simulation

AC Power Consumption of Single-Walled Carbon Nanotube Interconnects: Non-Equilibrium Green's Function Simulation

AC Power Consumption of Single-Walled Carbon Nanotube Interconnects: Non-Equilibrium Green's Function Simulation

We theoretically investigate the emittance and dynamic dissipation of a nanoscale interconnect consisting of a metallic single-walled carbon nanotube using the non-equilibrium Green's function technique for AC electronic transport. We show that the emittance and dynamic dissipation depend strongly on the contact conditions of the interconnect and that the power consumption can be reduced by adjusting the contact conditions. We propose an appropriate condition of contact that yields a high power factor and low apparent power.

Analytical Solution of Joule-Heating Equation for Metallic Single-Walled Carbon Nanotube Interconnects

In this paper, we address a closed-form analytical solution of the Joule-heating equation for metallic single-walled carbon nanotubes (SWCNTs). Temperature-dependent thermal conductivity κ has been considered on the basis of second-order three-phonon Umklapp, mass difference, and boundary scattering phenomena. It is found that κ , in case of pure SWCNT, leads to a low rising in the temperature profile along the via length. However, in an impure SWCNT, κ reduces due to the presence of mass difference scattering, which significantly elevates the temperature. With an increase in impurity, there is a significant shift of the hot spot location toward the higher temperature end point contact. Our analytical model, as presented in this study, agrees well with the numerical solution and can be treated as a method for obtaining an accurate analysis of the temperature profile along the CNT-based interconnects.

Compact and Accurate Models of Large Single-Wall Carbon-Nanotube Interconnects

Single-wall carbon nanotubes (SWCNTs) have been proposed for very large scale integration interconnect applications and their modeling is carried out using the multiconductor transmission line (MTL) formulation. Their time-domain analysis has some simulation issues related to the high number of SWCNTs within each bundle, which results in a highly complex model and loss of accuracy in the case of long interconnects. In recent years, several techniques have been proposed to reduce the complexity of the model whose accuracy decreases as the interconnection length increases. This paper presents a rigorous new technique to generate accurate reduced-order models of large SWCNT interconnects. The frequency response of the MTL is computed by using the spectral form of the dyadic Green's function of the 1-D propagation problem and the model complexity is reduced using rational-model identification techniques. The proposed approach is validated by numerical results involving hundreds of SWCNTs, which confirm its capability of reducing the complexity of the model, while preserving accuracy over a wide frequency range.

Improving Elmore Model of RLC Networks for Applying to SWCNT Interconnects

Elmore delay has been widely used as an analytical estimate of the interconnect delays in the performance-driven synthesis and layout of VLSI routing topologies. In this paper, Closed-form solutions for the 50% delay, rise time and overshoots of the step response of distributed Single Wall Carbon Nanotube (SWCNT), which consists RC and RLC parts, are presented for the first time. The proposed approach retains both efficiency and simplicity of the equivalent Elmore model with significantly improved accuracy, through surface fitting (3D) instead of curve fitting (2D).

Cleaning organized single-walled carbon nanotube interconnect structures for reduced interfacial contact resistance

A method is presented for significantly reducing the interfacial contact resistance of single-walled carbon nanotube (SWCNT) interconnects test-structures. Conventional lithographic cleaning steps are insufficient for complete removal of lithographic residues in SWCNT networks, leading to large interfacial contact resistance. Using improved purification procedures and controlled developing time, the interfacial contact resistance between SWCNTs and contact electrodes of Ti/Au were found to reach values below 2% of the overall resistance in two-probe test-structures of SWCNTs, demonstrating the importance of cleaning lithographic residues from the surface of SWCNTs before the fabrication of metal electrodes. These low-resistance contacts are quite stable over a large temperature range, and represent a step towards the implementation of SWCNTs as future interconnects.

Physics-Based Thermal Conductivity Model for Metallic Single-Walled Carbon Nanotube Interconnects

In this letter, a closed-form analytical model for temperature-dependent longitudinal diffusive lattice thermal conductivity (κ) of a metallic single-walled carbon nanotube (SWCNT) has been addressed. Based on the Debye theory, the second-order three-phonon Umklapp, mass difference (MD), and boundary scatterings have been incorporated to formulate κ in both low- and high-temperature regimes. It is proposed that κ at low temperature (T) follows the T3 law and is independent of the second-order three-phonon Umklapp and MD scatterings. The form factor due to MD scattering also plays a key role in the significant variation of κ in addition to the SWCNT length. The present diameter-independent model of κ agrees well with the available experimental data on suspended intrinsic metallic SWCNTs over a wide range of temperature and can be carried forward for electrothermal analyses of CNT-based interconnects.