Thick Silicon Research Articles

СРАВНИТЕЛЬНЫЙ АНАЛИЗ ДЕТЕКТОРОВ ЛИЦ HAAR, HOG, CNN

This work presented in this publication is a continuation of works [1] and [2]. We have shown that in solar cells of the HIT structure, when the thickness of the embedded amorphous layer increases, the efficiency of the solar cell increases, but to a certain point of maximum. The increase in characteristics is due to an increase in the lifetime of non-basic charge carriers in a crystalline silicon substrate. This behaviour of the system can be explained by better passivation of surface States on the silicon substrate. The decrease in the efficiency of the solar cell after reaching the maximum is due to the increase of the resistance structure, which with a point contributes more to the characteristics of the solar cell than the contribution from the passivation of surface states. Using the PECVD method, amorphous silicon films with a thickness of 7, 30 and 50 nm were grown on a single-crystal commercial silicon substrate on both sides. Then, the lifetime of non-basic charge carriers was measured using the contactless Sinton method on these structures. Further, the samples were examined by photoluminescence at room temperature. Using this method, it was possible to obtain the dependence of the concentration of non-equilibrium charge carriers on the intensity of photoluminescence radiation. These dependences showed that the intensity is lower on samples with a lower thickness of amorphous silicon than in samples with a higher thickness of the amorphous layer. The detailed results of this work were first presented by the corresponding author in his dissertation [3], the theses of the work were presented at the conference of young scientists of KazNU [4] and only now the results are published as a full-fledged article in the journal.

A High Aspect Ratio Inverse-Designed Holey Metalens.

Free-standing nanofins or pillar meta-atoms are the most common constituent building blocks in metalenses and metasurfaces in general. Here, we present an alternative metasurface geometry based on high aspect ratio via-holes. We design and characterize metalenses comprising ultradeep via-holes in 5 μm thick free-standing silicon membranes with hole aspect ratios approaching 30:1. These metalenses focus incident infrared light into a diffraction-limited spot. Instead of shaping the metasurface optical phase profile alone, we engineer both transmitted phase and amplitude profiles simultaneously by inverse-designing the lens effective index profile. This approach improves the impedance match between the incident and transmitted waves, thereby increasing the focusing efficiency. The holey platform increases the accessible aspect ratio of optical nanostructures without sacrificing mechanical robustness. The high nanostructure aspect ratio also increases the chromatic group delay range attainable, paving the way for a generation of high aspect ratio ruggedized flat optics, including large-area broadband achromatic metalenses.

Proposal and analysis of ultra-high amplitude-sensitive refractive index sensor by thick silicon multi-slot sub-wavelength Bragg grating waveguide

In this paper, we proposed an ultra-high amplitude-sensitive multi-slot sub-wavelength Bragg grating (MS-SW BG) waveguide sensor on silicon on insulator (SOI) platform with a thick silicon waveguide (WG) and analyzed the design and performances. The MS-SW BG sensor with a thick waveguide supports multi-transverse modes for the first and second modes, whose stopbands (SBs) have different center wavelengths and bandwidths to form a mid-transmission band (MTB) between these SBs. By adjusting sensor parameters, the MTB can be made sharp and steep, and these spectral profiles shift in response to a refractive index change in the surrounding medium. Due to the sharp spectral feature of the MTB, ultra-high amplitude-sensitive performance can be realized. The sensor length is as short as about 10 μm for a grating period count of 21. With an additional increase of the period count the transmission peak count in the MTB region increases, and the shortest wavelength peak among them exhibits steeper slope which is suitable for higher sensitivity. The appearance of the MTB is explained by coupled mode theory and band structure approach. The structural design is investigated from viewpoints of WG thickness, WG width, duty ratio of the grating and so on to demonstrate an ultra-high amplitude sensitivity of 5000 RIU−1 with transmission loss limit up to 3 dB.

Mechanisms of charge carrier transport in polycrystalline silicon passivating contacts

We use temperature-dependent contact resistivity ( ρ c ) measurements to systematically assess the dominant electron transport mechanism in a large set of poly-Si passivating contacts, fabricated by varying (i) the annealing temperature ( T ann ), (ii) the oxide thickness ( t ox ), (iii) the oxidation method, and (iv) the surface morphology of the Si substrate. The results show that for silicon oxide thicknesses of 1.3–1.5 nm, the dominant transport mechanism changes from tunneling to drift-diffusion via pinholes in the SiO x layer for increasing T ann . This transition occurs for T ann in the range of 850°C-950 °C for a 1.5 nm thick thermal oxide, and 700°C-750 °C for a 1.3 nm thick wet-chemical oxide, which suggests that pinholes appear in wet-chemical oxides after exposure to lower thermal budgets compared to thermal oxides. For SiO x with t ox = 2 nm, grown either thermally or by plasma-enhanced atomic layer deposition, carrier transport is pinhole-dominant for T ann = 1050 °C, whereas no electric current through the SiO x layer could be detected for lower T ann . Remarkably, the dominant transport mechanism is not affected by the substrate surface morphology, although lower values of ρ c were measured on textured wafers compared to planar surfaces. Lifetime measurements suggest that the best carrier selectivity can be achieved by choosing T ann right above the transition range, but not too high, in order to induce pinhole dominant transport while preserving a good passivation quality. • Electron transport mechanisms through the oxide are investigated by temperature-dependent contact resistivity measurements. • A transition from tunneling to pinhole dominant transport was observed at T ann = 900–950°C for a 1.5 nm thick thermal oxide. • For a 1.3 nm thick wet-chemical oxide, the transition was observed at T ann = 700–750°C. • Good passivation quality is preserved even in the pinhole regime, although it degrades at extremely high T ann .

Differential cross-section measurements for proton elastic scattering on natSi in the energy range Ep,lab = 3–5 MeV, suitable for EBS

The differential cross section values of the natSi(p,p0) elastic scattering were determined in the energy range of Ep,lab = 3000–5000 keV at 6 backscattering detection angles (120°, 130°, 140°, 1 50°, 160° and 170°). The target was a self-supported thin Si3N4 foil. In addition, a thick crystalline silicon wafer was irradiated on its unpolished side with protons at energies Ep,lab = 3200, 3400, 3600, 3850, 4100, 4300, 4500, 4740, 5000 keV, in order to validate the results of the first experiment. On top of both targets a thin layer of 197Au was evaporated for normalization purposes. Both measurements were performed in parallel, using the 5.5 MV TN11 HV Tandem Accelerator and the high precision goniometer of N.C.S.R. ‘Demokritos’, Athens, Greece. The experimental and data analysis processes are presented in detail, as well as, comparisons between the obtained differential cross sections and already existing datasets in literature, along with the benchmarking results.

Simulation approach of new photovoltaic structures based on epitaxial silicon thin layers on a monocrystalline silicon substrate

In the photovoltaic field, research is focused on two important axes: increasing cell efficiency, and reducing fabrication costs. To reduce the cost of the base materials, it is necessary to reduce the thickness of the active layers. The basic idea is to make a layer of high structural and electronic quality silicon of small thickness (10–50 μm). This layer could be grown by epitaxial techniques on a low-cost monocrystalline silicon substrate with an emitter formed by phosphorus diffusion. The silicon layer is characterized by a diffusion length comparable to its thickness, a value that can be expected for the epitaxial layers. This study aims to optimize the physical and technological performances of a crystalline silicon solar cell deposited by an epitaxial process on a low-cost monocrystalline silicon substrate with large thicknesses since there is no reflector on the backside. This structure is characterized by the following parameters: (Thickness of the base layer XB = 56 μm, the efficiency η = 15.2%, the open-circuit voltage Voc = 623 mV and the short-circuit current Isc = 30 mA). The calculations were carried out by the PC1D software, aiming to find a new solar cell structure by keeping the same characteristic parameters mentioned above (η, Isc, and Voc) while decreasing the thickness of this solar cell. The effect of the different parameters on the performance of the solar cell was investigated. The obtained results showed that it is possible to reduce the substrate thickness from 56 to 30 μm while keeping the same characteristics parameters of the cell (η = 15.2%, Voc = 622.7 mV, Isc = 30.1 mA).

Broadband polarization-insensitive Jerusalem-shaped metasurface absorber based on phase-change material for the visible region

In this paper, a broadband metasurface absorber using phase change material covering the visible region (500 THz to 740 THz) is numerically investigated. The top metallic layer comprises an array of Jerusalem shaped structures periodic in the x-y direction placed above the Ge2Sb2Te5 (GST) layer. The GST layer is followed by a thick metallic layer and silicon dioxide (SiO2). The intermediate dielectric layer in between two metallic layers is made of phase change material. The tri-layer structure is placed above the SiO2 with average absorption is achieved with an efficiency of 92.86% using the amorphous GST (a-GST) phase in the dielectric layer. The average absorption of a-GST is more in the crystalline GST (c-GST) phase in the proposed absorber. The change in the absorption peaks are observed using GST material in the terahertz region. The proposed broadband Jerusalem-shaped metasurface absorber is polarization insensitive due to its symmetrical structure.

The Fabrication and Indentation of Cubic Silicon Carbide Diaphragm for Acoustic Sensing.

In this study, 550 nm thick cubic silicon carbide square diaphragms were back etched from Si substrate. Then, indentation was carried out to samples with varying dimensions, indentation locations, and loads. The influence of three parameters is documented by analyzing load-displacement curves. It was found that diaphragms with bigger area, indented at the edge, and low load demonstrated almost elastic behaviour. Furthermore, two samples burst and one of them displayed pop-in behaviour, which we determine is due to plastic deformation. Based on optimum dimension and load, we calculate maximum pressure for elastic diaphragms. This pressure is sufficient for cubic silicon carbide diaphragms to be used as acoustic sensors to detect poisonous gasses.

Impact of the temperature process on the morphology of 3D temporary bonded wafers: Quantification and reducing of the effect

300 mm diameter thinned-down wafers are manufactured using temporary adhesive bonding. A thermoplastic adhesive and a silicon carrier are used to fabricate 100 μm thick silicon wafers. The impact of temperature on the thickness homogeneity of temporary bonded stacks is studied. From 150 °C up to 300 °C, the total thickness of the structure increases with the temperature. Moreover, its amplitude strongly increases with the thinned wafer stress and the adhesive thickness. On the contrary, it does not depend on the different interface adherence. The thinned wafer stress results in a significant peeling force which drives the deformation of the structure. This deformation is possible because of the high elasticity of the polymer at high temperature. To reduce this deformation, an alternative carrier is proposed yielding reduction of the adhesive thickness at the bonded edge only.

A Low-Loss Silicon MEMS Phase Shifter Operating in the 550-GHz Band

This article presents a low-loss silicon microelectrical mechanical system (MEMS) phase shifter operating in the 500-600 GHz band. The phase shifter consists of a 30-μm thick perforated silicon slab that is moved in and out of a waveguide in the E-plane with a large deflection MEMS actuator. By implementing different hexagonal patterns in the silicon slab, a stepped permittivity is created to impedance match, and thus, reduce return loss. When the silicon slab is inserted into the waveguide, the phase velocity of the incoming wave is decreased, thus resulting in different phase shifts depending on the position of the slab inside the waveguide. The MEMS phase shifter is fully actuated at around 50 V and can move up to ±95 μm, depending on the applied voltage. The insertion loss, when the maximum phase shift is achieved, is measured to be 1.8 dB, compared to a 1.6-dB insertion loss for a waveguide of equivalent length. The return loss is better than 18 dB for the desired band. The measured phase shift, with the slab fully inserted into the waveguide at 550 GHz was 145 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">°</sup> . The MEMS phase shifter enables a variety of applications including phased array antenna systems with scanning capability for mapping of planetary surfaces with an electronically steerable antenna.

Temperature effects on clustering in TPX3-Si pixel detectors

The performance of a Timepix3 (TPX3) detector equipped with a 500 μm thick silicon sensor was evaluated while in vacuum and subjected to temperature variations. Proton beam measurements were performed at the Tandem Van de Graaff accelerator of the University of Montreal to determine the effect of sensor temperature on cluster parameters as well as measured energy. It was observed that temperature had a negative effect on the reconstructed energy obtained from the conventional calibration technique. The sizes of registered proton clusters increased as the sensor was heated up, indicating greater charge drift, resulting in additional charge sharing between neighbouring pixels.

Investigation on the thermal property of a hydroxide catalysis bonded cryogenic cavity

Cryogenic ultra-stable Fabry–Perot cavity is one of the most promising reference cavities for laser stabilization. Here we investigate the thermal property of a hydroxide catalysis bonded silicon–sapphire hybrid cavity for 1064 nm laser stabilization. The zero-thermal expansion temperature is measured to be 15.0 ± 0.1 K, with a slope calculated to be 3 × 10−10 K−2. A simulation model with a few micrometer thick silicon oxidation layer reproduces well the experimental results. The investigations on the thermal property of the hydroxide catalysis bonded components are important for the noise evaluation and optimization. This work would be valuable for the advanced cryogenic optics, and would be interested for researchers working on cryogenic ultra-stable lasers and cryogenic gravitational wave detectors.

Thickness Modeling of Short-Channel Cylindrical Surrounding Double- Gate MOSFET at Strong Inversion Using Depletion Depth Analysis

Aims: The semiconductor technology has a great impact on consistent growth in the Very-Large- Scale Integrated (VLSI) devices. The transistor size has been scaled down from micron to submicron and towards the nanometer regime in the past 30 years due to technological advancements. The most reliable solid-state device is Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET) but this rapid decrease in the device dimensions with the advent of Moore's law follows several problems, such as Short Channel Effects (SCE's) and Hot Carrier Effects. The channel becomes too small at short channel effects that necessitate the analysis of the optimum device designs, in particular in the operating conditions. The charge-sheet model that can quickly analyze a long-channel device, currently in the subthreshold to saturation regime without any discontinuity, turns out to be inappropriate at reduced channel size. Objectives: At the nano-scaling of the device, since the accumulation layer thickness is comparable to the device, the assumption of the channel as a thin sheet of charge vanishes. Though the depletion layers or zone are the regions of the absentia of charges mostly, the existence affects the device behavior and the channel thickness. Therefore, channel thickness modeling becomes essential at various bias conditions to define the specifics of device operation and the channel dependence of the structural parameters. In this work, the objective is to develop an analytical model and numerical analysis of the Cylindrical Surrounding Double-Gate (CSDG) MOSFET, including the thickness, derived based on the formation of depletion depth to analyze the device performance at reducing dimensions. Methods: The analysis is built upon the device's physical and electrical parameters, such as capacitance, electric field, thickness, threshold voltage, effective channel dimensions, drain current, are considered in this research. The depletion region in a MOSFET structure accounts for the inclusion of the source and drain depletion regions, divided primarily into three separate sub-regions as a junction between the diffused source/drain and the substrate depletion under the channel and by region induced by lateral source and drain diffusion. The condition of a planar MOSFET in channel formation, i.e., for strong inversion, and when VGS &gt; VTH has been considered for this mathematical analysis. Results: The computed results of device thickness and depending parameters for a planar MOSFET and the CSDG MOSFET have been obtained. Based on this analysis, the silicon thickness of the typical CSDG MOSFET computed is 180 nm, 281 nm, and 327 nm at VDS 0.2 V, 0.8 V, and 1.2 V, respectively. The achieved results, through the thickness modeling proposed in this work, show that nanoscale CSDG MOSFET can be deployed for the improvements in the device performance and novel design modifications. Conclusion: The analysis presented in this work significantly contributes to understanding the dependence of semiconductor thickness in CSDG MOSFET and serves as a guide for future modifications in the structure for the device compactness.

Broad and nearly white photoluminescence induced by the nitrogen incorporation in Si/SiOxNy multilayers

This work focuses on the study of the photoluminescent (PL) properties of Si/SiOxNy multilayer (ML) structures as a function of the thickness of silicon and silicon oxynitride layers. MLs were thermally annealed to induce the formation of silicon nanoparticles (Si-NPs). Infra-red spectroscopy (IR) vibration bands related to SiON bonds were observed and their intensity was stronger as the thickness of SiOxNy layers increased, indicating a larger N content. X-ray photoelectron spectroscopy (XPS) shows that the N content grows from 2 to 4% when the thickness of the SiOxNy layers increases from 2 to 6 nm, respectively; while it remains almost at the same value when the Si layer thickness changes. The analysis of the XPS-Si2p spectra reveals the formation of Si-NPs surrounded by a SiOxNy matrix by the existence of oxidation states such as Si4+, Si1+ and elemental silicon (Si0), as well as oxidation states attributed to the incorporation of nitrogen (N). MLs with the lowest N content (2%, thinnest oxynitride layer) emit a PL band centered in the red region, associated to the presence of Si-NPs and O-related defects. Nevertheless, an additional blue-green PL band is obtained when the nitrogen content increases (4%, thickest oxynitride layers). The N content induce radiative centers related to transitions of K or N centers which activates the blue-green PL. The diversity of these radiative centers within these Si/SiOxNy MLs produce a broad nearly white PL band, which is important for the development fo a white light source.

Buried 3D spot-size converters for silicon photonics

In this article, an efficient spot-size converter (SSC) for low-loss optical mode transition between large and small waveguides based upon a buried three-dimensional (3D) taper is demonstrated. The SCC can pave the way for scalable, low-loss coupling between on-chip waveguides of different sizes and with external components such as optical fibers and III-V active components, and it can be a key element in solving the challenges surrounding the economic high volume packaging and assembly of photonic integrated circuits. Through the use of a bespoke fabrication process, continual tapering of the waveguide dimensions both in width and height is achieved, offering minimal perturbance of the optical mode throughout the structure. The SSC exploits the space of the buried oxide (BOX) on a standard silicon-on-insulator wafer, leaving a planar top wafer surface, meaning that, crucially, further processing of the wafer is not inhibited in any way. Fabricated proof-of-concept devices demonstrate coupling between standard single-mode 220 nm thick silicon waveguides and large-core waveguides with dimensions about 3 µm wide and 1.5 µm height with BOX thickness of 2 µm. Coupling losses as low as 0.56 dB are achieved, limited mostly by the material loss of the polysilicon used. Substantial improvements can be yielded by simply changing the infill material and through optimization of the fabrication process and design. The demonstrated SSC approach can further be applied to other photonic platforms such as silicon nitride on insulator and so on.

9.1% efficient zinc oxide/silicon solar cells on a 50 μm thick Si absorber

Today, silicon solar cells (amorphous films and wafer-based) are a main source of green energy. These cells and their components are produced by employing various technologies. Unfortunately, during the production process, chemicals that are harmful for the environment and for human life are used. For example, hydrofluoric acid is used to texture the top electrode to improve light harvesting. In this work, and also in recent ones, we report a way to obtain 3D textures on the top electrode by using zinc oxide nanorods. The efficiency of a textured solar cell structure is compared with the one obtained for a planar zinc oxide/silicon structure. The present results show the possibility to produce efficient solar cells on a relatively thin 50 μm thick silicon substrate. Solar cells with structured top electrodes were examined by numerous measuring techniques. Scanning electron microscopy revealed a grain-like morphology of the magnesium-doped zinc oxide film. The size of the grains is closely related to the structure of the nanorods. The external quantum efficiency of the cells was measured. The obtained solar cell shows response in a wide spectral range from ultraviolet to infrared. Current–voltage and current–voltage–temperature measurements were performed to evaluate basic photovoltaic parameters. At room temperature, the cells efficiency equals to 9.1% for textured structures and 5.4% for planar structures, respectively. The work, therefore, describes an environmentally friendly technology for PV architecture with surface textures increasing the efficiency of PV cells.

Ultrathin 5 μm Thick Silicon Nanowires Intercalated with Reduced Graphene Oxide Binderless Anode for Lithium-Ion Batteries

Ultrathin 5 μm Thick Silicon Nanowires Intercalated with Reduced Graphene Oxide Binderless Anode for Lithium-Ion Batteries

FIN Junctionless Field Effect Transistor (FIN-JLFET) with Ground Plane for Surpassing Parasitic BJT Action

The lateral band-to-band tunneling (L-BTBT) leakage mechanism increases the OFF state current and prevents the junctionless transistor from scaling. The effect of L-BTBT on FIN shaped gate Junctionless field effect transistor(JLFET) with the ground plane (GP) in oxide has been investigated. The proposed device is simulated using 3-D Silvaco TCAD and shows that it can mitigate the L-BTBT and leads to efficient volume depletion which relaxes the requirements of ultra-thin silicon thickness and high workfunction of the gate electrode. The results show significantly reduced OFF-state current and high Ion/Ioff ratio even at scaled gate length beyond 10 nm along with the reduction in drain induced barrier lowering and threshold voltage roll-off. Thus, the proposed device shows better performance at sub-10 nm node.

Selective area growth of cubic gallium nitride on silicon (001) and 3C-silicon carbide (001)

Selective area growth of cubic gallium nitride is investigated in a plasma assisted molecular beam epitaxy setup. 380 μm thick silicon (001) and 10 μm thick 3C-silicon carbide (001), grown on 500 μm silicon (001), were used as substrates and structured with silicon dioxide masks. Selective area growth on silicon and 3C-silicon carbide was tested for both thermal and plasma deposited oxides. Multiple growth series showed that gallium nitride coverage of silicon dioxide vanished at growth temperatures of 870 °C for silicon substrates and at a surface temperature of 930 °C for 3C-silicon carbide substrates. Whereas gallium nitride is grown in its hexagonal form on silicon substrates, phase pure cubic gallium nitride could selectively be grown on the 3C-silicon carbide template. The cubic phase is verified by high resolution x-ray diffraction and low temperature photoluminescence measurements. The photoluminescence measurements prove that gallium nitride condensed selectively on the 3C-silicon carbide surfaces uncovered by silicon dioxide.

Multi-energy reconstructions, central electron temperature measurements, and early detection of the birth and growth of runaway electrons using a versatile soft x-ray pinhole camera at MST.

A multi-energy soft x-ray pinhole camera has been designed, built, and deployed at the Madison Symmetric Torus to aid the study of particle and thermal transport, as well as MHD stability physics. This novel imaging diagnostic technique employs a pixelated x-ray detector in which the lower energy threshold for photon detection can be adjusted independently on each pixel. The detector of choice is a PILATUS3 100K with a 450 μm thick silicon sensor and nearly 100 000 pixels sensitive to photon energies between 1.6 and 30 keV. An ensemble of cubic spline smoothing functions has been applied to the line-integrated data for each time-frame and energy-range, obtaining a reduced standard-deviation when compared to that dominated by photon-noise. The multi-energy local emissivity profiles are obtained from a 1D matrix-based Abel-inversion procedure. Central values of Te can be obtained by modeling the slope of the continuum radiation from ratios of the inverted radial emissivity profiles over multiple energy ranges with no a priori assumptions of plasma profiles, magnetic field reconstruction constraints, high-density limitations, or need of shot-to-shot reproducibility. In tokamak plasmas, a novel application has recently been tested for early detection, 1D imaging, and study of the birth, exponential growth, and saturation of runaway electrons at energies comparable to 100 × Te,0; thus, early results are also presented.