Silicon-on-insulator Platform Research Articles

Inverse design of highly-efficient and broadband polarization beam splitter on SOI platform

Polarization beam splitters (PBSs) are essential components in integrated optics, particularly for applications demanding high polarization purity. However, most existing PBS designs rely on complex forward design methods, often constrained by large size and limited performance. In this study, we introduce an inverse design approach based on shape optimization to develop a high-performance PBS on the silicon-on-insulator (SOI) platform. By optimizing the boundary shape, the proposed PBS exhibits low insertion loss (<1.4 dB) and high extinction ratio (>9.2 dB) across a bandwidth range of 65 nm (1500 nm–1565 nm), as confirmed by experimental results. The footprint of the device measures 1.7 × 16 μm2, and the entire structure can be fabricated through a single lithography step. This work holds great promise for the convenient and efficient design of on-chip PBSs.

Rapid-calibration optical tunable delay line on 3-µm-thick SOI photonic platforms.

Optical tunable delay lines (OTDLs) which can capture temporal optical signals, and overcome the challenge of halting light are crucial for optical communications and microwave photonics. Here, a rapid-calibration 8-bit OTDL on the 3-µm-thick silicon-on-insulator (SOI) platform consisting of waveguide spirals and integrated optical switches is proposed, achieving a maximum delay time of 3570 ps with a resolution of 14 ps/stage. The large delay is attributed to the spirals of a 3-µm-thick SOI platform featuring a delay efficiency of approximately 11.49 ps/mm, with wavelength-insensitivity transmission loss of 0.32 dB/cm, and the polarization-dependent loss is only 0.075 dB/cm within 140 nm bandwidth. In addition, the optical switches with extinction ratios up to 50 dB. Integrated variable optical attenuators can suppress crosstalk and facilitate rapid calibration for OTDLs. The advantages of OTDLs' large delay time, high signal-to-noise, and rapid calibration make them suitable for optical programmers and microwave photonics radars.

Feasibility of a localized mode analysis method in an SOI platform based on carrier grating

In order to measure the intensity of modes that are transmitted inside the devices on the silicon-on-insulator (SOI) platform, researchers usually use pre-processed couplers to make the optical modes diffract out of the chip. However, the output couplers have an influence (e.g., attenuation and wavelength selectivity) on the modes of concern. Besides, as the quantity and variety of devices integrated into the SOI platform continue to escalate, the traditional method also shows limits on detecting devices far from the chip edge. So, is it feasible to directly and locally measure one specific mode’s intensity on some waveguide-based devices like the directional coupler, polarization beam splitter, and so on. Interference of two coherent pump beams has the capability to induce a periodic carrier distribution in the material, thus modulating the refractive index, effectively creating a temporary and erasable diffraction grating. In this study, an off-chip, non-destructive, and localized detection method based on carrier grating is proposed. A theoretical model is developed to calculate carrier dynamics under various pump configurations. Leveraging the finite-difference time-domain (FDTD) method and accounting for free carrier index (FCI) and free carrier absorption (FCA) effects, analysis of the quantitative impact of pump intensity and radius on the diffraction efficiency of the carrier grating in the silicon-on-insulator (SOI) platform and its far-field divergence characteristics is provided. Ultimately, this research contributes to a discussion on several commonly used application scenarios and the feasibility of experimental approaches. A spatial resolution of less than 10 µm and a diffraction efficiency of −15dB while simultaneously maintaining a far-field divergence of 7.8° for the SOI platform are proposed at the end of this article.

Ka-band thin film lithium niobate photonic integrated optoelectronic oscillator

Photonics integration of an optoelectronic oscillator (OEO) on a chip is attractive for fabricating low cost, compact, low power consumption, and highly reliable microwave sources, which has been demonstrated recently in silicon on insulator (SOI) and indium phosphide (InP) platforms at X-band around 8 GHz. Here we demonstrate the first integration of OEOs on the thin film lithium niobate (TFLN) platform, which has the advantages of lower V π , no chirp, wider frequency range, and less sensitivity to temperature. We have successfully realized two different OEOs operating at Ka-band, with phase noises even lower than those of the X-band OEOs on SOI and InP platforms. One is a fixed frequency OEO at 30 GHz realized by integrating a Mach–Zehnder modulator (MZM) with an add-drop microring resonator (MRR), and the other is a tunable frequency OEO at 20–35 GHz realized by integrating a phase modulator (PM) with a notch MRR. Our work marks the first step of using TFLN to fabricate integrated OEOs with high frequency, small size, low cost, wide range tunability, and potentially low phase noise.

Integrated Photonic Passive Building Blocks on Silicon-On-Insulator Platform

Integrated photonics on Silicon-On-Insulator (SOI) substrates is a well developed research field that has already significantly impacted various fields, such as quantum computing, micro sensing devices, biosensing, and high-rate communications. Although quite complex circuits can be made with such technology, everything is based on a few ’building blocks’ which are then combined to form more complex circuits. This review article provides a detailed examination of the state of the art of integrated photonic building blocks focusing on passive elements, covering fundamental principles and design methodologies. Key components discussed include waveguides, fiber-to-chip couplers, edges and gratings, phase shifters, splitters and switches (including y-branch, MMI, and directional couplers), as well as subwavelength grating structures and ring resonators. Additionally, this review addresses challenges and future prospects in advancing integrated photonic circuits on SOI platforms, focusing on scalability, power efficiency, and fabrication issues. The objective of this review is to equip researchers and engineers in the field with a comprehensive understanding of the current landscape and future trajectories of integrated photonic components on SOI substrates with a 220 nm thick device layer of intrinsic silicon.

Highly efficient fiber to Si waveguide free-form coupler for foundry-scale silicon photonics

As silicon photonics transitions from research to commercial deployment, packaging solutions that efficiently couple light into highly compact and functional sub-micrometer silicon waveguides are imperative but remain challenging. The 220 nm silicon-on-insulator (SOI) platform, poised to enable large-scale integration, is the most widely adopted by foundries, resulting in established fabrication processes and extensive photonic component libraries. The development of a highly efficient, scalable, and broadband coupling scheme for this platform is therefore of paramount importance. Leveraging two-photon polymerization (TPP) and a deterministic free-form micro-optics design methodology based on the Fermat’s principle, this work demonstrates an ultra-efficient and broadband 3-D coupler interface between standard SMF-28 single-mode fibers and silicon waveguides on the 220 nm SOI platform. The coupler achieves a low coupling loss of 0.8 dB for the fundamental TE mode, along with 1 dB bandwidth exceeding 180 nm. The broadband operation enables diverse bandwidth-driven applications ranging from communications to spectroscopy. Furthermore, the 3-D free-form coupler also enables large tolerance to fiber misalignments and manufacturing variability, thereby relaxing packaging requirements toward cost reduction capitalizing on standard electronic packaging process flows.

Slow-light-enhanced Brillouin scattering with integrated Bragg grating.

Advancements in photonic integration technology have enabled the effective excitation of simulated Brillouin scattering (SBS) on a single chip, boosting Brillouin-based applications such as microwave photonic signal processing, narrow-linewidth lasers, and optical sensing. However, on-chip circuits still require large pump power and centimeter-scale waveguide length to achieve a considerable Brillouin gain, making them both power-inefficient and challenging for integration. Here, we exploit the slow-light effect to significantly enhance SBS, presenting the first, to the best of our knowledge, demonstration of a slow-light Brillouin-active waveguide on the silicon-on-insulator (SOI) platform. By integrating a Bragg grating with a suspended ridge waveguide, a 2.1-fold enhancement of the forward Brillouin gain coefficient is observed in a 1.25 mm device. Furthermore, this device shows a Brillouin gain coefficient of 1,693 m-1W-1 and a mechanical quality factor of 1,080. The short waveguide length reduces susceptibility to inhomogeneous broadening, enabling the simultaneous achievement of a high Brillouin gain coefficient and a high mechanical quality factor. This approach introduces an additional dimension to enhance acousto-optic interaction efficiency in the SOI platform and holds significant potential for microwave photonic filters and high spatial resolution sensing.

Algorithmically calibrated optical switch with high-extinction-ratio and low-polarization-dependence on 3-μm-thick SOI platform

Crosstalk, calibration complexity, and polarization dependence obstacle the precision of optical networks such as microwave photonics beamforming networks (MPBNs). The optical switch presented in this work, boasting high tolerance and polarization insensitivity, utilizes multimode interferometers (MMIs), a thermo-optical phase shifter, and variable optical attenuators (VOAs) on the 3 μm-thick silicon-on-insulator (SOI) platform. The switch exhibits extinction ratio (ER) exceeding 32.5 dB within 140 nm bandwidth, with maximum ER of 50 dB, accompanied by 0.4 dB loss, and features switching speed of 16 μs/21 μs In 10-layer networks, the VOA-assist golden-section algorithm enables optimal calibration within 170 iterations, serving as fundamental component for establishing precise optical networks.

High-Q and high finesse silicon microring resonator

We demonstrate the design, fabrication, and experimental characterization of a single transverse mode adiabatic microring resonator (MRR) implemented using the silicon-on- insulator (SOI) platform using local oxidation of silicon (LOCOS) approach. Following its fabrication, the device was characterized experimentally and an ultrahigh intrinsic Q-factor of ∼2 million with a free spectral range (FSR) of 2 nm was achieved, giving rise to a finesse of ∼1100, the highest demonstrated so far in SOI platform at the telecom band. We have further studied our device to analyze the source of losses that occur in the MRR and to understand the limits of the achievable Q-factor. The surface roughness was quantified using AFM scans and the root mean square roughness was found to be ∼ 0.32±0.03 nm. The nonlinear losses were further examined by coupling different optical power levels into the MRR. Indeed, we could observe that the nonlinear losses become more pronounced at power levels in the range of hundreds of microwatts. The demonstrated approach for constructing high-Q and high finesse MRRs can play a major role in the implementation of devices such as modulators, sensors, filters, frequency combs and devices that are used for quantum applications, e.g., photon pair generation.

Optimization and comprehensive comparison of thermo-optic phase shifter with folded waveguide on SiN and SOI platforms

The thermo-optic phase shifter (TOPS) using metal heaters is widely used in various integrated photonics devices for its advantages of simple fabrication, low loss, and low cost. While folded waveguides are commonly employed to enhance the performance of these phase shifters, a comprehensive understanding of how varying the number of folds and the dimensions of heaters impact the device's performance is still lacking. In this paper, we conducted a comprehensive comparison and optimization into the impact of the number of folded waveguides and the width of heater on the performance of folded waveguide thermo-optic phase shifter (FW-TOPS) on silicon nitride (SiN) and silicon-on-insulator (SOI) platforms using the finite element method (FEM). The research has revealed that both the number of waveguides and the width of the heater exert a substantial influence on the performance of FW-TOPS, particularly on platforms with low refractive index contrast. In cases where the number of waveguides is the same, and the width of the heater electrode is identical, the comparison indicates that on the SiN platform, the FW-TOPS in waveguide Combination 2 (waveguide 1 is a single-mode waveguide, while waveguide 2 is a multi-mode waveguide) exhibits superior overall performance, compared to waveguide Combination 1 (both waveguide 1 and waveguide 2 are single-mode waveguides). However, on the SOI platform, FW-TOPS with waveguide Combination 1 demonstrates better overall performance compared to waveguide Combination 2. Furthermore, the simulation results indicate that although air trenches can significantly reduce the power consumption of the FW-TOPS, they also lead to a substantial decrease in the response speed. Therefore, on the 300 nm-thick SiN and 220 nm-thick SOI platforms, air trenches do not effectively enhance the overall performance of the FW-TOPS.

Optical notch filters with tunable central wavelength and reconfigurable free spectral range on SOI platform

Conventional optical filter is typically easy to realize adjustable central wavelength and bandwidth, but it's quite challenging to obtain reconfigurable free spectral range (FSR), thus limiting its application in a variety of fields. In this paper, we propose novel schemes and implement two kinds of tunable and reconfigurable optical notch filters (TRNF) on Silicon-on-Insulator (SOI) platform for the first time. The experimental results indicate that the FSR reconfigurable range is 20 GHz–200 GHz for a five-stage TRNF based on microring resonators (MRR), and the central wavelength can be tuned over the whole free spectral range. Moreover, a five-stage TRNF based on Mach-Zehnder interferometers (MZI) offers a broader FSR reconfigurable range of 7.5 GHz–232.5 GHz. Our results will improve the spectrum usage efficiency of programmable photonic integrated circuits and pave the way for the development of next generation elastic optical network (EON).

High-performance grating couplers on 220-nm thick silicon by inverse design for perfectly vertical coupling

Efficient grating couplers (GCs) for perfectly vertical coupling are difficult to realize due to the second-order back reflection. In this study, apodized GCs (AGCs) are presented for achieving perfectly-vertical coupling to 220 nm thick silicon-on-insulator (SOI) waveguides in the C-band. We compare the performance of the AGCs to that of uniform GCs (UGCs) and demonstrate the superiority of the former. The AGCs were obtained through inverse design using gradient-based optimization and were found to effectively suppress back reflection and exhibit better matching to the Gaussian beam profile. The design and measurement results show that AGCs have a 3 dB lower coupling loss than UGCs. We fabricated focusing AGCs by electron beam lithography with a single, 70 nm shallow etch and a minimum feature size of 100 nm, which makes them compatible with CMOS technology. The AGCs achieved a coupling efficiency of −5.86 dB for perfectly vertical coupling. Overall, our results demonstrate the potential of AGCs for achieving high-performance coupling in the C-band on the SOI platform.

100 Gbps PAM4 ultra-thin photodetectors integrated on SOI platform by micro transfer printing.

The integration of compact high-bandwidth III-V active devices in a scalable manner is highly significant for Silicon-on-insulator (SOI) photonic integrated circuits. To address this, we demonstrate the integration of pre-fabricated 21 × 57 µm2 InGaAs photodetector (PD) coupons with a thickness of 675 nm to a 500 nm SOI platform using a direct bonding micro-transfer printing process. The common devices are coupled to the Si waveguides via butt, grating and evanescent coupling schemes with responsivities of 0.13, 0.3 and 0.6 A/W respectively, in line with simulations. The thin device facilitates simplified high-speed connections without the need for an interlayer dielectric. A back-to-back data communication rate of 50 Gb/s is achieved with on-off keying and with post processing of four-level pulse-amplitude modulation (PAM4) 100 Gb/s is realized. Potentially, around 1 million devices per 75 mm InP wafer can be attained. The integration of compact PDs exhibited in this work can be extended to modulators and lasers in the future.

Sidewall grating slot waveguide microring resonator biochemical sensor.

Integrated microring resonator structures based on silicon-on-insulator (SOI) platforms are promising candidates for high-performance on-chip sensing. In this work, a novel sidewall grating slot microring resonator (SG-SMRR) with a compact size (5 µm center radius) based on the SOI platform is proposed and demonstrated experimentally. The experiment results show that the refractive index (RI) sensitivity and the limit of detection value are 620 nm/RIU and 1.4 × 10-4 RIU, respectively. The concentration sensitivity and minimum concentration detection limit are 1120 pm/% and 0.05%, respectively. Moreover, the sidewall grating structure makes this sensor free of free spectral range (FSR) limitation. The detection range is significantly enlarged to 84.5 nm in lab measurement, four times that of the FSR of conventional SMRRs. The measured Q-factor is 3.1 × 103, and the straight slot waveguide transmission loss is 24.2 dB/cm under sensing conditions. These results combined with the small form factor associated with a silicon photonics sensor open up applications where high sensitivity and large measurement range are essential.

Compact Design for Bi-Polarization Quantum Routers on SOI Platform

An ultra-compact optical quantum router (QR) consisting of a Mach–Zehnder interferometer (MZI) and waveguide tapers is proposed and numerically simulated, using silicon-on-insulator (SOI). The interferometer is designed to work at the center wavelength of 1550 nm with visibilities of 99.65% and 98.80% for TE and TM polarizations, respectively. Using the principle of phase compensation and self-image, the length of the waveguide tapers is shortened by an order of magnitude with the transmission above 95% for both TE and TM polarizations. Furthermore, polarization beam splitters (PBS) with an ultra-compact footprint of 1.4 × 10.4 μm2 with transmissions of 98% for bi-polarizations are achieved by introducing anisotropic metamaterials. The simulated results indicate that the interferometer facilitates low loss, a broad operating spectral range, and a large tolerance to size variation in fabrications. The optical switch possesses the routing function while maintaining the polarization states, which promises to pave the point-to-point BB84 protocol into applications of network-based quantum communication.

All-silicon TM polarizer covering the 1260-1675 nm bandwidth using a band engineered subwavelength grating waveguide.

A TM polarizer working for whole optical communication bands with high performance is proposed on a 220-nm-thick silicon-on-insulator (SOI) platform. The device is based on polarization-dependent band engineering in a subwavelength grating waveguide (SWGW). By utilizing an SWGW with a relatively larger lateral width, an ultra-broad bandgap of ∼476 nm (1238 nm-1714nm) is obtained for the TE mode, while the TM mode is well supported in this range. Then, a novel tapered and chirped grating design is adopted for efficient mode conversion, which results in a polarizer with a compact footprint (3.0 µm × 18 µm), low insertion loss (IL < 1.15 dB) and high polarization extinction ratio (PER > 21 dB) covering O-U bands (1260 nm-1675 nm). Experimental results show that the fabricated device has an IL < 1.0 dB and PER > 22 dB over a 300- nm bandwidth, which is limited by our measurement setup. To the best of our knowledge, no TM polarizer on the 220-nm SOI platform with comparable performance covering O-U bands has ever been reported.

Ultra-High-Q Racetrack Resonators on Thick SOI Platform Through Hydrogen Annealing Smoothing

We implemented a hydrogen annealing based post-processing technique as a tool to improve the sidewall roughness of 3 μm thick silicon-on-insulator (SOI) waveguides and demonstrated ultra-high- <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Q</i> factors on racetrack resonators leveraging on the propagation loss reduction achieved through the smoothing process. The designed racetracks are based on a combination of rib waveguides and strip-waveguide-based Euler bends. We measured intrinsic quality factors of 14×10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">6</sup> for a racetrack with a footprint of ∼5.5 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> and 10.7×10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">6</sup> for a smaller racetrack with footprint of ∼1.48 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . The estimated propagation loss for the rib waveguides was ∼2.7 dB/m, representing a ×3 reduction respect to the previously measured losses of 3 μm thick SOI rib waveguides treated with thermal oxidation smoothing. Overall, the post-processing technique allowed to significantly reduce the sidewall roughness without altering the geometry of the waveguides, unlike in sub-micron scale SOI platforms, making it an attractive solution for applications demanding ultra-low losses.

Compact, easy-accessible and tunable double injection micro-ring element for real-time spectral reshaping

To realize the compact and easy-accessible performance of the programmable multipurpose photonic integrated circuits, a tunable double injection micro-ring element on the silicon-on-insulator (SOI) platform is proposed in this paper. The element possesses an inherent property that can provide two free spectral range states for only one single ring length. Reconfigurability and programmability can be realized by modulating a specific group of parameters, including coupling coefficients, phase difference, and power splitting ratio. Various spectra are experimentally demonstrated and characterized at wavelengths around 1550 nm, such as rectangular, tangent-like, bandpass, and so on. By taking the advantage of the SOI platform, the power consumption and footprint are improved compared to schemes with similar configurations.

Broadband Ultrasound Detection Using Silicon Micro-Ring Resonators

High sensitivity, broadband bandwidth, small size and scalability to a fine-pitch matrix of ultrasound (US) sensors are essential for high-resolution ultrasonography and photoacoustic tomography. In this work, we demonstrated a method to build micro-ring resonators (MRR) as US sensors on the Silicon-On-Insulator (SOI) platform. To improve the sensitivity, transverse magnetic (TM) mode is utilized to increase the mode interaction with the cladding as well as reduce the scattering loss caused by sidewall roughness. Besides, the SU-8 elastomer is introduced as cladding to enhance US response. The fabricated 10 μm-radius MRR with only one standard lithography process shows a high quality (Q) of 7.4 × 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">4</sup> and a steep slope of 351 dB/nm. The US sensing bandwidth reaches 165 MHz at −6 dB with a high sensitivity of 14.5 mPa Hz <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">−1/2</sup> . The high refractive index of the silicon waveguide contributes to an order of magnitude smaller sensing area than the polymer-based MRR. The proposed sensitive MRRs on the SOI platform makes it very promising for mass manufacturing integrated dense US arrays.

Fully Integrated Silicon Photonic Erbium-Doped Nanodiode for Few Photon Emission at Telecom Wavelengths.

Recent advancements in quantum key distribution (QKD) protocols opened the chance to exploit nonlaser sources for their implementation. A possible solution might consist in erbium-doped light emitting diodes (LEDs), which are able to produce photons in the third communication window, with a wavelength around 1550 nm. Here, we present silicon LEDs based on the electroluminescence of Er:O complexes in Si. Such sources are fabricated with a fully-compatible CMOS process on a 220 nm-thick silicon-on-insulator (SOI) wafer, the common standard in silicon photonics. The implantation depth is tuned to match the center of the silicon layer. The erbium and oxygen co-doping ratio is tuned to optimize the electroluminescence signal. We fabricate a batch of Er:O diodes with surface areas ranging from 1 µm × 1 µm to 50 µm × 50 µm emitting 1550 nm photons at room temperature. We demonstrate emission rates around 5 × 106 photons/s for a 1 µm × 1 µm device at room temperature using superconducting nanowire detectors cooled at 0.8 K. The demonstration of Er:O diodes integrated in the 220 nm SOI platform paves the way towards the creation of integrated silicon photon sources suitable for arbitrary-statistic-tolerant QKD protocols.