SOI Pixel Research Articles

Development of an X-ray imaging system with SOI pixel detectors

An X-ray imaging system employing pixel sensors in silicon-on-insulator technology is currently under development. The system consists of an SOI pixel detector (INTPIX4) and a DAQ system based on a multi-purpose readout board (SEABAS2). To correct a bottleneck in the total throughput of the DAQ of the first prototype, parallel processing of the data taking and storing processes and a FIFO buffer were implemented for the new DAQ release. Due to these upgrades, the DAQ throughput was improved from 6Hz (41Mbps) to 90Hz (613Mbps). The first X-ray imaging system with the new DAQ software release was tested using 33.3keV and 9.5keV mono X-rays for three-dimensional computerized tomography. The results of these tests are presented.

Reduction of cross-talks between circuit and sensor layer in the Kyoto's X-ray astronomy SOI pixel sensors with Double-SOI wafer

We have been developing silicon-on-insulator pixel sensors, “XRPIXs,” for future X-ray astronomy satellites. XRPIXs are equipped with a function of “event-driven readout,” with which we can read out only hit pixels by trigger signals and hence realize good time resolution reaching ∼10μs. The current version of XRPIX suffers from a problem that the spectral performance degrades in the event-driven readout mode compared to the frame-readout mode, in which all the pixels are read out serially. Previous studies have clarified that one of the causes is capacitive coupling between the sense node and the trigger signal line in the circuit layer. In order to solve the problem, we adopt the Double SOI structure having a middle silicon layer between the circuit and the sensor layers. We expect the middle silicon layer to work as an electrostatic shield and reduces the capacitive coupling. In this paper, we report the spectroscopic performance of XRPIX with the middle silicon layer. We successfully reduce the capacitive coupling and the readout noise.

First results of a Double-SOI pixel chip for X-ray imaging

Aiming at low energy X-ray imaging, a prototype chip based on Double-SOI process was designed and tested. The sensor and pixel circuit were characterized. The long lasting crosstalk issue in SOI technology was understood. The operation of pixel was verified with a pulsed infrared laser beam. The depletion of sensor revealed by signal amplitudes is consistent with the one revealed by I–V curve. An s-curve fitting resulted in a sigma of 153 e− among which equivalent noise charge (ENC) contributed 113 e−. It's the first time that the crosstalk issue in SOI technology was solved and a counting type SOI pixel demonstrated the detection of low energy radiation quantitatively.

The first back-side illuminated types of Kyoto's X-ray astronomy SOIPIX

We have been developing Kyoto's X-ray astronomy SOI pixel sensors, called “XRPIX”, aiming to extend the frontiers of X-ray astronomy with the wide-band imaging spectroscopy in the 0.5–40keV band. A dead layer on the X-ray incident surface should ideally be as thin as possible to achieve a high sensitivity below 1keV, and the depletion layer is required to be thick enough to detect 40keV X-rays. Thus, we have started developing fully-depleted back-side illuminated (BI) types of XRPIXs. This paper reports on our first two BI devices and their X-ray evaluation (2.6–12keV). The device named “XRPIX2b-FZ-LA” successfully reaches a full depletion with a thickness of 500μm. On the other hand, it has a dead layer with a thickness of 1.1–1.5μm and struggles to achieve the requirement of 1.0μm. The other device named “XRPIX2b-CZ-PZ”, which is applied with a thin Si sensor-layer and an improved back-side process, is found to satisfy the requirement with its thickness of 0.9–1.0μm, including Al optical blocking filter of 0.2μm, although the Si sensor-layer is rather thin with 62μm. We also describe in this paper the X-ray calibration system that we have built for the X-ray evaluation of XRPIXs.

Test of a fine pitch SOI pixel detector with laser beam**Supported by National Natural Science Foundation of China (11375226)

A silicon pixel detector with fine pitch size of 19 μm × 19 μm, developed based on SOI (silicon-on-insulator) technology, was tested under the illumination of infrared laser pulses. As an alternative method for particle beam tests, the laser pulses were tuned to very short duration and small transverse profile to simulate the tracks of MIPs (minimum ionization particles) in silicon. Hit cluster sizes were measured with focused laser pulses propagating through the SOI detector perpendicular to its surface and most of the induced charge was found to be collected inside the seed pixel. For the first time, the signal amplitude as a function of the applied bias voltage was measured for this SOI detector, deepening understanding of its depletion characteristics.

Improvement of spectroscopic performance using a charge-sensitive amplifier circuit for an X-ray astronomical SOI pixel detector

We have been developing monolithic active pixel sensors series, named ``XRPIX'', based on the silicon-on-insulator (SOI) pixel technology, for future X-ray astronomical satellites. The XRPIX series offers high coincidence time resolution (∼ 1 μs), superior readout time (∼ 10 μs), and a wide energy range (0.5–40 keV) . In the previous study, we successfully demonstrated X-ray detection by event-driven readout of XRPIX2b. We here report recent improvements in spectroscopic performance. We successfully increased the gain and reduced the readout noise in XRPIX2b by decreasing the parasitic capacitance of the sense-node originated in the buried p-well (BPW) . On the other hand, we found significant tail structures in the spectral response due to the loss of the charge collection efficiency when a small BPW is employed. Thus, we increased the gain in XRPIX3b by introducing in-pixel charge sensitive amplifiers instead of having even smaller BPW . We finally achieved the readout noise of 35 e− (rms) and the energy resolution of 320 eV (FWHM) at 6 keV without significant loss of the charge collection efficiency.

Improving charge-collection efficiency of SOI pixel sensors for X-ray astronomy

We have been developing a new type of active pixel sensor, referred to as “XRPIX” for future X-ray astronomy satellites on the basis of silicon-on-insulator CMOS technology. The problem on our previous device, XRPIX1b, was degradation of the charge-collection efficiency (CCE) at pixel borders. In order to investigate the non-uniformity of the CCE within a pixel, we measured sub-pixel response with X-ray beams whose diameters are 10μmΦ at SPring-8. We found that the X-ray detection efficiency and CCE degrade in the sensor region under the pixel circuitry placed outside the buried p-wells (BPW). A 2D simulation of the electric fields with the semiconductor device simulator HyDeLEOS shows that the isolated pixel circuitry outside the BPW makes local minimums in the electric potentials at the interface between the sensor and buried oxide layers, where a part of charge is trapped and is not collected to the BPW. Based on this result, we modified the placement of the in-pixel circuitry in the next device, XRPIX2b, for the electric fields to be converged toward the BPW, and confirmed that the CCE at pixel borders is successfully improved.

Characterization of high resolution CMOS monolithic active pixel detector in SOI technology

Novel CMOS monolithic pixel detectors designed at KEK and fabricated at Lapis Semiconductor in 0.2 μm Silicon-on-Insulator (SOI) technology are presented. A thin layer of silicon oxide separates high and low resistivity silicon layers, allowing for optimization of design of detector and readout parts. Shallow wells buried under the oxide in the detector part screen the entire pixel electronics from electrical field applied to the detector. Several integration type SOI pixel detectors have been developed with pixel sizes 8–20 μm. The general features of 14 × 14 μm2 detectors designed on different wafers (CZ-n, FZ-n and FZ-p) were measured and compared. The detector performance was studied under irradiation with visible and infra-red laser, and also X-ray ionizing source. Using X-rays from an Am-241 source the noise of readout electronics was measured at different working conditions, showing the ENC in the range of 88–120 e−. The pixel current was calculated from average DC pedestal shift while varying the pixel integration time. The operation of the detector was studied under partial and full depletion conditions. The effects of temperature and detector bias voltage on noise and leakage current were studied. Characteristics of an ADC integrated in the front-end chip are also presented.

A Review of SOI Monolithic Active Pixel Sensors for Radiation Detection Applications

Silicon-on-insulator (SoI) monolithic active pixel sensors have been developing fast in recent years. An SoI sensors use a thin low-resistivity upper Si layer for circuit implementation, and a high-resistivity bottom wafer as a sensor, sandwiching a buried oxide layer. These devices can be made very thin, fully depleted, avoiding bump bonding. In addition, they have fine pitch and low capacitance. An SoI pixel is a very attractive technology due to its inherent advantages. An SoI pixel process for monolithic radiation detectors is developed mainly based on Lapis Semiconductor Co. Ltd. 0.2-μm SoI FD-CMOS technology. The multilateral developments for both fundamental properties and dedicated application are progressing simultaneously. There have been many research projects on high-energy physics, space experiments, synchrotron radiation and industrial scan, and so on. Difficulties are unavoidable in the R&D process and many of them are solved by introducing new techniques, process/structure modifications, such as buried p-well, double-SoI, and 3-D vertical integration. This paper provides a review of the SoI sensor development: the theory; features; key issues; process; research; and applications.

Investigation of charge-collection efficiency of Kyoto׳s X-ray astronomical SOI pixel sensors, XRPIX

We are developing a monolithic active pixel sensor referred to as XRPIX for X-ray astronomy on the basis of silicon-on-insulator CMOS technology. A crucial issue in our recent development is the impact of incomplete charge collection on the spectroscopic performance. In this paper, we report the spectral responses of several devices having different intra-pixel structures or produced from different wafers. We found that an emission line spectrum exhibits large low-energy tails when the size of the buried p-well, which acts as the charge-collection node, is small. Moreover, in charge sharing events, the peak channels of the emission lines shift toward channels lower than those without charge sharing. This peak shift is more pronounced as the distance between the pixel center and the position of incident photon increases. This suggests that the charge-collection efficiency is degraded at the pixel boundary. We also found that the charge-collection efficiency depends on the strength of the electric field at the interface of the depletion and insulator layers.

SOI monolithic pixel detector

We are developing monolithic pixel detector using fully-depleted (FD) silicon-on-insulator (SOI) pixel process technology. The SOI substrate is high resistivity silicon with p-n junctions and another layer is a low resistivity silicon for SOI-CMOS circuitry. Tungsten vias are used for the connection between two silicons. Since flip-chip bump bonding process is not used, high sensor gain in a small pixel area can be obtained. In 2010 and 2011, high-resolution integration-type SOI pixel sensors, DIPIX and INTPIX5, have been developed. The characterizations by evaluating pixel-to-pixel crosstalk, quantum efficiency (QE), dark noise, and energy resolution were done. A phase-contrast imaging was demonstrated using the INTPIX5 pixel sensor for an X-ray application. The current issues and future prospect are also discussed.

Monolithic SOI pixel detector with a wide dynamic range and a high frame rate for FEL-applications

Monolithic pixel detector implemented in 200 nmsilicon-on-insulator technology for x-ray imaging applications will bepresented. The detection is based on a fully-depleted high-resistancesubstrate, isolated by the buried silicon dioxide from the electronicslayer. The pixel electronics contains a wide dynamic range integrator thatis able to measure and to digitize the number of photons in a wide signalrange. The detector is a simple and cheap alternative for the hybrid pixelimaging detectors. The experimental results obtained with the secondprototype will be presented. The aimed application is the free electronlaser.

3D Integration for An SOI Pixel Detector (Invited Talk)

not Available.

Monolithic pixel detectors with [formula omitted] FD-SOI pixel process technology

Truly monolithic pixel detectors were fabricated with 0.2μm SOI pixel process technology by collaborating with LAPIS Semiconductor Co., Ltd. for particle tracking experiment, X-ray imaging and medical applications. CMOS circuits were fabricated on a thin SOI layer and connected to diodes formed in the silicon handle wafer through the buried oxide layer. We can choose the handle wafer and therefore high-resistivity silicon is also available. Double SOI (D-SOI) wafers fabricated from Czochralski (CZ)-SOI wafers were newly obtained and successfully processed in 2012. The top SOI layers are used as electric circuits and the middle SOI layers used as a shield layer against the back-gate effect and cross-talk between sensors and CMOS circuits, and as an electrode to compensate for the total ionizing dose (TID) effect. In 2012, we developed two SOI detectors, INTPIX5 and INTPIX3g. A spatial resolution study was done with INTPIX5 and it showed excellent performance. The TID effect study with D-SOI INTPIX3g detectors was done and we confirmed improvement of TID tolerance in D-SOI sensors.

Development and characterization of the latest X-ray SOI pixel sensor for a future astronomical mission

We have been developing active pixel sensors based on silicon-on-insulator technology for future X-ray astronomy missions. Recently we fabricated the new prototype named “XRPIX2”, and investigated its spectroscopic performance. For comparison and evaluation of different chip designs, XRPIX2 consists of 3 pixel types: Small Pixel, Large Pixel 1, and Large Pixel 2. In Small Pixel, we found that the gains of the 68% pixels are within 1.4% of the mean value, and the energy resolution is 656eV (FWHM) for 8keV X-rays, which is the best spectroscopic performance in our development. The pixel pitch of Large Pixel 1 and Large Pixel 2 is twice as large as that of Small Pixel. Charge sharing events are successfully reduced for Large Pixel 1. Moreover Large Pixel 2 has multiple nodes for charge collection in a pixel. We confirmed that the multi-nodes structure is effective to increase charge collection efficiency.

Characterisation of a thin fully depleted SOI pixel sensor with high momentum charged particles

This paper presents the results of the characterisation of a thin fully depleted pixel sensor manufactured in SOI technology on high-resistivity substrate with high momentum charged particles. The sensor is thinned to 70μm and a thin phosphor layer contact is implanted on the back-plane. Its response is compared to that of thick sensors of same design in terms of signal and noise, detection efficiency and single point resolution based on data collected with 300GeV pions at the CERN SPS. We observe that the charge collected and the signal-to-noise ratio scale according to the estimated thickness of the sensitive volume and the efficiency and single point resolution of the thinned chip are comparable to those measured for the thick sensors.

Characterisation of a Thin Fully Depleted SOI Pixel Sensor with Soft X-ray Radiation

This paper presents the results of the characterisation of a back-illuminated pixel sensor manufactured in Silicon-on-Insulator technology on a high-resistivity substrate with soft X-rays. The sensor is thinned and a low energy phosphorus implantation is performed on the back-plane. The response to X-rays from 2.12 to 8.6keV is evaluated with fluorescence radiation at the LBNL Advanced Light Source.

Development of SOI pixel process technology

A silicon-on-insulator (SOI) process for pixelated radiation detectors is developed. It is based on a 0.2 μm CMOS fully depleted (FD-)SOI technology. The SOI wafer is composed of a thick, high-resistivity substrate for the sensing part and a thin Si layer for CMOS circuits. Two types of pixel detectors, one integration-type and the other counting-type, are developed and tested. We confirmed good sensitivity for light, charged particles and X-rays for these detectors. For further improvement on the performance of the pixel detector, we have introduced a new process technique called buried p-well (BPW) to suppress back gate effect. We are also developing vertical (3D) integration technology to achieve much higher density.

Performance study of SOI monolithic pixel detectors for X-ray application

We are now developing Silicon-on-insulator (SOI) monolithic pixel detectors for X-ray and charged particle applications in collaboration with OKI Semiconductor Co., Ltd. The detector development project started in 2005 and the SOI process for pixel detectors was developed. We developed some prototypes of SOI pixel detectors. Specifically, integration type and counting type pixel detectors were irradiated with a continuous red laser, infrared laser and X-rays and their performances were studied. One of the issues in the SOI detectors is the back-gate effect, that is, higher back bias voltages affect the characteristics of SOI-CMOS transistors. As a result of the new process step to protect the device against the back-gate effect, images with higher back bias voltages were obtained in the integration-type pixel detector. We also confirmed the dependence on 8 keV X-ray intensity for the counting type pixel detector. In 2009, new versions of the detectors were designed to improve their performances with X-rays and charged particles.

SOI Pixel Based on a Floating Body Partially Depleted MOSFET in a Delta-Sigma Loop

Standard techniques used for measuring the photocurrent of an SOI phototransistor have failed due to two main reasons: the first being the low signal-to-noise ratio and the second being the slow transient. In this paper, the partially depleted silicon on insulator (SOI) metal-oxide-semiconductor field effect transistor (MOSFET) has been used as a light intensity sensor. Using a novel technique of measurement enables us to embed this phototransistor in the delta-sigma loop. The presented circuits implement a first-order delta-sigma modulator with limited number of transistors maximizing the fill factor. Measured data show that the implemented pixels were sensitive to flux densities as low as 3 mW/m2 with a resolution of 7.5 bits.