Silicon Nanowire Networks Research Articles

Stable and Tunable Quantum Conductance in Spider-Silk-like Synaptic Device for Neurocomputing.

The quantum conductance (QC) behaviors in synaptic devices with stable and tunable conductance states are essential for high-density storage and brain-like neurocomputing (NC). In this work, inspired by the discontinuous transport of fluid in spider silk, a synaptic device composed of a silicon oxide nanowire network embedded with silicon quantum dots (Si-QDs@SiOx) is designed. The tunable QC behaviors are achieved in both the SET and RESET processes, and the QC states exhibit stable retention time exceeding 104 s in the synaptic device and show stable reproducibility after an interval of two months. The synaptic plasticity, including long-term potentiation/depression and Pavlovian conditioning function, is simulated based on the tunable conductance. The mechanism of stable and tunable QC behaviors is analyzed and clarified by beading effect of spider silk in Si-QDs@SiOx nanowires structure. The digit recognition capability of the device is evaluated by simulation using an artificial neural network consisting of the Si-QDs@SiOx-based synaptic device. These results provide insights into the development of neurocomputing systems with high classification accuracy.

Anisotropy Reversal of Thermal Conductivity in Silicon Nanowire Networks Driven by Quasi-Ballistic Phonon Transport.

Nanostructured semiconductors promise functional thermal management for microelectronics and thermoelectrics through a rich design capability. However, experimental studies on anisotropic in-plane thermal conduction remain limited, despite the demand for directional heat dissipation. Here, inspired by an oriental wave pattern, a periodic network of bent wires, we investigate anisotropic in-plane thermal conduction in nanoscale silicon phononic crystals with the thermally dead volume. We observed the anisotropy reversal of the material thermal conductivity from 1.2 at 300 K to 0.8 at 4 K, with the reversal temperature of 80 K mediated by the transition from a diffusive to a quasi-ballistic regime. Our Monte Carlo simulations revealed that the backflow of the directional phonons induces the anisotropy reversal, showing that the quasi-ballistic phonon transport introduces preferential thermal conduction channels with anomalous temperature dependence. Accordingly, the anisotropy of the effective thermal conductivity varied from 2.7 to 5.0 in the range of 4-300 K, indicating an anisotropic heat manipulation capability. Our findings demonstrate that the design of nanowire networks enables the directional thermal management of electronic devices.

Silicon nanowires-based biosensors for the electrical detection of Escherichia coli

One of the main challenges in terms of public health concerns the prevention of bacterial contamination using rapid, highly sensitive and specific detection techniques. The development of highly sensitive bacterial sensors for Escherichia coli detection based on networks of silicon nanowires has been carried out in this work. The interest of these nano-objects takes advantage in a large contact surface allowing potentially important interactions with bacteria. Their presence induces a change in electrical interaction through the silicon nanowires array and is the basis for the development of silicon nanowires based electrical resistances acting as bacteria sensors. High specificity of these sensors is ensured by chemical functionalization of the nanowires allowing the binding of specific antibodies targeting the lipopolysaccharide (anti-LPS) of E. coli, but not S. aureus. The sensor displays a sensitivity of 83 μA per decade of CFU/mL due to the nanometric dimensions of the nanowires. The electrical measurements ensure the detection of various E. coli concentrations down to 102 CFU/mL. This SiNW biosensor device demonstrated its potential as an alternative tool for real-time bacterial detection as miniaturizable and low-cost integrated electronic sensor compatible with the classical silicon technology.

Dense Silicon Nanowire Networks Grown on a Stainless-Steel Fiber Cloth: A Flexible and Robust Anode for Lithium-Ion Batteries.

Silicon nanowires (Si NWs) are a promising anode material for lithium-ion batteries (LIBs) due to their high specific capacity. Achieving adequate mass loadings for binder-free Si NWs is restricted by low surface area, mechanically unstable and poorly conductive current collectors (CCs), as well as complicated/expensive fabrication routes. Herein, a tunable mass loading and dense Si NW growth on a conductive, flexible, fire-resistant, and mechanically robust interwoven stainless-steel fiber cloth (SSFC) using a simple glassware setup is reported. The SSFC CC facilitates dense growth of Si NWs where its open structure allows a buffer space for expansion/contraction during Li-cycling. The Si NWs@SSFC anode displays a stable performance for 500 cycles with an average Coulombic efficiency of >99.5%. Galvanostatic cycling of the Si NWs@SSFC anode with a mass loading of 1.32mg cm-2 achieves a stable areal capacity of ≈2 mAh cm-2 at 0.2 C after 200 cycles. Si NWs@SSFC anodes with different mass loadings are characterized before and after cycling by scanning and transmission electron microscopy to examine the effects of Li-cycling on the morphology. Notably, this approach allows the large-scale fabrication of robust and flexible binder-free Si NWs@SSFC architectures, making it viable for practical applications in high energy density LIBs.

Visualization of Directional Beaming of Weakly Localized Raman from a Random Network of Silicon Nanowires.

Disordered optical media are an emerging class of materials that can strongly scatter light. These materials are useful to investigate light transport phenomena and for applications in imaging, sensing and energy storage. While coherent light can be generated using such materials, its directional emission is typically hampered by their strong scattering nature. Here, the authors directly image Rayleigh scattering, photoluminescence and weakly localized Raman light from a random network of silicon nanowires via real‐space microscopy and Fourier imaging. Direct imaging enables us to gain insight on the light transport mechanisms in the random material, to visualize its weak localization length and to demonstrate out‐of‐plane beaming of the scattered coherent Raman light. The direct visualization of coherent light beaming in such random networks of silicon nanowires offers novel opportunities for fundamental studies of light propagation in disordered media. It also opens venues for the development of next generation optical devices based on disordered structures, such as sensors, light sources, and optical switches.

Role played by the nanowire/nanowire junctions in the electrical properties of semiconductor percolating silicon nanowire networks

In this paper, we highlight the key role played by Si nanowire/nanowire junctions in the electrical performance of field-effect transistors (FETs) based on percolating Si nanowire (SiNW) networks, also called nanonets. Using our original technological process to fabricate simultaneously numerous silicon nanonet-based transistors with a variable geometry, we thoroughly investigated in this paper their electrical properties for various channel lengths from 5 to 100 μm. In particular, we evidenced a clear transition in the FET performance, when NW/NW junctions are involved in the conduction path. On the one hand, for channel length shorter than that of nanowires (NWs), the devices are called multiple-parallel-channel FETs as NWs directly bridge the channel, and they exhibit poor electrical performance in terms of OFF current, ON-to-OFF ratio, and subthreshold slope. On the other hand, for channel length longer than that of nanowires (NWs), the devices are called nanonet-FETs (NN-FETs) as the current flows through percolating paths made of NWs and NW/NW junctions and the performance are considerably enhanced. By combining our structural knowledge of the material with experimental observations of electrical properties and modeling results, by relying on the percolation theory, the model for electrical transport in polycrystalline silicon and the principle of potential barrier lowering by the field effect, we propose the junction driven percolation mechanism. It explains the role played by the nanowire/nanowire junctions in the electrical properties of semiconductor percolating nanowire networks and how they drastically enhanced the electrical properties of nanowire-based field-effect transistors despite the disorder introduced by the increasing number of nanowires. As a consequence, by controlling properly the junction interfaces and device geometry for a given NW density, thanks to NW/NW junctions, the NN-based devices are a valuable and promising alternative to improve the electrical performances of NW-based devices for future developments.

Monolithic Integration of Silicon Nanowire Networks as a Soft Wafer for Highly Stretchable and Transparent Electronics.

Assembling nanoscale building blocks into an orderly network with a programmable layout and channel designs represents a critical capability to enable a wide range of stretchable electronics. Here, we demonstrate the growth-in-place integration of silicon nanowire (SiNW) springs into highly stretchable, transparent, and quasicontinuous functional networks with a close to unity interconnection among the discrete electrode joints because of a unique double-lane/double-step guiding edge design. The SiNW networks can be reliably transferred to a soft elastomer substrate, conformally attached to highly curved surfaces, or deployed as self-supporting/movable membranes suspended over voids. A high stretchability of >40% is achieved for the SiNW network on an elastomer, which can be employed as a transparent and semiconducting thin-film material endowed with a high carrier mobility of >50 cm2/(V s), Ion/Ioff ratio >104, and a tunable transmission of >80% over a wide spectrum range. Reversibly stretchable and bendable sensors based on the SiNW network have been successfully demonstrated, where the local strain distribution within the spring network can be directly observed and analyzed by finite element simulations. This SiNW network has a unique potential to eventually establish a new generically purposed waferlike platform for constructing soft electronics with Si-based hard performances.

Material engineering of percolating silicon nanowire networks for reliable and efficient electronic devices

Motivated to produce reliable and performant SiNW-based transistors, we present in this work how percolating networks composed of randomly oriented SiNWs, called nanonets, are a promising material if they are well engineered. We demonstrate that a proper material engineering of nanonets via alumina encapsulation allows to drastically enhance the electrical characteristics of back gate field effect transistors (FETs). Based on a simple, low temperature (≤400 °C) and up-scalable process of integration, the fabricated FETs exhibit a low off-current in the picoampere range while maintaining very good on-performance, up to the microampere and thus on-to-off ratio exceeding 105. As stated in this work, these nanonet-FETs present not only comparable electrical performances to reported single SiNW-based transistors with the same back-gated architecture but also good device-to-device reproducibility. This initial benchmarking clearly indicates that Si nanonet-based devices display essential features in terms of performances and fabrication process for sensing and flexible electronics.

Monolithic fabrication of nano-to-millimeter scale integrated transistors based on transparent and flexible silicon nanonets

In this paper, silicon nanonets (SiNNs), a synonym of random networks of silicon nanowires (SiNWs), are demonstrated as a potential alternative to replace amorphous silicon (a-Si) or organic materials in flexible and large-area electronics. We first report the low temperature and monolithic integration of SiNW-based field-effect transistors (FETs) with a channel length varying from a micro-to-millimeter scale. For a channel as long as 1000 μm, the current has to flow through a succession of at least a hundred SiNWs and as many SiNW–SiNW junctions. Despite this substantial related number of resistances in series, devices exhibit outstanding performances: a high drain current up to 10−7 A, an IOn/IOff ratio as large as 105 and a better mobility compared to a-Si and organic materials. Furthermore, such 1000 μm long channel FETs exhibit better subthreshold slope and lower device-to-device variability compared to shorter channel ones (50–200 μm). Good electrical stability is also observed after 4 months of exposure in air. In addition to these excellent features as a very long channel of transistors, silicon nanonets show good optical transparency and mechanical flexibility. These reported works make SiNNs a promising material for flexible and large-area electronics.

Bacteria electrical detection using 3D silicon nanowires based resistor

Resistors based on silicon nanowires (SiNWs) are developed for the direct detection of Escherichia coli bacteria. The devices are manufactured using conventional silicon technology. The SiNWs are synthesized by the vapor liquid solid process (VLS) using gold as the catalyst. The electrodes of the device consist of highly in situ doped polycrystalline silicon. The results show that the corresponding resistances can be potentially used for the detection of bacteria by electrical measurements, using SiNWs as sensitive units. The bacteria are preferentially hooked in the SiNWs network, which causes a drastic reduction in the electrical resistance of the component. Such resistor manufactured in a simple and low-cost CMOS (Complementary Metal Oxide Semiconductor) technology acts as proof of concept. This device offers promising potentialities taking advantages of integration into CMOS platform for alternative direct electrical detection of bacteria to monitor the contamination in environment for hygiene applications.

Electrical characteristics of silicon percolating nanonet-based field effect transistors in the presence of dispersion

We studied the current-voltage characteristics of percolating networks of silicon nanowires (nanonets), operated in back-gated transistor mode, for future use as gas or biosensors. These devices featured P-type field-effect characteristics. It was found that a Lambert W function-based compact model could be used for parameter extraction of electrical parameters such as apparent low field mobility, threshold voltage and subthreshold slope ideality factor. Their variation with channel length and nanowire density was related to the change of conduction regime from direct source/drain connection by parallel nanowires to percolating channels. Experimental results could be related in part to an influence of the threshold voltage dispersion of individual nanowires.

An innovative large scale integration of silicon nanowire-based field effect transistors

Since the early 2000s, silicon nanowire field effect transistors are emerging as ultrasensitive biosensors while offering label-free, portable and rapid detection. Nevertheless, their large scale production remains an ongoing challenge due to time consuming, complex and costly technology. In order to bypass these issues, we report here on the first integration of silicon nanowire networks, called nanonet, into long channel field effect transistors using standard microelectronic process. A special attention is paid to the silicidation of the contacts which involved a large number of SiNWs. The electrical characteristics of these FETs constituted by randomly oriented silicon nanowires are also studied. Compatible integration on the back-end of CMOS readout and promising electrical performances open new opportunities for sensing applications.

Anisotropic heat conduction in silicon nanowire network revealed by Raman scattering

Anisotropic nanomaterials possess interesting thermal transport properties because they allow orientation of heat fluxes along preferential directions due to a high ratio (up to three orders of magnitude) between their in-plane and cross-plane thermal conductivities. Among different techniques allowing thermal conductivity evaluation, micro-Raman scattering is known to be one of the most efficient contactless measurement approaches. In this letter, an experimental approach based on Raman scattering measurements with variable laser spot sizes is reported. Correlation between experimental and calculated thermal resistances of one-dimensional nanocrystalline solids allows a simultaneous estimation of their in-plane and cross-plane thermal conductivities. In particular, our measurement approach is illustrated to be applied for anisotropic thermal conductivity evaluation of silicon nanowire arrays.

Nano-cross-junction effect on phonon transport in silicon nanowire cages

Wave effects of phonons can give rise to controllability of heat conduction beyond that by particle scattering at surfaces and interfaces. In this work, we propose a new class of 3D nanostructure: a silicon-nanowire-cage (SiNWC) structure consisting of silicon nanowires (SiNWs) connected by nano-cross-junctions (NCJs). We perform equilibrium molecular dynamics (MD) simulations, and find an ultralow value of thermal conductivity of SiNWC, 0.173 Wm-1K-1, which is one order lower than that of SiNWs. By further modal analysis and atomistic Green's function calculations, we identify that the large reduction is due to significant phonon localization induced by the phonon local resonance and hybridization at the junction part in a wide range of phonon modes. This localization effect does not require the cage to be periodic, unlike the phononic crystals, and can be realized in structures that are easier to synthesize, for instance in a form of randomly oriented SiNWs network.

(Invited) Bottom-up Silicon Nanostructures: A Toolbox for Integrated on-Chip Edlcs

The current trend towards miniaturized and autonomous electronic devices requires innovative energy storage solutions. For instance, autonomous micro-sensor networks or implantable medical devices would need a robust power source with an extended cyclability as well as a large power density, which might be out of the scope of conventional battery technologies. For such applications, Electrochemical Double Layer Capacitors (EDLCs) are promising alternatives, and their integration “on-chip” could allow tremendous innovations to emerge.1 However, finding a suitable “on-chip” EDLC technology implies addressing key challenges, such as temperature resistance, silicon industry compatibility and good electrochemical performances on a small footprint. Although often considered as an “unconventional” supercapacitive electrode material, bottom-up, highly-doped nanostructured silicon offers extremely promising characteristics, both as bare electrode material in EDLCs2, 3 or as current collector for pseudo-capacitive materials.4 The fine morphological tuning of the nanostructure allowed by the bottom-up approach permits a careful design of the electrodes’ architectures, with considerable freedom compared to other techniques. Such latitude allows the optimization of porosity as well as ionic and electronic pathways while keeping robust mechanical performances, depending on the target application and other requirements such as the electrolyte, functionalization by pseudo-capacitive materials or other surface modifications. Moreover, using silicon as EDLC electrode material instead of carbon allows developments towards “on-chip” integration and potential production scale-up considerably easier using standard silicon industry processes for small micro-sized energy storage devices. Nanostructures such as silicon nanowires (Si-NWs) or nanotrees (Si-NTrs) demonstrated excellent cyclability with more than 1 million cycles of galvanostatic charge/discharge under a 4 V wide electrochemical windows in EMI-TFSI ionic liquid, with large power densities and good capacitance values.2,3 The aim of the present study is to provide insight on the potentialities of bottom-up silicon nanostructures as a toolbox for designing “on-chip” energy storage devices, by addressing several key challenges. In particular, the accessible surface area of electrodes can be greatly improved through careful optimization of the nanostructure morphologies, resulting in larger capacitances. A systematic study was conducted over different growth parameters, leading to interestingly diverse morphologies ranging from hyper branched Si-NTrs to a 3D interpenetrated highly conductive silicon nanowires network. We demonstrated capacitance values as high as 1.7 mF.cm-2 in a 3 electrodes cell and excellent energy and maximum power densities for symmetric 2 electrodes devices (respectively 2.8 mJ.cm-2 and 235 mW.cm-2) while retaining 80 % of the capacitance after 106 galvanostatic charge/discharge cycles. Additionally, a quasi-ideal capacitive behavior was retained throughout long term cycling, with linear and symmetric galvanostatic profiles even after millions of cycles. Furthermore, surface modification of the silicon nanostructures by Atomic Layer Deposited thin Al2O3 films boosted electrochemical performances, allowing symmetric 2 electrode devices to reach an unprecedented cell voltage of 5.5 V, improving energy and maximum power densities compared to unmodified nanostructured silicon. The cyclability was also largely enhanced, with only 3% capacitance fade after 106 galvanostatic charge/discharge cycles at 4 V, and no further degradation even after several subsequent 105 cycles over 5 V. Finally, “on-chip” integrated devices were designed by growing optimized nanostructures on an interdigitated electrode pattern, demonstrating the compatibility of our material with standard micro-patterning processes. In combination with a solid-state ionogel electrolyte, the devices can also display remarkable electrochemical performances over a wide temperature range (between 15° C and 100° C), and a resistance to the “solder reflow” conditions, paving the way to fully integrated “on-chip” micro-supercapacitors which fulfill the key challenges for future applications. (1) Beidaghi, M.; Gogotsi, Y. Energy & Environ. Sci. 2014, 7 (3), 867-884 (2) Thissandier, F. ; Gentile, P. ; Pauc, N. ; Brousse, T. ; Bidan, G. ; Sadki, S. Nano Energy 2014, 5, 20-27 (3) Thissandier, F. ; Gentile, P. ; Brousse, T. ; Bidan, G. ; Sadki, S. J. Power Sources 2014, 269, 740-746 (4) Aradilla, D. ; Gaboriau, D. ; Bidan, G. ; Gentile, P. ; Boniface, M. ; Dubal, D. ; Gómez-Romero, P. ; Wimberg, J. ; Schubert, T.J.S. ; Sadki, S. J. Mater. Chem. A 2015, 3, 13978-13985 Figure 1

Dual layer semiconducting nanocomposite of silicon nanowire and polythiophene for organic-based field effect transistors

We investigate a dual layer active channel of random distributed intrinsic silicon nanowires and solution processing semiconducting polythiophene polymers for organic-based field effect transistors. Primary results show that low density silicon nanowire networks could enhance the effective charge carrier mobility of polythiophene transistors by a factor of six, suggesting that these nanowires act as rapid one-dimensional charge transport bridges in the active channel. Moreover, increasing the nanowire loading in the dual layer nanocomposite could further lessen the transistor hysteresis. The lifetime test of nanowire-polythiophene devices is found to be more sustainable with respect to that of pristine polythiophene in ambient air. These results indicate that semiconducting nanowires should be considered as a viable additive to active channel for next-generation organic field effect transistors.

Silicon nanowire networks for multi-stage thermoelectric modules

We present the fabrication and characterization of single, double, and quadruple stacked flexible silicon nanowire network based thermoelectric modules. From double to quadruple stacked modules, power production increased 27%, demonstrating that stacking multiple nanowire thermoelectric devices in series is a scalable method to generate power by supplying larger temperature gradient. We present a vertically scalable multi-stage thermoelectric module design using semiconducting nanowires, eliminating the need for both n-type and p-type semiconductors for modules.

Si NW network by Ag nanoparticle assisted etching and TiO2/Si NWs as photodetector

Glancing angle deposited silver (Ag) nanoparticles (NPs) were employed to fabricate the silicon (Si) nanowire (NW) network on p-type Si substrate. The Si NWs were characterized by X-ray diffraction, which shows the (311) oriented single crystalline nature. The FEG-SEM images show that the nanowire diameters are in the order of 60–180 nm. The photoluminescence emission at 525 nm was recognized from the Si NWs. The Ag-TiO2 contacts exhibit Schottky behavior and higher photoconduction was observed for TiO2-Si NW detector than that of TiO2 Thin film under illumination up to 2.5 V applied potential. A threefold enhanced photodetection for the Silicon nanowire device was observed compared to the TiO2 thin film device, under applied voltages of 0.4–1.5 V.

Silicon nanonets for biological sensing applications with enhanced optical detection ability

Optical sensors based on fluorescence methods are used in numerous areas of society, ranging from healthcare to environmental monitoring. But the race to elaborate portable and highly sensitive detection systems leads to the huge development of nanomaterial-based sensors. Here, we have fabricated a silicon nanonet, or silicon nanowire (SiNW) network, ‐based biosensor for DNA hybridization detection by fluorescence microscopy. We demonstrate that by leveraging the properties of the SiNWs such as their large specific surface and the high aspect ratio, these nanonet sensors have significantly enhanced sensitivity and better selectivity compared to plane substrates. The fluorescence signal shows an intensity increasing with the SiNW density on the nanonet and for the denser nanonets, the detection limit for DNA hybridization is 1nM. The elaborated Si nanonet-based DNA sensors present more than 50% change in fluorescence intensity between complementary DNA and 1 base mismatch DNA which shows their high selectivity. Finally, we have integrated the Si nanonet-based sensor into a DNA chip and we have shown that this selective sensor can be reproduced on a large scale area.

Percolating silicon nanowire networks with highly reproducible electrical properties

Here, we report the morphological and electrical properties of self-assembled silicon nanowires networks, also called Si nanonets. At the macroscopic scale, the nanonets involve several millions of nanowires. So, the observed properties should result from large scale statistical averaging, minimizing thus the discrepancies that occur from one nanowire to another. Using a standard filtration procedure, the so-obtained Si nanonets are highly reproducible in terms of their morphology, with a Si nanowire density precisely controlled during the nanonet elaboration. In contrast to individual Si nanowires, the electrical properties of Si nanonets are highly consistent, as demonstrated here by the similar electrical properties obtained in hundreds of Si nanonet-based devices. The evolution of the Si nanonet conductance with Si nanowire density demonstrates that Si nanonets behave like standard percolating media despite the presence of numerous nanowire-nanowire intersecting junctions into the nanonets and the native oxide shell surrounding the Si nanowires. Moreover, when silicon oxidation is prevented or controlled, the electrical properties of Si nanonets are stable over many months. As a consequence, Si nanowire-based nanonets constitute a promising flexible material with stable and reproducible electrical properties at the macroscopic scale while being composed of nanoscale components, which confirms the Si nanonet potential for a wide range of applications including flexible electronic, sensing and photovoltaic applications.