Silicon-germanium Heterostructures Research Articles

Noise reduction by bias cooling in gated Si/Six Ge1−x quantum dots

Silicon–germanium heterostructures are a promising quantum circuit platform, but crucial aspects, such as the long-term charge dynamics and cooldown-to-cooldown variations, are still widely unexplored quantitatively. In this Letter, we present the results of an extensive bias cooling study performed on gated silicon–germanium quantum dots with an Al2O3 dielectric. Over 80 cooldowns were performed in the course of our investigations. The performance of the devices is assessed by low-frequency charge noise measurements in the band of 200 μHz to 10 mHz. We measure the total noise power as a function of the applied voltage during cooldown in four different devices and find a minimum in noise at 0.7 V bias cooling voltage for all observed samples. We manage to decrease the total noise power median by a factor of 6 and compute a reduced tunneling current density using Schrödinger–Poisson simulations. Furthermore, we show the variation in noise from the same device in the course of eleven different cooldowns performed under the nominally same conditions.

Quantum-Ready Germanium and Silicon

The semiconductor industry knows how to make and integrate billions of excellent transistors. What materials do we need to integrate excellent qubits at large scale for the quantum information age of tomorrow? What are the properties that we search in these materials to make them quantum-ready? I will focus on isotopically-engineered, strained silicon-germanium heterostructures enabling high-performance hole spin-qubits in germanium and electron spin qubits in silicon. In particular, I will make a case for the germanium quantum information route [1]. Germanium is emerging as a versatile material to realize devices capable of encoding, processing and transmitting quantum information. I will examine the materials science progress underpinning germanium-based planar heterostructures, review our most significant experimental results demonstrating key building blocks for quantum technology, and identify the most promising avenues toward scalable quantum information processing in germanium-based systems.[1] G. Scappucci et al, The germanium quantum information route, Nat Rev Mater (2020). https://doi.org/10.1038/s41578-020-00262-z Figure 1

Devitalizing noise-driven instability of entangling logic in silicon devices with bias controls

The quality of quantum bits (qubits) in silicon is highly vulnerable to charge noise that is omnipresent in semiconductor devices and is in principle hard to be suppressed. For a realistically sized quantum dot system based on a silicon-germanium heterostructure whose confinement is manipulated with electrical biases imposed on top electrodes, we computationally explore the noise-robustness of 2-qubit entangling operations with a focus on the controlled-X (CNOT) logic that is essential for designs of gate-based universal quantum logic circuits. With device simulations based on the physics of bulk semiconductors augmented with electronic structure calculations, we not only quantify the degradation in fidelity of single-step CNOT operations with respect to the strength of charge noise, but also discuss a strategy of device engineering that can significantly enhance noise-robustness of CNOT operations with almost no sacrifice of speed compared to the single-step case. Details of device designs and controls that this work presents can establish practical guideline for potential efforts to secure silicon-based quantum processors using an electrode-driven quantum dot platform.

Valley splittings in Si/SiGe quantum dots with a germanium spike in the silicon well

Silicon-germanium heterostructures have successfully hosted quantum dot qubits, but the intrinsic near-degeneracy of the two lowest valley states poses an obstacle to high fidelity quantum computing. We present a modification to the Si/SiGe heterostructure by the inclusion of a spike in germanium concentration within the quantum well in order to increase the valley splitting. The heterostructure is grown by chemical vapor deposition and magnetospectroscopy is performed on gate-defined quantum dots to measure the excited state spectrum. We demonstrate a large and widely tunable valley splitting as a function of applied vertical electric field and lateral dot confinement. We further investigate the role of the germanium spike by means of tight-binding simulations in single-electron dots and show a robust doubling of the valley splitting when the spike is present, as compared to a standard (spike-free) heterostructure. This doubling effect is nearly independent of the electric field, germanium content of the spike, and spike location. This experimental evidence of a stable, tunable quantum dot, despite a drastic change to the heterostructure, provides a foundation for future heterostructure modifications.

Mixed-Mode Stress in Silicon–Germanium Heterostructure Bipolar Transistors: Insights From Experiments and Simulations

Recently, a wide class of market segments (e.g., health, material science, security, and communications) is tackled by circuits fabricated in BiCMOS technology, integrating silicon–germanium (SiGe) heterojunction bipolar transistors (HBTs) and passives. Currently, the reliability of SiGe HBT devices is a major concern, and much attention is given to self-heating (SH), that limits device performance and regulates their degradation during stress. Moreover, its relevance is supposed to increase with device scaling. In this paper, we explore the reliability issues of SiGe HBTs by combining dedicated experiments and TCAD simulations. We develop and calibrate a TCAD model that is then used to investigate SH effects in both operating and stress conditions. Results show the important role played by the back-end-of-line (BEOL) and by the substrate thermal resistance in dissipating the heat generated by impact ionization. The location at which defects are generated during stress and the microscopic properties of the defects are determined experimentally by means of dedicated noise measurements. Including defects in the TCAD model allows reproducing the degradation observed in stress experiments. Simulations of the SH effects on a stressed device in measurement conditions revealed the presence of a hole hot spot that suggests a possible physical mechanism involved in the degradation slowdown at long stress times reported in the literature.

Electron–hole liquid in semiconductors and low-dimensional structures

The condensation of excitons into an electron–hole liquid (EHL) and the main EHL properties in bulk semiconductors and low-dimensional structures are considered. The EHL properties in bulk materials are discussed primarily in qualitative terms based on the experimental results obtained for germanium and silicon. Some of the experiments in which the main EHL thermodynamic parameters (density and binding energy) have been obtained are described and the basic factors that determine these parameters are considered. Topics covered include the effect of external perturbations (uniaxial strain and magnetic field) on EHL stability; phase diagrams for a nonequilibrium exciton-gas–EHL system; information on the size and concentration of electron–hole drops (EHDs) under various experimental conditions; the kinetics of exciton condensation and of recombination in the exciton-gas–EHD system; dynamic EHD properties and the motion of EHDs under the action of external forces; the properties of giant EHDs that form in potential wells produced by applying an inhomogeneous strain to the crystal; and effects associated with the drag of EHDs by nonequilibrium phonons (phonon wind), including the dynamics and formation of an anisotropic spatial structure of the EHD cloud. In discussing EHLs in low-dimensional structures, a number of studies are reviewed on the observation and experimental investigation of phenomena such as spatially indirect (dipolar) electron–hole and exciton (dielectric) liquids in GaAs/AlGaAs structures with double quantum wells (QWs), EHDs containing only a few electron–hole pairs (dropletons), EHLs in type-I silicon QWs, and spatially direct and dipolar EHLs in type-II silicon–germanium heterostructures.

Interference effects in silicon-germanium heterostructures with quantum wells of different widths

Weak localization effects and the interactions of charge carriers are studied in two Si0.7Ge0.3/Si0.2Ge0.8/Si0.7Ge0.3 p-type heterostructures, where one or two quantum levels are filled, respectively. A weak localization effect for two-dimensional charge carriers is found to occur in weak magnetic fields when the spin-orbital and inelastic scattering times are close, which is indicative of splitting of the spin states under the influence of a perturbing potential related to the formation of a two-dimensional potential well (Rashba mechanism). In higher magnetic fields when one quantum level is occupied, interaction effects appear that are caused by Coulomb interactions with a scatterer. When the two quantum levels are occupied, the dominant mechanism is scattering on Friedel oscillations of the charge carrier density induced by an impurity electric field. In all regions, the quantum corrections are in good agreement with modern theoretical predictions.

Review of thermoelectric characterization techniques suitable for SiGe multilayer structures

Thermoelectric materials have great potential for a range of energy harvesting applications, while the thin film approach is promising for the realization of integrated thermoelectric micro-devices. Silicon-germanium heterostructures are interesting candidates for on-chip cooling or energy harvesting, guaranteeing reliable manufacturing and integrability with silicon technology. Material research is nowadays focused on the engineering of nanostructured materials with improved thermoelectric performances. Therefore, the development of efficient methods for the characterizazion of the thermoelectric properties at the micro- and nano-scale is fundamental. We report here microfabrication based methods for the in-plane and cross-plane thermoelectric characterization of silicon-germanium multilayer heterostructures monolithically integrated on silicon.

Features of the stress-strain state of Si/SiO2/Ge heterostructures with germanium nanoislands of a limited density

Within the elastic continuum model, with the use of the finite-element method, the stress-strain state of silicon-germanium heterostructures with semispherical germanium islands grown on an oxidized silicon surface is calculated. It is shown that as the density of islands is increased to limiting values, in the SiGe structure with open quantum dots the value and spatial distribution of the elastic-strain fields significantly change. The results of theoretical calculation allow the heterostructure portions with the maximum variation in the stress-strain state to be determined. The position of such a portions can be controlled by changing the density of islands.

Sharp-Switching High-Current Tunneling Devices

Tunneling FETs (TFETs) offer the possibility of overcoming the 60 mV/dec subthreshold slope limit of conventional transistors and thereby providing sharp-switching logic devices. We discuss two approaches to increasing the current drive of tunneling devices, both implemented in the silicon-germanium heterostructure system. First, the bipolar-enhanced TFET (BET-FET) multiplies the gate-controlled interband tunneling current by the Si/Ge heterojunction bipolar current gain. Both vertical and planar versions have been simulated, with high I ON > 1000 mA/mm accompanying low subthreshold swing over many decades of current. Second, the trigate Si/Ge heteronanowire TFET is based on shifting the tunneling junction from Ge in the on-state to Si in the off-state. Fabricated with a vapor-liquid-solid epitaxial Si/Ge hetero-nanowire channel and high-k dielectric trigate stack, the proof-of-concept prototype device exhibits reasonable I ON, sub-60 mV/dec slope, as well as surprising backgating properties.

Impact of Millisecond Flash-Assisted Rapid Thermal Annealing on SiGe Heterostructure Channel pMOSFETs With a High-k/Metal Gate

Preserving the integrity (e.g., Ge concentration, strain, and lattice perfection) of pseudomorphically grown silicon germanium (SiGe) heterostructure channels on Si substrates is one of the most critical factors in obtaining optimal pMOSFET performance from high hole mobility of strained SiGe. A millisecond Flash-assisted rapid thermal annealing (RTA) technique was applied to source/drain (S/D) dopant activation of high-Ge-concentration SiGe channel MOSFETs with a high- <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">k</i> /metal gate stack. Flash annealing of SiGe channel pMOSFETs is shown to be an effective way to preserve channel integrity while achieving a low S/D resistance. Excellent mobility and short-channel device performance are realized. In addition, as the concentration of Ge in the SiGe layer is increased, high B activation can be achieved with a lower peak temperature Flash anneal. As a result, the sheet resistance of the implanted p <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">+</sup> junction can be comparable with that of higher temperature Flash-annealed (or optimal spike-annealed) Si. Furthermore, minimizing Ge diffusion reduces performance variation (such as statistical threshold voltage variation), which may be caused by the introduction and/or growth of defects in the strained SiGe heterostructure channel. It is shown that high-performance SiGe channel pMOSFETs with high Ge concentrations and a scaled high- <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">k</i> /metal gate can be achieved by a millisecond Flash-assisted RTA technique while preventing undesirable effects in the SiGe channel, such as within-wafer statistical performance variation.

Finite element simulation for ultraviolet excimer laser processing of patterned Si/SiGe/Si(100) heterostructures

Ultraviolet (UV) Excimer laser assisted processing is an alternative strategy for producing patterned silicon germanium heterostructures. We numerically analyzed the effects caused by pulsed 193 Excimer laser radiation impinging on patterned amorphous hydrogenated silicon (a-Si:H) and germanium (a-Ge:H) bilayers deposited on a crystalline silicon substrate [Si(100)]. The proposed two dimensional axisymmetric numerical model allowed us to estimate the temperature and concentration gradients caused by the laser induced rapid melting and solidification processes. Energy density dependence of maximum melting depth and melting time evolution as well as three dimensional temperature and element distribution have been simulated and compared with experimentally obtained results.

Quantum cascade laser design based on impurity–band transitions of donors in Si/GeSi(111) heterostructures

The concept of quantum cascade laser based on impurity-band transitions in n-type Si/GeSi heterostructures has been analyzed. Silicon-germanium heterostructures are attractive for development of devices emitting in the terahertz spectral range, where the use of III–V compounds is limited by their reststrahlen band. The mechanism of population inversion is based on fast ionization of donor centers into continuum of the lower neighboring subband by phonon-assisted tunneling [1]. The fast tunneling is caused by hybridization between the impurity ground state and the 2D continuum in the neighboring quantum well. It is essential that the mentioned subband is closely matched with the ground state level of donor. Apopulation of the ground state therefore is smaller than that of2Dcontinuum of the higher subband. Peculiar features of silicongermanium heterostructures are related to multivalley character of the conduction band. It involves a lot of intra- and intervalley acoustical and optical phonons in tunneling and relaxation processes. The laser scheme is analyzed for n-type selectively doped Si/GeSi(111) heterostructures. The choice of the growth plane arises from two circumstances. First, the quantization effective mass, m = 0.26m0, is fairly small. This enables one to use thicker layers in heterostructures that reduces the sensitivity of the laser scheme to a dispersion of dopants through the period and to a fluctuation of heterostructure parameters. Second, build-in strain in the Si/GeSi(111) heterostructures leaves the valleys degenerate that eliminates additional relaxation channels. An undesirable impact of the remaining degeneracy is the decrease of filling factors of continuum states in the upper (working) subband. Four- and six-layer-period-superlattice cascade laser are treated. Taking into account electron heating up to 100 K amplification coefficient is of the order of 10 cm−1 for doping concentration of 5 × 1011 cm−2 per period at 24–29 μm wave lengths. Selective doping is assumed to be in the centre of a quantum well of the period. For comparison, uniform dopant distribution reduces the amplification coefficient by more than five times.

Strained ${\rm n}$-MOSFET With Embedded Source/Drain Stressors and Strain-Transfer Structure (STS) for Enhanced Transistor Performance

A novel-channel MOS transistor with a silicon-germanium (SiGe) heterostructure embedded beneath the channel and silicon-carbon source/drain (Si:C S/D) stressors was demonstrated. The additional SiGe structure couples additional strain from the S/D stressors to the overlying Si channel, leading to enhanced strain effects in the channel region. We termed the SiGe region a strain-transfer structure due to its role in enhancing the transfer of strain from lattice-mismatched S/D stressors to the channel region. Numerical simulations were performed using the finite-element method to explain the strain-transfer mechanism. A significant drive current IDSAT improvement of 40% was achieved over the unstrained control devices, which is predominantly due to the strain-induced mobility enhancement. In addition, the impact of scaling the device design parameters on transistor drive current performance was investigated. Guidelines on further performance optimization in such a new device structure are provided.

Quantum dots and etch-induced depletion of a silicon two-dimensional electron gas

The controlled depletion of electrons in semiconductors is the basis for numerous devices. Reactive-ion etching provides an effective technique for fabricating both classical and quantum devices. However, Fermi-level pinning must be carefully considered in the development of small devices, such as quantum dots. Because of depletion, the electrical size of the device is reduced in comparison with its physical dimension. To investigate this issue in modulation-doped silicon single-electron transistors, we fabricate several types of devices in silicon-germanium heterostructures using two different etches, CF4 and SF6. We estimate the depletion width associated with each etch by two methods: (i) conductance measurements in etched wires of decreasing thickness (to determine the onset of depletion), and (ii) capacitance measurements of quantum dots (to estimate the size of the active region). We find that the SF6 etch causes a much smaller depletion width, making it more suitable for device fabrication.

Valley splitting in low-density quantum-confined heterostructures studied using tight-binding models

A detailed study of reduced-basis tight-binding models of electrons in semiconducting quantum wells is presented. The focus is on systems with degenerate valleys, such as silicon in silicon germanium heterostructures, in the low-density limit, relevant to proposed quantum computing architectures. Analytic results for the bound states of systems with hard-wall boundaries are presented and used to characterize the valley splitting in silicon quantum wells. The analytic solution in a no-spin-orbit model agrees well with larger tight-binding calculations that do include spin-orbit coupling. Numerical investigations of the valley splitting for finite band offsets are presented that indicate that the hard-wall results are a good guide to the behavior in real quantum wells.

Two-dimensional modeling of etched strained-silicon quantum wires

We present two-dimensional simulations of different types of strained-silicon quantum wires obtained by selective etching on silicon germanium heterostructures. Such structures are promising both for emerging ballistic devices in silicon compatible technology and for innovative nanoscale field-effect transistors. Numerical modeling has been performed with a procedure designed to solve the Poisson–Schrödinger equation for electrons and holes, that takes into account the effect of strain on the band structure, conduction band anisotropy, and the effect of states at the exposed surfaces. We show that the simulations provide insights into the capability to control the wire via an external gate voltage, and into the dependence of wire properties on geometry and surface states.

NANOTCAD2D: Two-dimensional code for the simulation of nanoelectronic devices and structures

In this paper we present NANOTCAD2D, a code for the simulation of the electrical properties of semiconductor-based nanoelectronic devices and structures in two-dimensional domains. Such code is based on the solution of the Poisson/Schrödinger equation with density functional theory and of the continuity equation of the ballistic current. NANOTCAD2D can be applied to structures fabricated on III–IV, strained-silicon and silicon–germanium heterostructures, CMOS structures, and can easily be extended to new materials. In particular, in the case of SiGe heterostructures, it includes the effects of strain on the energy band profiles. The effects of interface states at the air/semiconductor interfaces, particularly significant in the case of devices obtained with selective etching, are also properly taken into account.

Increased hot-carrier effects using SiGe layers in vertical surrounding-gate MOSFETs

The use of silicon germanium (SiGe) heterostructures in vertical surrounding gate MOSFETs provides an additional means for tailoring current-voltage (I-V) characteristics by controlling physical effects inside the device. Incorporation of an SiGe layer in the vertical MOSFET drain can modify hot-carrier characteristics via material dependent impact ionization coefficients. MOSFETs with ramped SiGe drain layers showed increased drain current in the soft breakdown regime, due to increased impact ionization as verified by substrate current measurement, with up to 1.5 V decreases in breakdown voltage. Comparison of simulation to experiment displayed the difficulties of accurately predicting device parameters, but demonstrated the usefulness of simulation to qualitatively predict device behavior without costly expenditures of time, material, and equipment.

Suppression of the floating-body effect using SiGe layers in vertical surrounding-gate MOSFETs

The use of silicon germanium (SiGe) heterostructures in vertical surrounding-gate MOSFETs provides an additional means for tailoring current-voltage (I-V) characteristics by controlling physical effects inside the device. Incorporation of an SiGe layer in the vertical MOSFET source can delay the floating-body effect by changing the back injection efficiency and current gain of the parasitic bipolar junction transistor (BJT). Structures with abrupt and ramped SiGe source layers showed up to 2 V and 6 V increases in breakdown voltage at low gate voltages with suppression of the floating-body effect kink. Comparison of simulation to experiment displayed the difficulties of accurately predicting device parameters, but demonstrated the usefulness of simulation to qualitatively predict device behavior.