Surface Of Silicon Chip Research Articles

Enhanced Boiling of FC-72 on Silicon Chips With Micro-Pin-Fins and Submicron-Scale Roughness

Experiments were conducted to study the effects of micro-pin-fins and submicron-scale roughness on the boiling heat transfer from a silicon chip immersed in a pool of degassed and gas-dissolved FC-72. Square pin-fins with fin dimensions of 50×50×60μm3 (width×thickness×height) and submicron-scale roughness (RMS roughness of 25 to 32 nm) were fabricated on the surface of square silicon chip 10×10×0.5mm3 by use of microelectronic fabrication techniques. Experiments were conducted at the liquid subcoolings of 0, 3, 25, and 45 K. Both the micro-pin-finned chip and the chip with submicron-scale roughness showed a considerable heat transfer enhancement as compared to a smooth chip in the nucleate boiling region. The chip with submicron-scale roughness showed a higher heat transfer performance than the micro-pin-finned chip in the low-heat-flux region. The micro-pin-finned chip showed a steep increase in the heat flux with increasing wall superheat. This chip showed a higher heat transfer performance than the chip with submicron-scale roughness in the high-heat-flux region. The micro-pin-finned chip with submicron-scale roughness on it showed the highest heat transfer performance in the high-heat-flux region. While the wall superheat at boiling incipience was strongly dependent on the dissolved gas content, it was little affected by the liquid subcooling.

A new detection technique for laser-generated Rayleigh wave pulses

A new detection technique is presented to observe Rayleigh wave pulses. The detection principle is discussed in detail. Rayleigh wave pulses were excited on the surface of polished aluminum. Well-defined waveforms were acquired. Furthermore, we observed Lamb wave on the surface of silicon chip. The experiment results show that this kind of detection technique is suitable to observe Rayleigh wave as well as Lamb wave and has a great potential in the field of laser ultrasonic.

X-Ray Stress Measurement of Mounted Silicon Chips

Stresses in semiconductor silicon chips were measured by an X-ray stress measurement method that is applicable to microareas (60 µ m dia.) of single crystals. The measurement was conducted before and after silicon chip mounting on a substrate. Also measured were residual stresses in areas around bumps. As a result, about +30 to +40 MPa tensile stresses were determined at the corners of the rear side of a test piece silicon chip, which was fixed with resin, and about +70 to +80 MPa tensile stresses were found near the solder-bump formed surface of another test piece silicon chip.

Simulating the dynamic electrothermal behavior of power electronic circuits and systems

The simulator solves for the temperature distribution within the semiconductor devices, packages, and heat sinks (thermal network) as well as the currents and voltages within the electrical network. The thermal network is coupled to the electrical network through the electrothermal models for the semiconductor devices. The electrothermal semiconductor device models calculate the electrical characteristics based on the instantaneous value of the device silicon chip surface temperature and calculate the instantaneous power dissipated as heat within the device. The thermal network describes the flow of heat from the chip surface through the package and heat sink and thus determines the evolution of the chip surface temperature used by the semiconductor device models. The thermal component models for the device silicon chip, packages, and heat sinks are developed by discretizing the nonlinear heat diffusion equation and are represented in component form so that the thermal component models for various packages and heat sinks can be readily connected to one another to form the thermal network. >

Electrical and optical characteristics of vacuum-sealed polysilicon microlamps

A silicon-filament vacuum-sealed incandescent light source has been fabricated using IC technology and subsurface micromachining. The incandescent source consists of a heavily doped p/sup +/ polysilicon filament coated with silicon nitride and enclosed in a vacuum-sealed ( approximately=80-mT) cavity in the silicon-chip surface. The filament is formed beneath the surface and later released using sacrificial etching to obtain a microstructure that is protected from the external environment. The filament is electrically heated to reach incandescence at a temperature near 1400 K. The power required to achieve this temperature (for a filament 510*5*1 mu m) is 5 mW. The emitted optical power is 250 mu W, and the peak in the spectrum distribution is near 2.5 mu m. The radiation approximately follows Lambert's cosine law. The subsurface micromachining technique used to produce the evacuated cavity has applications in other micromechanical devices. >

Microfabricated incandescent lamps

A silicon filament vacuum sealed incandescent light source has been fabricated using IC technology. The incandescent source consists of a heavily doped p(+) polysilicon filament coated with silicon nitride and enclosed in a vacuum sealed ( approximately 80-mT) cavity in the silicon chip surface. The filament is electrically heated to reach incandescence at a temperature near 1400 K. The power required to achieve this temperature for a filament 510 x 5 x 1 microm(3) is 5 mW yielding a total optical power of 250 microW with a peak distribution wavelength near 2.5 microm. The radiation emitted by this source approximately follows Lambert's cosine law. The energy conversion efficiency is 5%.

Special Properties of Molding Compounds for Small-Outline Packaged Devices

Wave soldering techniques currently used in the surface mounting of plastic leaded chip carrier (PLCC) and small-outline integrated circuit (SOIC) devices may be contributing to significantly reduced moisture resistance performance levels after components are assembled on printed circuit boards. Research indicates that delamination of the plastic package from the silicon chip surface is associated with violent moisture evaporation that occurs during sudden immersion of the device package into molten solder. Experimental data to support this conclusion are presented, and an advancement in molding compound technology is introduced that greatly reduces the occurrence of the phenomenon.