Silicide Thickness Research Articles

Nanoscale effect on the formation of the amorphous Ni silicide by rapid thermal annealing from crystalline and pre-amorphized silicon

The Ni monosilicide alloyed with Pt is widely used as contact material in advanced microelectronics devices and a good knowledge of silicide formation kinetics is required for the process control. In this work, the nature, and the growth kinetics of the first silicide obtained during the solid-state reaction between the Ni0.9Pt0.1 and the Si are studied for different pre amorphization implant (PAI) conditions as well as for a reference sample without PAI. Reactions between a 10 nm thick Ni0.9Pt0.1 film and Si (100) substrate are analyzed after several rapid thermal anneals (RTA). The nature of the first silicide is determined by Fourier Transform of TEM images and by chemical TEM-EDX analyses. The silicide growth behavior is determined by measuring the silicide thickness by X ray reflectivity (XRR) after the partial reaction induced by RTAs at different temperatures and times. To determine the growth law, the linear parabolic model is first considered but a nonlinear reactive diffusion model must be developed to accurately reproduce the experimental results. From this model, the effective diffusion coefficient as well as its activation energy were determined for the three samples with PAI and the reference sample without PAI. The influence of the driving force on the nonlinear diffusion for thin films is proved, and the impact of the amorphous substrate on the kinetics parameters is quantified and compared to the literature.

Superconducting V3Si for quantum circuit applications

V3Si thin films are known to be superconducting with transition temperatures up to 15 K, depending on the annealing temperature and the properties of the substrate underneath. Here we investigate the film structural properties with the prospect of further integration in silicon technology for quantum circuits. Two challenges have been identified: (i) the large difference in thermal expansion coefficient between V3Si and the Si substrate leads to large thermal strains after thermal processing, and (ii) the undesired silicide phase VSi2 forms when V3Si is deposited on silicon. The first of these is studied by depositing layers of 200 nm V3Si on wafers of sapphire and oxidized silicon, neither of which react with the silicide. These samples are then heated and cooled between room temperature and 860 °C, during which in-situ XRD measurements are performed. Analysis reveals a highly non-linear stress development during heating with contributions from crystallization and subsequent grain growth, as well as the thermal expansion mismatch between silicide and substrate, while the film behaves thermoelastically during cooling. The second challenge is explored by depositing films of 20, 50, 100 and 200 nm of V3Si on bulk silicon. For each thickness, six samples are prepared, which are then annealed at temperatures between 500 and 750 °C, followed by measurements of their resistivity, residual resistance ratio and superconducting critical temperature. A process window is identified for silicide thicknesses of at least 100 nm, within which a trade-off needs to be made between the quality of the V3Si film and its consumption by the formation of VSi2.

Structural-phase junctions in the system of Pt–Si during rapid thermal treatment

In recent years the interest to silicides significantly rose relating to their huge potentialities as the material of the low-Ohm contacts and interconnections of metallization of the silicon integrated circuits. In view of this the necessity appeared to consider more extensively the thermal dynamic, electric and structural peculiarities of their formation. Purpose of the work was in investigation of influence of the rapid thermal treatment on the structural –phase junctions in the system of Pt–Si during formation of platinum silicide. As samples, the Pt films were used, 43.7 nm thick and applied on the substrates of the mono-crystal silicon KEF КЭФ 0.5 with orientation (111) by means of the magnetron sputtering of the platinum target with purity of 99.95 % on the unit MRS 603 with the cryogenic pumping to the pressure not worse, than 5 · 10–5 Pa. As the operating medium, argon was used, whose purity constituted 99.933 %. Rapid thermal treatment was performed in the nitrogen medium within the temperature range from 200 to 550 °С with a step of 50 °С and the time period of 7 s. The process of interaction of platinum with silicon during treatment of the Pt–Si system was evaluated by means of the analysis of the RBS spectra. It is demonstrated, that within the temperature range of 200 °С ≤ Т ≤ 300 °С during 7 s of the rapid thermal process on the boundary of the metal film with the substrate, formation takes place of the Pt2Si layer owing to diffusion of the Pt atoms into silicon via the layer of the growing silicide. The temperature Т = 300 °С is peculiar for the complete application of the Pt film during 7 s in process of the silicide formation of the single phase system of Pt2Si. At 350 °С ≤ Т < 450 °С formation is registered of the double phase system of Pt2Si → PtSi, starting from the inter-phase boundary of Si/Pt2Si predominantly owing to the opposite diffusion of the Si atoms into the layer of Pt2Si. The temperature of the rapid thermal treatment Т = 450 °С marks formation of the thermally stable balanced structure of PtSi along the entire silicide thickness, which is 50–100 °С lower and considerably more rapid, than during the long-term balanced thermal treatment.

INFLUENCE OF TIME MODES OF THERMAL TREATMENT ON Pt-Si SYSTEM MICROSTRUCTURE

The paper is purposed to establish the principles of the micro-structural changes of Pt-Si system during the rapid thermal treatment. The Pt films 43.7 nm thick were applied on the substrates of mono-crystal silicon KEF 0.5 with orientation (111) by means of the magnetron platinum target sputtering (purity of 99.95 %) on the unit MPC 603 with the cryogen pumping to the pressure of no less than 5∙10-5 Pa. Argon was used as a working medium, whose purity constituted 99.933 %. Rapid thermal treatment was performed in the mode of the thermal balance with irradiation of the reverse side of the wafer by means of the non-coherent light flow in the nitrogen medium within the temperature range from 200 to 550 °C with a step of 50 °С during 7 s. In parallel, the solid phase synthesis was performed of platinum silicide by means of the standard method with application of the continuous single stage thermal treatment in the analogue medium (T = 550 °C, t = 30 min). Temperature monitoring was performed by means of the thermal couple method with accuracy of ±0.5 °C. The grain size was determined by the translucent electron microscopy method. Thickness of platinum silicide under formation, its surface micro-relief and the separation boundaries with silicon were determined by means of the raster electron microscopy. It is demonstrated, that with the rise of the rapid thermal treatment one can observe growth of the platinum film on silicon. A comparative analysis was conducted of the average size of grains, micro-relief of the PtSi surface and its separation boundary with silicon for two methods of its formation with application of the rapid thermal treatment and with application of the traditional continuous thermal treatment at the temperature of 550 °C during 30 min in the nitrogen atmosphere. By means of the raster electron microscopy method it is demonstrated, that size of the micro-relief on the separation boundary of PtSi-Si does not exceed 15.9 nm and the size of grains is 37.7 nm. This is in 2.5 and 3.1 times smaller, then in the case of the traditional single stage continuous thermal treatment.

Performance Analyses of Planar Schottky Barrier MOSFETs with Dual Silicide Layers at Source/Drain on Bulk Substrates and Material Studies of ErSix/CoSi2/Si Stack Interface**Supported by the National Natural Science Foundation of China (No. 61474005), and the Beijing Natural Science Foundation (No. 4182025).

A dual silicide layer structure is proposed for Schottky barrier metal-oxide-semiconductor field effect transistors (MOSFETs) on bulk substrates. The source/drain regions are designed to be composed with dual stacked silicide layers, forming different barrier heights to silicon channel. Performance comparisons between the dual barrier structure and the single barrier structure are carried out with numerical simulations. It is found that the dual barrier structure has significant advantages over the single barrier structure because the drive current and leakage current of the dual barrier structure can be modulated. Furthermore, the dual barrier structure’s performance is nearly insensitive to the total silicide thickness, which can relax the fabrication requirements and even make an SOI substrate unnecessary for planar device design. The formation of ErSix/CoSi2 stacked multilayers has been proved by experiments.

Phase-field study on the growth of magnesium silicide occasioned by reactive diffusion on the surface of Si-foams

Magnesium silicide has been widely exploited in thermoelectric and photovoltaic devices. In contrast to the fabrication of the magnesium silicide phase on flat Si-substrates in literature, we here concentrate on the growth of the Mg2Si phase on the surface of Si-foams by solid-state phase transformation. Based on the reactive diffusion mechanism, which is responsible for the growth of magnesium silicide, we adopt a grand-potential-based phase-field model to investigate the microstructural evolution during the solid-state phase transformation. The presently developed phase-field concept is capable to model the solid-state phase transformation between three stoichiometric phases, Mg2Si, diamond, and Mg-hcp phases. The simulated microstructures are scrutinized via a skeleton algorithm. The simulation results reveal that the thickness distribution of the Mg2Si phase follows the one of the foam-ligaments and that the average thickness of the magnesium silicide phase strongly depends upon the surface-volume ratio of the Si-foam rather than the porosity. In addition, it has been found that for a constant porosity, the mean value for the thickness of the magnesium silicide is different when the thickness distribution of the foam-strut is different. The relationship between the local thickness of the magnesium silicide phase and the foam-strut is analyzed based on the skeleton of the microstructure.

Study of SiO2 on Ni and Ti Silicide After Different Oxidation Techniques Investigated by XRR, SEM and Ellipsometry

Although silicide oxidation was studied 20 years ago, the interest in obtaining a robust process for new applications remains significant today. Indeed, the new architectural development process requires dense and narrow spaces. In this study, attempts were made to bury a silicide layer under a protective silica layer in order to keep the physical and electrical properties of the silicide constant after oxidation. Thus, we first tried to reproduce and study these conditions and, once acquired, aimed to decrease the oxidation temperature in order to meet industrial requirements. Titanium (Ti) and nickel (Ni) were chosen for their metallurgical interest and their integration capability in devices. Four different groups of silicide (TiSi, TiSi2, Ni2Si, NiSi) were targeted by adjusting the temperature. Then, all of the silicides, including one pure Si wafer, were oxidized using dry, wet and plasma techniques. In situ scanning electron microscopy, spectroscopic ellipsometry and X-ray reflectivity measurements were carried out simultaneously before and after oxidation of the silicide to characterize the SiO2 and silicide morphology, thickness and density. We found that after 800 °C dry oxidation, Ti silicide was totally oxidized, which was an unexpected result. But, Ni silicide showed an agglomeration phenomenon after 500 °C and 800 °C dry oxidation. Although, after wet oxidation, it was confirmed that the highest SiO2 thickness formed, the NiSi surface roughness was higher. In the case of plasma oxidation, we obtained a thin layer (≈ 1 nm) of SiO2 on NiSi with an extremely smooth surface.

FORMATION OF PLATINUM SILICIDE LAYERS DURING THE RAPID THERMAL PROCESSING OF THE SYSTEM PLATINUM-SILICON: STRUCTURAL-PHASE CHANGES

The paper presents the performed investigations of the structural-phase changes of the platinum-silicon system during rapid thermal processing (RTP) in the nitrogen medium within the temperature range from 200°C to 550°C with a step of 50 K and the time duration of 7 s. High effectiveness of the RTP process was demonstrated for formation of the thermally stable platinum silicides in the nanodimensional film (40 nm Pt)/(Si 111) substrate system. Within the temperature range of 200°C ≤ T ≤ 300°C during 7 s of the RTP process on the border of the → metallic film with the substrate there grows the Pt2Si layer at the expense of the Pt atoms diffusion into silicon through the layer of the growing silicide. It is peculiar for the temperature T = 300°C to use completely the film of Pt for 7 s in the process of the silicide formation of the single-phase system of Pt2Si. At 350°C ≤ T < 450°C formation is registered of the double-phase system of Pt2Si PtSi, starting from the interphase boundary of Si/Pt2Si predominantly at the expense of the oncoming diffusion of Si atoms into the layer of Pt2Si. The RTP temperature T = 450°C marks formation of the thermally stable structure of PtSi along the entire thickness of silicide, which is 50-100°C lower and substantially faster, than during the continuous furnace thermal treatment (FTT).

DC Performance Variations of SOI FinFETs with Different Silicide Thickness

DC performance and the variability of n-type silicon-on-insulator dopant-segregated FinFETs with different silicide thickness (Tsili) are analyzed. DC parameters including threshold voltage, low-field-mobility-related coefficient, and parasitic resistance are extracted from Y-function method for the comparison of DC performance and variability, and the correlation analysis. All the devices show similar subthreshold characteristics, but the devices with thicker Tsili have greater threshold voltages. The devices with thicker Tsili suffer from the DC performance degradation and its greater variations because the Schottky barrier height at the NiSi/Si interface increases and fluctuates greatly. This effect is validated by greater threshold voltages, larger parasitic resistances, and high correlations among all the DC parameters for the thicker Tsili. The devices with thicker Tsili also have higher low-frequency noise because of larger parasitic resistances and their correlated mobility degradations. Therefore, the device with relatively thin Tsili is expected to have better DC performance and variability concerns.

(Invited) Ultrathin Epitaxial Silicides for Semiconductor Contacts

Over the past decades, nickel mono-silicide NiSi has become one of the preferred materials to enhance contacting in silicon-based semiconductor devices. However, the formation of a useable NiSi contacting layer is challenged by the continued miniaturization in the micro-electronics industry. As the silicide thickness is reduced, it is more likely to agglomerate [D. Deduytssche et al., J. Appl. Phys. 98, 033526 (2005)]. Therefore it is crucial to stabilize silicide films, either by altering the microstructure of the NiSi phase or by exploring the use of alternative phases that are more resistant to agglomeration. However, De Keyser et al. [Appl. Phys. Letters. 96, 173503 (2010)] reported that below a critical thickness of 5 nm, annealing of ultrathin Ni films results in surprisingly stable silicide layers. In this work, we systematically investigated (1) the influence of Ni thickness on the formation of nickel silicides in the range between 0 and 15 nm, and (2) the influence of alloying elements (e.g. Al, Co, Pd, Ge and Pt) on the phase formation sequence and on the critical thickness phenomenon. Research on such ultra-thin films is very challenging using conventional lab-based XRD techniques. Therefore, the silicidation process was investigated in detail through XRD-based pole figure measurements at the DiffAbs beamline of the SOLEIL synchrotron. These measurements allow unambiguous phase identification, even if the formed silicide would exhibit a preferential orientation to the monocrystalline substrate. Furthermore, these synchrotron based pole figure measurements provided detailed texture information that helps to understand the observed shift in critical thickness and the morphological stability of the ultra-thin silicide layers. For an as deposited layer thickness above the critical thickness, we observed the sequential formation of Ni -> θ-Ni2Si (epitaxial) -> δ-Ni2Si -> NiSi, which agglomerates. Samples in the ultrathin regime (i.e. below the critical thickness, e.g. for 3nm pure Ni) instead exhibit a formation sequence identified as Ni -> θ-Ni2Si (epitaxial) -> NiSi2 (epitaxial). This finally formed NiSi2 is remarkably stable and does not suffer from agglomeration. The phase sequence changes at a critical thickness for pure Ni films around 5nm as-deposited thickness. Through alloying of the initial Ni layer, we could influence this critical thickness to higher (Al) and lower (Ge, Pd, Pt) values. Our pole figure measurements also showed that the interface alignment of these silicide grains with their surroundings, and the energetic cost of creating such an interface, plays a crucial role during the phase formation. In summary, we report that the phase formation sequence during the Ni salicidation process severely changes at a critical thickness of 5nm. Pole figure measurements show that the thicker films form intermediate Ni-rich phases which subsequently form agglomerating NiSi. Thinner films, however, show a simplified formation sequence which results in the formation of epitaxial, non-agglomerating NiSi2. Secondly, we demonstrate that this critical thickness can be influenced to higher or lower values through the addition of alloying elements, an effect that can be understood through the effect of mixing entropy. Furthermore, crystallographic alignment matching at the interface is a crucial parameter controlling the phase formation kinetics in these sub-10nm thick films.

Interatomic interactions at interfaces of multilayered nanostructures (Co45Fe45Zr10/a-Si)40 and (Co45Fe45Zr10/SiO2)32

The interatomic interaction and phase formation at interfaces between the metallic layers Co45Fe45Zr10 and nonmetallic interlayers of amorphous silicon or silicon dioxide in multilayered nanostructures (Co45Fe45Zr10/a-Si)40 and (Co45Fe45Zr10/SiO2)32 have been investigated using ultrasoft X-ray emission spectroscopy (USXES) and X-ray diffractometry. The multilayered nanostructures have been fabricated by ion-beam sputtering of two targets onto the surface of a rotating glass-ceramic substrate. The investigations have demonstrated that, regardless of the expected composition of the interlayer (amorphous silicon or silicon dioxide), d-metal silicides, predominantly lower cobalt silicides, are formed at the metallic layer/interlayer interface. However, in this case, the thickness of silicide interfaces in the multilayered nanostructures with oxide interlayers (series O) has a significantly lower value of ∼0.1 nm, and, therefore, the central layer of the interlayers remains oxide. In the multilayered nanostructures with amorphous silicon interlayers almost all silicon is consumed in the formation of nonmagnetic silicide phases. When the thickness of this interlayer exceeds the thickness of the metallic layer, the multilayered nanostructures become nonmagnetic.

Optical conductivity of Ni1−xPtxSi monosilicides (0 &amp;lt; x &amp;lt; 0.3) from spectroscopic ellipsometry

The optical constants of 22 nm thick Ni1−xPtxSi (0 &amp;lt; x &amp;lt; 0.3) monosilicide films were measured using spectroscopic ellipsometry, in the spectral range from 0.6 to 6.6 eV at room temperature. Ni1−xPtx films sputtered on clean Si were annealed at 500 °C for 30 s to form nickel platinum monosilicides. The correct silicide thickness was found by minimizing Si substrate artifacts in the optical constants of Ni1−xPtxSi determined from ellipsometric data analysis. Two interband transitions at 1.8 and 4.5 eV were observed (rather than three peaks in PtSi). The absorption peak at 4.5 eV broadens with increasing Pt content in the monosilicide.

Ultra Low Contact Resistivities for CMOS Beyond 10-nm Node

Contact resistances are directly measured for contacts with sizes from 25 to 330 nm using e-beam based nano-TLM devices. Record low contact resistivities <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">${\sim}1.5\times 10^{-9}~\Omega\cdot~{\rm cm}^{2}$</tex></formula> are extracted from Ni(Pt) silicide contacts on in situ boron-doped <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">${\rm Si}_{0.7}{\rm Ge}_{0.3}$</tex></formula> with a chemical boron-doping density of <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$2\times 10^{21}/{\rm cm}^{3}$</tex></formula> . This is very promising for pMOS applications beyond the 10-nm node. A clear dependence of contact resistance on the silicide thickness has also been found.

On the kinetics of platinum silicide formation

In this work, the kinetics of platinum silicide formation for thin Pt films (50 nm) on monocrystalline ⟨100⟩ silicon is investigated via in situ resistance measurements under isothermal (197–275 °C) conditions. For Pt2Si diffusion limited growth was observed. For PtSi formation, however, no linear relation between silicide thickness and √t was found. PtSi growth over time could be described using the Avrami relation rendering Avrami exponent n=1.4±0.1. Additionally, an effective activation energy EA=1.7±0.1 eV was derived using the Avrami k values. The findings are important for obtaining well defined silicide films and silicide-to-silicon contacts.

Effect of filament temperature and deposition time on the formation of tungsten silicide with silane

The effect of filament temperature and deposition time on the formation of tungsten silicide upon exposure to the SiH 4 gas in a hot wire chemical vapor deposition process was studied using the techniques of cross-sectional scanning electron microscopy and Auger electron spectroscopy. At a relatively low temperature of 1500 °C, the decomposition of WSi 2 phase and the diffusion of Si towards the silicide/W interface produce a thick W 5Si 3 layer. The diffusional nature leads to a parabolic rate law for silicide growth. An exponential decrease of silicide thickness with temperature between 1600 and 2000 °C illustrates the dominance of Si evaporation at higher temperatures (T ≥ 1600 °C) over the silicide formation.

Nitric Acid Oxidation of Si for the Tunneling Oxide Application on CoSi2 Nanocrystals Nonvolatile Memory

In this work, nitric acid oxidation was studied to fabricate the tunneling oxide of nanocrystal memory devices. about 4 nm thick was formed through oxidizing the sputtered Si film by immersing in nitric acid solution for 60 s. After oxide formation, a rapid thermal annealing process set at for 30 s was used to improve oxide quality. In addition, the formed film was analyzed by X-ray photoelectron, capacitance–voltage, and current density–voltage measurements to study the process of the nitric acid oxidation. After the investigation of the nitric acid oxidized , a 6 nm thick cobalt silicide thin film was deposited and aggregated on the formed layer as the charge-trapping layer. The cobalt silicide nanocrystal memory device showed an obvious memory effect and good reliability, which confirms that the nitric acid oxidation method has potential for memory application.

Optimum location of silicide/Si interface in ultra-thin body SOI MOSFETs with recessed and elevated silicide source/drain contact structure

Optimization of the series resistance of silicide contact structure in ultra-thin body (UTB) silicon-on-insulator (SOI) MOSFET with elevated source/drain (S/D) is examined through theoretical analysis and 2-dimensional simulation. It is found that the optimum silicide/Si interface position, which exhibits lowest parasitic series resistance, can be located at inside of SOI layer under the surface as the effective contact length is scaled down further below 100 nm regime. The closed-form analytical expressions derived from modified transmission line model principle provide a guideline for optimum design of silicide thickness and contact parameters in self-aligned silicide technology.

Structural and electronic properties of rare earth silicide nanowires on Si(557)

We report on the atomic structure and electronic properties of self-organized dysprosium and erbium silicide nanowires on Si(557), studied using scanning tunneling microcopy and angle-resolved photoelectron spectroscopy. The nanowires were prepared by deposition of different rare earth amounts and subsequent annealing for silicide formation. Due to the stepped structure of the Si(557) surface, nanowires form along the step edges, showing a variety of structurally and electronically different types, depending on the preparation conditions. At submonolayer dysprosium coverages, different chainlike structures dominate, showing one-dimensional dispersion with half-metallic properties. These nanowire regions are separated by $7\ifmmode\times\else\texttimes\fi{}7$ reconstructed Si(111) facets or submonolayer dysprosium silicide patches on these facets. At monolayer coverages, in contrast, mainly nanowires with lengths exceeding $1\text{ }\ensuremath{\mu}\text{m}$ and widths of a few nanometers are found, forming on the (111) facets of the Si(557) surface. Their electronic properties are characterized by a two-dimensional band structure with strong dispersion both parallel and perpendicular to the nanowires and clear metallic behavior, and it is demonstrated that they are formed from hexagonal ${\text{DySi}}_{2}$ monolayers. In the case of thicker silicide layers, metallic nanowires form again on the Si(111) facets, but with clear structural and electronic characteristics of hexagonal ${\text{Dy}}_{3}{\text{Si}}_{5}$ multilayers. At these coverages, additional structures are found, which show an intense signal in the photoelectron spectroscopy data. Related experiments on the growth of erbium silicides indicated the formation of very similar nanowire structures.

Microstructure evolution of the Ir-inserted Ni silicides with additional annealing

Thermally-evaporated 10 nm-Ni/1 nm-Ir/(poly)Si structures were fabricated in order to investigate the thermal stability of Ir-inserted nickel silicide after additional annealing. The silicide samples underwent rapid thermal annealing at 300 ° C to 1200 ° C for 40 s, followed by 30 min annealing at the given RTA temperatures. Silicides suitable for the salicide process were formed on the top of the single crystal and polycrystalline silicon substrates, mimicking actives and gates. The sheet resistance was measured using a four-point probe. High resolution x-ray diffraction and Auger depth profiling were used for phase and chemical composition analysis, respectively. Transmission electron microscope and scanning probe microscope were used to determine the cross-section structure and surface roughness. The silicide, which formed on single crystal silicon substrate with surface agglomeration after additional annealing, could defer the transformation of Ni(Ir)Si to Ni(Ir)Si2 and was stable at temperatures up to 1200 °C. Moreover, the silicide thickness doubled. There were no outstanding changes in the silicide thickness on polycrystalline silicon. However, after additional annealing, the silicon-silicide mixing became serious and showed high resistance at temperatures >700 °C. Auger depth profiling confirmed the increased thickness of the silicide layers after additional annealing without a change in composition. For a single crystal silicon substrate, the sheet resistance increased slightly due to the significant increases in surface roughness caused by surface agglomeration after additional annealing. Otherwise, there were almost no changes in surface roughness on the polycrystalline silicon substrate. The Ir-inserted nickel monosilicide was able to maintain a low resistance in a wide temperature range and is considered suitable for the nano-thick silicide process.

Silicide Schottky-Barrier Phototransistor Integrated in Silicon Channel Waveguide for In-Line Power Monitoring

An in-line power monitor with a thin nickel silicide layer placed on a silicon channel waveguide for optical absorption is proposed. A two-terminal Schottky-barrier collector phototransistor configuration is used to amplify significantly the primary photocurrent, and the Ni silicide thickness is thinned down to ~5 nm using a two-step rapid thermal annealing procedure to reduce the insertion loss. The demonstrated in-line detectors exhibit ~24-mA/W responsivity around 1550 nm with the insertion loss of ~0.8-1.2 dB. The approaches to further increase the responsivity and simultaneously decrease the insertion loss are addressed.