Signal Duty Cycle Research Articles

Design and performance analysis of an embedded amplified piezoelectric jetting dispensing valve

Abstract In order to satisfy the market's demand for high-consistency, micro-dispensing of colloids, an embedded lever-amplified piezoelectric dispensing valve based on flexure hinge is designed. This structure has stable jetting performance, strong reliability, and can achieve micro-dispensing of medium and low viscosity glue. Theoretical analysis shows that the output displacement of the piezoelectric stack can meet the displacement requirement of dispensing after being amplified by this amplification mechanism. And the output displacement and mode of the amplification mechanism are calculated and analyzed by simulation. The rationality of the simulation model is verified by experiments, and the effect law of driving voltage, signal duty cycle and working frequency on the mass of glue droplets is obtained. The results show that under the conditions of driving voltage 100 V, duty cycle 50%, glue supply pressure 0.6 MPa, working frequency 100 Hz, the consistency deviation of single dispensing amount is ± 2.01%, as a whole, 0.34-0.38 mg of uniform tiny glue dots can be obtained. The experimental results have verified the stability and micro-dispensing performance of the embedded lever amplification piezoelectric dispensing valve, providing reference for the subsequent application and research of jet dispensing.

Motion speed control of magnetic microsphere robot under alternating signals

Gradient magnetic field driving method does not have strict structural requirements for micro robots, making processing convenient. However, the speed control parameter of micro robots under gradient magnetic fields is single, which limits the practical application of this type of robots. Therefore, this article proposes to use alternating signals to control the motion speed of magnetic microsphere robots. Here, a motion analysis model of a magnetic microsphere robot driven by alternating signals is established, and a formula for calculating the movement speed of the magnetic microsphere robot is provided. The special motion mode of the magnetic microsphere robot driven by alternating signals is considered, and the correctness of the theoretical calculation is verified by experiments. The mechanisms and conditions for the different motion modes of magnetic microsphere robots are revealed. The movement speed of the magnetic microsphere robot under the alternating voltage signals is determined as a function of signal frequency, signal duty cycle, and bias voltage value. The results show that under the alternating voltage signals, the magnetic microsphere robot has three different motion states, namely rotation -movement alternation, swing-movement alternation, and pure movement. There are three control parameters of the speed, which are signal change frequency, duty cycle, and bias voltage.

Design and Optimization of an Ultraviolet Scattering Communication System Based on Duty Cycle Regulation

In this paper, a novel ultraviolet (UV) scatter communication scheme is presented, designed to dynamically adjust the signal duty cycle to optimize on–off keying (OOK) modulation and reduce the bit error rate (BER), particularly under varying rate settings. This approach addresses the significant challenge posed by LED tailing effects, which cause signal fluctuations and increase BER in high-speed communications. This BER suppression scheme is proposed for the first time in UV communication research, enhancing communication performance without the need for additional hardware or complex algorithms. A UV communication model that incorporates both path loss and LED tailing effects is introduced, with the probability density function of the signal from transmitter to receiver derived. By varying the signal duty cycle, tailing-induced BER is effectively minimized. Additionally, a closed-form expression for signal transmission BER using a single-scattering model is provided, and the proposed UV communication system is validated through comprehensive simulations and experimental tests. The results indicate that LED tailing has a pronounced impact on BER at higher communication speeds, while its effects are less significant at lower speeds. By optimizing the duty cycle parameters for various communication rates, findings demonstrate that lower duty cycle settings significantly reduce the BER at higher speeds. This further demonstrates the excellent performance of the proposed UV communication solution for OOK-modulated optical communication.

Shared External Driver for VHF Converter With a Synchronous Rectifier Based on Matching Network Parameters Optimization

In order to reduce the conduction loss of diode, synchronous rectification is usually adopted in very-high-frequency (VHF) converters, in which the rectifier diode is replaced by a MOSFET with very low on-state resistance. And to ensure normal operation of the synchronous rectifier switch, it is necessary to design a suitable driver with accurate timing. The widely used self-oscillating resonant drive circuit has a limited range of duty cycle adjustment, and the body diode of synchronous rectifier switch has long on-state time and a large conduction loss. Therefore, based on the analysis and parameters optimization of matching network, a shared external drive circuit is put forward. That is, the drive signals of the inverter switch and the synchronous rectifier switch come from the same external oscillation signal. On the premise of ensuring accurate drive timing, it can improve the drive signal's duty cycle of synchronous rectifier switch, reduce the conduction loss of body diode, and improve the efficiency of converter. Then on the basis of the proposed drive circuit, a VHF converter prototype with operating frequency of 10 MHz, 13 V input and 8 V/10 W output is designed, and the feasibility of the proposed drive circuit is verified by simulations together with experiments.

Study of MOS and IGBT transistors at switching with variable duty cycle

In this paper, the functionality of MOS and IGBT transistors is examined under identical working conditions, both in terms of command frequency and load circuit. A variable duty cycle and variable frequency signal generator is used to control transistors. Various electronic components and Arduino-UNO modules, as well as the 16×2 LCD screen, were used to create the signal generator. The control signal is amplified by a current amplifier to adapt the output voltage to the value required to control the transistors. The operation of MOS and IGBT transistors at various operating frequencies with resistive or inductive loads is compared. Thus, the communication times of the transistor capsules were determined at various operating temperatures. The temperature was determined indirectly by connecting a thermistor to the transistor capsule.

Degradation Measurement and Modelling under Ageing in a 16 nm FinFET FPGA.

Most of the latest generation of integrated circuits use FinFET transistors for their performance, but what about their reliability? Does the architectural evolution from planar MOSFET to FinFET transistor have any effect on the integrated circuit reliability? In this article, we present a test bench we have developed to age and measure the degradation of 5103 ring oscillators (ROs) implemented in nine FPGAs with 16nm FinFET under different temperature and voltage conditions (Vnom≤Vstress≤1.3Vnom and 25°C≤Tstress≤115°C) close to operational conditions in order to predict reliability regarding degradation mechanisms at the transistor scale (BTI, HCI and TDDB) as realistically as possible. By comparing our initial RO measurements and the data extracted from Vivado, we will show that the performance of the nine FPGAs is between 50% and 70% of the best performance expected by Vivado. After 8000 h of ageing, we will see that the relative degradations of the RO are a maximum of 1%, which is a first indicator proving the FPGAs' good reliability. By comparing our results with similar studies on 28 nm MOSFET FPGAs, we will reveal that 16 nm FinFET FPGAs are more reliable. To be implemented in an FPGA, an RO uses logic resources (LUT) and routing resources. We will show that degradation in the two types of resources is different. For this reason, we will present a method for separating degradations in logical and routing resources based on RO degradation measures. Finally, we will model rising and falling edge propagation time degradations in an FPGA as a function of time, temperature, voltage, signal duty cycle and resources used in the FPGA.

Analysis and Design of a Duty-Cycle-Controlled Amplitude Shift Keying Class-E Power Amplifier

This paper presents a method for implementing amplitude modulation in class-E power amplifiers (PA). The output voltage amplitude of a class-E PA is proportional to the input signal duty cycle. The proposed method exploits this feature in order to implement amplitude shift keying (ASK) modulation in the standard class-E power amplifier. The conditions for the optimum operation of a class-E PA while using two different input duty cycles are analyzed. The desired conditions are derived at the same time to reduce differences between optimum circuit elements while using different input duty cycles. The resulting class-E PA satisfies both zero voltage switching (ZVS) and zero derivatives of voltage at switching (ZDVS) conditions by changing only one capacitor. This method neither degrades the efficiency nor needs many changes in circuit components. A step-by-step design procedure based on the proposed method is introduced. The simulations and measurement results verify the accuracy of the proposed method. The fabricated PA is designed to operate at 1MHz frequency with V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">DD</sub> = 2V and 50Ω load. The input duty cycle is changed from 25% to 49%, resulting in output amplitudes of 1.2Vpp and 3.68Vpp, and efficiencies of 88% and 94%, respectively.

A 3–5 GHz, 108fs-RMS jitter, clock receiver circuit for time-interleaved ADCs with a sampling rate of 4 GS/s

This paper presents a high-speed, low-jitter, and high-precision clock receiver circuit (CLKRX) for time-interleaved ADCs with a sampling rate of 4 GS/s operating in the 3–5 GHz frequency range. The CLKRX circuit is composed of a continuous-time linear equalizer (CTLE) and a duty-cycle corrector (DCC). The CTLE featuring active feedback, negative Miller capacitance, and source-follower feedback is capable of enhancing the bandwidth, and improving the quality of the high-speed clock. Whereas the 3–5 GHz DCC module contains a common-mode voltage correction circuit and a wideband amplifier that corrects the input signal's duty cycle ranging from 20% to 80%. A second-order duty-cycle detection circuit is used in the feedback loop, which significantly improves the range and accuracy of duty-cycle correction and greatly reduces duty cycle jitter.The clock receiver circuit proposed in this paper was verified in a 28 nm CMOS process, and the test results show that the output duty cycle is corrected to 50 ± 0.1% within the input duty cycle range of 20–80% (3–5 GHz).

Design of Double Closed Loop Control System for DC Motor Based on TX8C1010 Single Chip

In order to improve the operational strength and control precision of the DC motor, a double closed-loop control system based on TAIXIN TX8C1010 MCU is proposed. The single chip is based on a high-speed 8051 core, which is applied to home appliances and can realize the double closed-loop motor control algorithm. The given speed value provided by the potentiometer is compared with the real-time speed value and inputs the error to the speed loop function, which is based on the incremental PID algorithm, to calculate the reference current value. Then it is compared with the real-time current value and inputs the error into the current loop. The PWM signal duty cycle is determined by the output value of the current loop to adjust and stabilize the motor speed. The drive circuit outputs the PWM signal in the inverse amplification way to control the operation of the DC motor, and finally tests the function on the MAGTROL M-TEST7 motor test platform. The test results show that the control system has fast response speed, strong load capacity, good robustness and safety. Hence, TAIXIN TX8C1010 single-chip machine is feasible in the DC motor control. It can be improved to strengthen its load characteristics according to the parameters and applied to a variety of power DC motor control.

Design and experiment of a new double needle type piezoelectric jetting dispenser

To improve the performance of piezoelectric (PZT) jetting dispensers in the electronic packaging industry and address the problems of oversized, easily fatigued elastic hinges and low repetition accuracy of conventional PZT jetting dispensers with a compliant mechanism-based lever, a new double needle PZT jetting dispenser prototype was developed. The advantage of the proposed structure over compliant mechanism-based lever was demonstrated by dynamics analysis. Firstly, the design stroke of the needle and the modal state of the dispenser body were analyzed using ANSYS. Secondly, the theoretical model of adhesive injection was established, the fluid pressure change process inside the nozzle during the working cycle of the jetting dispenser was simulated using Fluent, and the effects of the supply pressure and needle stroke on the injection speed of the droplet were investigated. Finally, a test bench was built to conduct the experiment, and the results showed that the supply pressure and the driving signal duty cycle between 20% and 80% were positively correlated with the size of droplet diameter, whereas the driving signal frequency was negatively correlated with the droplet diameter, thereby validating the proposed adhesive injection model. Under the experimental conditions, the highest operating frequency of the designed PZT jetting dispenser was 400 Hz, which is close to the high-frequency level of existing studies, and the minimum droplet diameter obtained was 0.36 mm, which is 0.1–0.2 mm less than that of the existing PZT jetting dispenser with a compliant mechanism drive, meeting the industry requirements for the working performance of a PZT jetting dispenser.

Design and analysis of a frequency division and duty cycle control circuit for on-chip signal synthesis

In this article, a complementary metal–oxide–semiconductor (CMOS) frequency and duty cycle controller (FDCC) is presented for on-chip signal synthesis. The circuit consists of a few logic gates and a voltage-controlled oscillator, and is functionally similar to a programmable divide-by-N frequency divider. It is designed for driving integrated sensor and actuator systems. Compared with other frequency dividers with the same control flexibility, the proposed circuit features a compact topology and allows the control over the output signal duty cycle. For the proof-of-concept, a prototype 1 × 4 array of identical FDCCs has been fabricated on a 0.35μm Austria Mikro Systeme (AMS) CMOS process. Each FDCC occupies an active area of 0.0051mm2, which is area-efficient. The array has been validated to generate 4 synchronized 4MHz∼64MHz outputs with a duty cycle tuning range of 3.125%∼96.875%. Although driven by a 5-V power supply, it still provides a relatively high power-efficiency of 1.26GHz/mW.

A low supply voltage sensitivity low power oscillator design

With the rapid development of social economy, the integrated circuit industry has developed rapidly. At the same time, people’s requirements for the cost, power consumption, integration, stability and other aspects of integrated circuit chips have increased. Oscillators, as an important module for providing clocks to chips, have higher requirements for on-chip oscillators. The purpose of this paper is to achieve a low supply voltage sensitive and low power oscillator. Based on this research purpose, this paper proposes a power adjustment oscillator circuit of the flip level technique, which realizes that the clock signal duty cycle is 50% under the typical case of a supply voltage of 4 V. The center frequency is 512 KHz, of which the process angle trimming range of the capacitor trim circuit is 52.37%-211.28%. With the supply voltage range of 2.5 V to 5.5 V, the clock signal has a frequency variation of 0.299%/V, has low supply voltage sensitivity, and consumes only 400 nA with low power dissipation.

A Novel Method to Achieve Precision and Reproducibility in Exposure Parameters for Low-Frequency Pulsed Magnetic Fields in Human Cell Cultures.

The effects of extremely low-frequency electromagnetic field (ELF-MF) exposure on living systems have been widely studied at the fundamental level and also claimed as beneficial for the treatment of diseases for over 50 years. However, the underlying mechanisms and cellular targets of ELF-MF exposure remain poorly understood and the field has been plagued with controversy stemming from an endemic lack of reproducibility of published findings. To address this problem, we here demonstrate a technically simple and reproducible EMF exposure protocol to achieve a standardized experimental approach which can be readily adopted in any lab. As an assay system, we chose a commercially available inflammatory model human cell line; its response to magnetic fields involves changes in gene expression which can be monitored by a simple colorimetric reporter gene assay. The cells were seeded and cultured in microplates and inserted into a custom-built, semi-automated incubation and exposure system which accurately controls the incubation (temperature, humidity, ) and magnetic-field exposure conditions. A specific alternating magnetic field (<1.0% spatial variance) including far-field reduction provided defined exposure conditions at the position of each well of the microplate. To avoid artifacts, all environmental and magnetic-field exposure parameters were logged in real time throughout the duration of the experiment. Under these extensively controlled conditions, the effect of the magnetic field on the cell cultures as assayed by the standardized operating procedure was highly reproducible between experiments. As we could fully define the characteristics (frequency, intensity, duration) of the pulsed magnetic field signals at the position of the sample well, we were, for the first time, able to accurately determine the effect of changing single ELF-MF parameters such as signal shape, frequency, intensity and duty cycle on the biological response. One signal in particular (10 Hz, duty cycle, rectangular, bipolar, T) provided a significant reduction in cytokine reporter gene expression by in our model cell culture line. In sum, the accuracy, environmental control and data-logging capacity of the semi-automated exposure system should greatly facilitate research into fundamental cellular response mechanisms and achieve the consistency necessary to bring ELF-MF/PEMF research results into the scientific mainstream.

Accurate Signal Conditioning for Pulsed-Current Synchronous Measurements.

This paper describes a compact electronic system employing a synchronous demodulation measurement method for the acquisition of pulsed-current signals. The fabricated prototype shows superior performance in terms of signal-to-noise ratio in comparison to conventional instrumentation performing free-running measurements, especially when extremely narrow pulses are concerned. It shows a reading error around 0.1% independently of the signal duty cycle (D) in the investigated D = 10−4–10−3 range. Conversely, high-precision electrometers display reading errors as high as 30% for a D = 10−4, which reduces to less than 1% only for D > 3 × 10−3. Field tests demonstrate that the developed front-end/readout electronics is particularly effective when coupled to dosimeters irradiated with the X-rays sourced by a medical linear accelerator. Therefore, it may surely be exploited for the real-time monitoring of the dosimeter output current, as required in modern radiotherapy techniques employing ultra-narrow pulses of high-energy photons or nuclear particles.

Prediction method of multi-frequency non-intermodulation electromagnetic radiation blocking effect of BeiDou navigation receiver

In the test of the electromagnetic radiation blocking effect of the navigation receiver, it is found that the sensitivity of the navigation receiver to single frequency continuous waves and sinusoidal amplitude modulation waves will change with the change in the satellite useful signal strength. This phenomenon reflects that the sensitivity of frequency equipment to multi-frequency electromagnetic radiation is not fixed to a certain extent. In order to make up for the deficiency that the existing multi-frequency electromagnetic radiation evaluation methods can only deal with a single situation, this paper uses the time delay characteristics of the circuit response, introduces the concepts of normalized interference levels and signal duty cycles, establishes the evaluation model of the multi-frequency non-intermodulation electromagnetic radiation blocking effect of frequency equipment, and puts forward the prediction method of the multi-frequency electromagnetic radiation blocking effect of frequency equipment. Taking a certain type of BeiDou navigation receiver as the test object, the single-frequency continuous wave and double-frequency continuous wave electromagnetic radiation blocking effect tests are carried out by using the full-level irradiation method. The test data are substituted into the model established in this paper for verification. The results show that the maximum evaluation error of the model is 2.23 dB. The model and the effect prediction method established in this paper are of great significance for the survival ability evaluation of frequency equipment in complex electromagnetic environments.

A full duplex FSO transmission system using RZ-4PAM downlink signals with 67% duty cycle and AMI uplink signals

To improve the transceiver quality of Free Space Optical (FSO) system and ensure that user access is feasible the network, a high-speed full-duplex 100 meters FSO transmission scheme using 67% duty cycle RZ-4PAM downlink and alternative mark inversion (AMI) uplink signals is designed system. In the downlink, one PAM sequence generator and one Mary pulse generator (MPG) module are used to generate 67% RZ-4PAM optical signals at 10Gbit/s through a Mach-Zehnder intensity modulator (MZM). The upstream AMI signals generator by the pseudo-random binary sequence (PRBS) generator and the precoding process. We have measured optical spectrums, time-domain waveforms and eye diagrams before and after signals transmission by system simulation. The transceiver performance of the downstream RZ-4PAM with 67% duty cycle and upstream AMI optical signals the in the 100m FSO transmission system is analyzed.

Spray drift characteristics of pulse-width modulation sprays in wind tunnel

Pulse-width modulation (PWM) sprays can improve flow accuracy by adjusting duty cycle and frequency signal which accurately controls the relative proportion of opening time of solenoid valve. The objective of this research was to determine the impacts of PWM duty cycle and frequency on spray drift characteristic. Spray tests were conducted in a wind tunnel with a PWM variable-rate spraying system. The airborne drift and sediment drift were determined with tracer method, and the drift potential reduction (DPR) compared with reference condition of 100% duty cycle at vertical profile and horizontal planes were calculated, respectively. The results show that, at a given frequency, droplet size decreases with the increase of duty cycle, the main reason is that the liquid does not reach full pattern development at lower duty cycle. Duty cycle has a greater impact than the frequency on spray drift, the influence weights of duty cycle on airborne drift and sediment drift were 88.32% and 77.89%, respectively. At a lower PWM frequency, in addition to the droplet size, the spray drift may be affected by the pulsed spray pattern. From the perspective of reducing spray drift, it is recommended that the PWM duty cycle should be set in the range of 20%-70% to reduce the potential drift in PWM sprays. This research provides a pesticide drift reduction scheme for variable spraying technology, which can serve as a theoretical basis for PWM parameter selection. Keywords: nozzle, spray drift, pulse-width modulation, drift potential reduction, droplets spectral DOI: 10.25165/j.ijabe.20221504.7440 Citation: Li L L, Chen L P, Zhang R R, Tang Q, Yi T C, Liu B Q, et al. Spray drift characteristics of pulse-width modulation sprays in wind tunnel. Int J Agric & Biol Eng, 2022; 15(4): 7–15.

Flux-Trajectory-Optimization-Based Predictive Flux Control of Permanent Magnet Synchronous Machines

This article proposed a predictive flux control strategy for permanent magnet synchronous machines based on flux trajectory optimization. Instead of minimizing the instantaneous flux tracking error at the end of each sampling period, the effect of different control sets on flux trajectories within the entire sampling interval is taken into account in the cost function. As a result, steady-state torque and flux ripples can be suppressed. Besides, inaccurate sector determination found in the conventional predictive control strategies can be successfully avoided. As well as highly dynamic performances inheriting from the predictive characteristics, enhanced steady-state torque control performances can be guaranteed under different operating conditions. Although the extended control set is utilized to augment the control freedom and further reduce torque ripple, the control effect of the proposed algorithm does not rely on the increase of switching frequency. Compared with the traditional predictive control strategies based on either finite control set or an extended control set, a superior control effect can be obtained while keeping a low switching frequency. Moreover, duty cycle signals are directly obtained in the prediction process, and no additional space vector pulsewidth modulation method is needed. Experimental validations and comprehensive comparison are conducted to demonstrate the effectiveness of the proposed strategy.

Rancang Bangun Generator PWM Berbasis Mikrokontroler AVR ATmega

PWM is widely used in the fields of automatic control, power electronics and cellular communications. Previous research designed a PWM generator using the OMAP-L138 chip to produce a simple, high-precision, flexible and portable circuit. Another generator uses a single board computer FEZ Panda III and an Arduino board for power inverters. While the FPGA Spartan 3 is also used to generate PWM signals that can vary the duty cycle. In this paper, the PWM signal generator is made using the AVR ATmega8535 microcontroller where the frequency parameters and the output signal duty cycle can be adjusted via the keypad. The signal is tested using a measuring instrument for its accuracy. The ATmega AVR microcontroller family has a timer / counter with one of its operating modes, namely fast PWM. In order to change the frequency and duty cycle as desired, the ICR register is used to store the TOP value and the OCR register for the MAX value. The OCR value determine the duty cycle and the ICR value specify the frequency. The results are the higher the PWM frequency, the greater the value of the measured and desired frequency difference, this is because the large frequency makes ICR register value becomes small even though the frequency divider at minimum value. The difference between measurements and calculations on the Duty Cycle gives the result under 1%. This difference also occurs due to the rounding of the ICR and OCR values, but at a frequency of 20 kHz and a 25% Duty Cycle where the ICR value is 599 and OCR is 116 resulting in the minimum difference in frequency and Duty Cycle. From the experiments that have been carried out, the design of the PWM generator based on the AVR ATmega microcontroller has been successfully realized&#x0D;

A Sensorless Current Balance Control Method for Interleaved Boost Converters Based on Output Voltage Ripple

In this article, a sensorless current balance control method for a multiple-phase interleaved boost converter is proposed. Balanced current can help an interleaved boost converter prevent imbalanced heat distribution and inductor saturation as well as improving the output voltage performance and overall system efficiency. This article analyzes the relationship equations between the periodic output voltage ripple and the phase current balance status. In the proposed method, the current sensor is eliminated, and only one voltage sensor on the output capacitor side is needed to monitor the output voltage information. The proposed sensorless current control method estimates the phase current distribution status according to the periodic output voltage peak ripple value and adjusts the phase current distribution status by changing the gate drive signal duty cycle of each phase MOSFET. To validate the proposed method, a PSIM simulation model and a two-phase interleaved boost converter test bench are set up, and the experiment waveforms verify the effectiveness of the proposed method.