SiGe-base Bipolar Transistors Research Articles

Polysilicon-emitter sige-base bipolar transistors-what happens when ge gets into the emitter?

An analytical model is developed for evaluating the effect of emitter depth variation on base and collector currents in a polysilicon-emitter SiGe-base bipolar transistor. It is shown that the base current is relatively insensitive to the Ge distribution in the single-crystalline emitter region, consistent with reported experimental results. On the other hand, the collector current and Early voltage are functions of the Ge distribution, Ge-free cap thickness, and final emitter depth. In particular, the current gain and Early voltage could have a strong dependence on emitter depth when there is a residual Ge-free layer left in the final quasi-neutral base. However, if the emitter-base junction is located in a constant-Ge region, then large current gains can be achieved that are relatively insensitive to emitter-depth variation, consistent with reported results. The inverse relationship between current gain and Early voltage is noted and contrasted with that of a wide-gap-emitter HBT.

Process design for SiGe-HBTs prepared using cold-wall UHV/CVD

We have studied the influence of Si/SiGe/Si profile on electrical characteristics of a self-aligned SiGe-base heterojunction bipolar transistor (HBT) with a poly-crystalline silicon (polysilicon) emitter. Particular attention has been given to a collector-base undoped SiGe intermediate layer. This undoped layer acts as a spacer for boron out-diffusion of the p +-type SiGe to the n −-type Si collector, during heat treatment after the SiGe base formation. The SiGe-base was selectively grown by a cold-wall ultra-high vacuum/chemical-vapor-deposition (UHV/CVD) technique. Using both low temperature oxide (LTO) as a passivation film, and in-situ phosphorus-doped emitter polysilicon for suppressing of boron out-diffusion, a 15-nm-thick undoped layer was an insufficient boron out-diffusion spacer. This was confirmed by measuring the cut-off frequency, f T, characteristics. With a 30-nm-thick spacer layer, the f T of the SiGe base bipolar transistor increased from 38 to 63 GHz.

A 60-GHz f/sub T/ super self-aligned selectively grown SiGe-base (SSSB) bipolar transistor with trench isolation fabricated on SOI substrate and its application to 20-Gb/s optical transmitter ICs

A 60-GHz cutoff frequency (f/sub T/) super self-aligned selectively grown SiGe-base (SSSB) bipolar technology is developed. It is applied to 20-Gb/s optical fiber transmitter ICs. Self-aligned bipolar transistors mutually isolated by using a BPSG-filled trench were fabricated on a bond-and-etchback silicon-on-insulator (SOI) substrate to reduce the collector-substrate capacitance C/sub CS/. The SiGe base was prepared by selective epitaxial growth (SEG) technology. A 0.4-/spl mu/m wide emitter was used to reduce the junction capacitances. The maximum cutoff frequency f/sub T/ and the maximum frequency of oscillation f/sub max/ were 60 and 51 GHz, respectively. By using this technology, Si-ICs for an optical transmitter system were made, such as a selector (a multiplexer without input and output retiming D-type flip-flops (D-F/Fs)), a multiplier, and a D-F/F. An internal high-speed clock buffer circuit achieves stable operation under a single clock input condition in the selector and the multiplier ICs. Their stable operation was confirmed up to 20 Gb/s. The selector IC for data multiplexing operates at over 30 Gb/s.

Ultra-low-power and high-speed SiGe base bipolar transistors for wireless telecommunication systems

Ultra-low-power and high-speed SiGe base bipolar transistors that can be used in RF sections of multi-GHz telecommunication systems have been developed. The SiGe base and a poly-Si/SiGe base-contact were formed by selective growth in a self-aligned manner. The transistors have a very small base-collector capacitance (below 1 fF for an emitter area of 0.2/spl times/0.7 /spl mu/m) and exhibit a high maximum oscillation frequency (30-70 GHz) at low current (5-100 /spl mu/A). The power-delay product of an ECL ring oscillator is only 5.1 fJ/gate for a 250-mV voltage swing. The maximum toggle frequency of a one-eighth static divider is 4.7 GHz at a switching current of 68 /spl mu/A/FF.

Low-frequency noise characteristics of UHV/CVD epitaxial Si- and SiGe-base bipolar transistors

We report the first measurements of low-frequency noise in high-performance, UHV/CVD epitaxial Si- and SiGe-base bipolar transistors. The magnitude of the noise power spectral density at fixed frequency for both Si and SiGe devices is comparable for similar bias, geometry, and doping conditions, indicating that the use of strained SiGe alloys does not degrade transistor noise performance. The best recorded values of noise corner frequency were 480 Hz and 373 Hz for the Si and SiGe transistors, respectively, for multi-stripe devices with an emitter area of 0.5/spl times/10.0/spl times/3 /spl mu/m/sup 2/. A functional dependence of the noise power spectral density on base current for both device types of I/sub B//sup 1.90/ was observed, and noise measurements as a function of device geometry suggest that the contributing noise sources are uniformly distributed across the emitter of the transistors, not at the emitter periphery.

On the optimization of SiGe-base bipolar transistors

Advanced epitaxial growth of strained SiGe into a Si substrate enhances the freedom for designing high speed bipolar transistors. Devices can be designed by altering the Ge percentage, a procedure known as bandgap engineering. An optimization study on n-p-n SiGe-base bipolar transistors has been performed using computer simulations focusing on the effect of the Ge profile on the electrical characteristics. In this study it is shown that the base Gummel number is of major importance on the maximum cutoff frequency and the Ge-grading itself, which induces a quasielectric field, is of minor importance. Because of the outdiffusion of the boron dopant in the base and the relatively thin critical layer thickness of approximately 600 /spl Aring/, it appears that a box-like Ge profile with the leading edge approximately in the middle of the base is optimal. The predicted maximum cutoff frequency is 45 GHz, a sheet resistance of 8.5 k/spl Omega///spl square/ and current gain of 80. The optimized device was fabricated and measurements were performed showing good agreement with the simulations.

Sub-20 ps ECL circuits with high-performance super self-aligned selectively grown SiGe base (SSSB) bipolar transistors

This paper describes a high maximum frequency of oscillation f/sub max/ self-aligned SiGe-base bipolar transistor technology, based on a self-aligned selective epitaxial growth (SEG) technology including graded Ge profile in an intrinsic base and link-base engineering using a borosilicate glass (BSG) sidewall structure. The transistor is a new self-aligned transistor, which we call a Super Self-aligned Selectively grown SiGe Base (SSSB) bipolar transistor. The 1st step of the annealing (800/spl deg/C, 10 min) was performed for the diffusion of boron from the BSG film, before the deposition of an emitter polysilicon film. The 2nd step of the annealing (950/spl deg/C, 10 sec) of emitter drive-in was carried out, which enabled us to obtain sufficient current gain using in-situ phosphorus doped polysilicon as an emitter electrode. Sheet resistance for a link-region more than one order lower than that of the epitaxial intrinsic base was obtained after heat treatment. Base profile (boron and Ge) design, and the 2-step annealing technique have realized cut-off frequency f/sub T/ of 51 GHz and f/sub max/ of 50 GHz. ECL circuits of 19-psec gate delay have been achieved.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Double-diffused graded SiGe-base bipolar transistors

Self-aligned SiGe/Si bipolar transistors have been fabricated using a single-polysilicon, double-diffused process with the base in a graded SiGe layer to improve base transit time. To remain compatible with homojunction bipolar technology, undoped SiGe base and Si emitter layers were deposited by selective epitaxy at temperatures of 700-750/spl deg/C in a commercial epitaxial reactor. Maximum cutoff frequencies of 40 and 50 GHz were observed for devices with collector-emitter breakdown voltages (BV/sub CEO/) of 4.2 and 3.0 V, respectively. Preliminary results indicate that the addition of Ge to the base of these transistors did not degrade the long-term device reliability.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Si-analog IC's for 20 Gb/s optical receiver

Two Si-Analog IC's, a preamplifier IC and a decision IC, for a 20 Gb/s optical receiver have been developed using SiGe-base bipolar transistors having a 60 GHz maximum cutoff frequency. The preamplifier employing a dual feedback loop increases the -3 dB bandwidth up to 19 GHz. A decision IC, composed of a gain controllable amplifier with a bias stabilization circuit and D-F/F, operated at up to 20 Gb/s with a 200-mVp-p input sensitivity.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

High-low polysilicon-emitter SiGe-base bipolar transistors

Self-aligned heterojunction bipolar transistors with a high-low emitter profile consisting of a heavily doped polysilicon contact on top of a thin epitaxial emitter cap have been fabricated. The low doping in the single-crystal emitter cap allows a very high dopant concentration in the base with low emitter-base reverse leakage and low emitter-base capacitance. The thin emitter cap is contacted by heavily doped polysilicon to reduce the emitter resistance, the base current, and the emitter charge storage. A trapezoidal germanium profile in the base ensures a small base transit time and adequate current gain despite high base doping. The performance potential of this structure was simulated and demonstrated experimentally in transistors with near-ideal characteristics, very small reverse emitter-base leakage current, and 52-GHz peak f/sub max/, and in unloaded ECL and NTL ring oscillators with 24- and 19-ps gate delays, respectively. >

On the profile design and optimization of epitaxial Si- and SiGe-base bipolar technology for 77 K applications. I. Transistor DC design considerations

The DC design considerations associated with optimizing epitaxial Si- and SiGe-base bipolar transistors for the 77-K environment are examined in detail. Transistors and circuits were fabricated using four different vertical profiles, three with a graded-bandgap SiGe base, and one with a Si base for comparison. All four epitaxial-base profiles yield transistors with DC properties suitable for high-speed logic applications in the 77-K environment. The differences between the low-temperature DC characteristics of Si and SiGe transistors are highlighted both theoretically and experimentally. A performance tradeoff associated with the use of an intrinsic spacer layer to reduce parasitic leakage at low temperatures and the consequent base resistance degradation due to enhanced carrier freeze-out is identified. Evidence that a collector-base heterojunction barrier effect severely degrades the current drive and transconductance of SiGe-base transistors operating at low temperatures is provided. >

SiGe-base bipolar transistors for cryogenic BiCMOS applications

We demonstrate that the cryogenic (e.g., 77K=LNT) properties of SiGe-base heterojunction bipolar transistors and circuits are sufficiently advanced to warrant a serious consideration of the merits of cryogenic BiCMOS technologies for future LNT computer applications. In this paper we review the features of epitaxial SiGe-base bipolar technologies which make them particularly Suitable for LNT operation, examine the DC and dynamic properties of SiGe-base transistors operating at low temperatures, highlight the profile design constraints unique to the LNT environment, and discuss future research directions and opportunities.

73-GHz self-aligned SiGe-base bipolar transistors with phosphorus-doped polysilicon emitters

The authors report a thermal-cycle emitter process using phosphorus for the fabrication of self-aligned SiGe-base heterojunction bipolar transistors. The low thermal cycle results in extremely, narrow basewidths and preservation of lightly doped spacers in both the emitter-base and base-collector junctions for improved breakdown. Transistors with 35-nm basewidths were obtained with low emitter-base reverse leakage and a peak cutoff frequency of 73 GHz for an intrinsic base sheet resistance of 16 k Omega / Square Operator . Minimum NTL (nonthreshold logic) and ECL (emitter-coupled logic) gate delays of 28 and 34 ps, respectively were obtained with these devices. >

Sub-30-ps ECL circuit operation at liquid-nitrogen temperature using self-aligned epitaxial SiGe-base bipolar transistors

The authors report the operation of emitter coupled logic (ECL) circuits at liquid-nitrogen temperature using self-aligned epitaxial SiGe-base bipolar transistors. A minimum ECL gate delay of 28.1 ps at 84 K was measured; this is essentially unchanged from the room-temperature value of 28.8 ps at 310 K. This delay number was achieved under full logic-swing (500-mV) conditions and represents an improvement of greater than a factor of 2 over the best reported value for 84 K operation. Lower-power ECL circuits have switching speeds as fast as 51 ps at 2.2 mW (112-fJ power-delay product) at 84 K. These results suggest that silicon-based bipolar technology is suitable for very-high-speed applications in cryogenic computer systems. >