Si3N4 Layer Research Articles

Enhanced InAs phase formation in the In+- and As+-implanted SiO2 films covered with Si3N4 layers

The Raman spectroscopy and room-temperature photoluminescence were used to study the properties of the In+ and As+ ion-implanted SiO2 films as a function of annealing temperature Ta at 700–1100 °C. No features of the InAs phase were obtained in the Raman spectra of the native SiO2 films irrespective of Ta. In the ion-implanted SiO2 films encapsulated with Si3N4, three Raman peaks at 202 cm−1, 256 cm−1 and 232 cm−1 corresponding to transverse and longitudinal optical phonons in black As and to longitudinal optical phonons in InAs, respectively, were detected. The SiO2 encapsulation effect on the enhanced InAs phase formation is discussed. A photoluminescence of around 556 nm was observed from the encapsulated ion-implanted SiO2 films and reached its intensity maximum after the annealing at 1000 °C.

Spatially Resolved Photo-Response of a Carbon Nanotube/Si Photodetector

Photodetectors based on vertical multi-walled carbon nanotube (MWCNT) film-Si heterojunctions are realized by growing MWCNTs on n-type Si substrates with a top surface covered by Si3N4 layers. Spatially resolved photocurrent measurements reveal that higher photo detection is achieved in regions with thinner MWCNT film, where nearly 100% external quantum efficiency is achieved. Hence, we propose a simple method based on the use of scotch tape with which to tune the thickness and density of as-grown MWCNT film and enhance device photo-response.

Thermal-Cycling-Induced Si3N4 Damage in Semiconductor Devices Assembled Utilizing a Lead-on-Chip Package

This article shows how fractures in the Si3N4 layer, which comprises the top layer of semiconductor devices encapsulated utilizing a lead-on-chip (LOC) packaging technique, are influenced by changes in the lead-frame materials and thermal-cycling test conditions. Using thermal-cycling tests, it was found that fractures in the Si 3 N 4 layer are the most sensitive to changes in the lead-frame materials at the early stage of thermal-cycling, between -65sup>oC and 150sup>oC. Through SEM examinations and stress simulations, this work shows that adopting a copper lead-frame with a CTE-value similar to that of a package body effectively prevents filler-driven Si3N4 damage, providing semiconductor devices with better reliability margins during thermal-cycling.

High-quality factor mid-infrared absorber based on all-dielectric metasurfaces.

The absorption spectrum of metasurface absorbers can be manipulated by changing structures. However, narrowband performance absorbers with high quality factors (Q-factor) are hard to achieve, mainly for the ohmic loss of metal resonators. Here, we propose an all-dielectric metasurface absorber with narrow absorption linewidth in the mid-infrared range. Magnetic quadrupole resonance is excited in the stacked Ge-Si3N4 nanoarrays with an absorption of 89.6% and a Q-factor of 6120 at 6.612 µm. The separate lossless Ge resonator and lossy Si3N4 layer realize high electromagnetic field gain and absorption, respectively. And the proposed method successfully reduced the intrinsic loss of the absorber, which reduced the absorption beyond the resonant wavelength and improved the absorption efficiency of Si3N4 in the low loss range. Furthermore, the absorption intensity and wavelength can be modulated by adjusting the geometric parameters of the structure. We believe this research has good application prospects in mid-infrared lasers, thermal emitters, gas feature sensing, and spectral detection.

Broadband and CMOS-compatible polarization splitter and rotator built on a silicon nitride-on-silicon multilayer platform.

A broadband and CMOS-compatible polarization beam splitter and rotator (PSR) built on the silicon nitride-on-silicon multilayer platform is presented. The PSR is realized by cascading a polarization beam splitter and a polarization rotator, which are both subtly constructed with an asymmetrical directional coupler waveguide structure. The advantage of this device is that the function of PSR can be directly realized in the SiN layer, providing a promising solution to the polarization diversity schemes in SiN photonic circuits. The chip is expected to have high power handling capability as the light is input from the SiN waveguide. The use of silicon dioxide as the upper cladding of the device ensures its compatibility with the metal back-end-of-line process. By optimizing the structure parameters, a polarization conversion loss lower than 1dB and cross talk larger than 27.6dB can be obtained for TM-TE mode conversion over a wavelength range of 1450 to 1600nm. For TE mode, the insertion loss is lower than 0.26dB and cross talk is larger than 25.3dB over the same wavelength range. The proposed device has good potential in diversifying the functionalities of the multilayer photonic chip with high integration density.

The amazing world of self-organized Ge quantum dots for Si photonics on SiN platforms

Beginning with our exciting discovery of germanium (Ge) spherical quantum-dot (QD) formation via the peculiar and symbiotic interactions of Si, Ge, and O interstitials, we have embarked on a journey of vigorous exploration, creating unique configurations of self-organized Ge-QDs/Si-containing layers. Our aim is to generate advanced Ge-QD photonic devices, while using standard, mainstream Si processing techniques. This paper summarizes our portfolio of innovative Ge-QD configurations. With emphasis on both controllability and repeatability, we have fabricated size-tunable, spherical Ge-QDs that are placed at predetermined spatial locations within Si-containing layers (SiO2, Si3N4, and Si) using a coordinated combination of lithographic patterning and self-assembled growth. We have successfully exploited the multi-dimensional, parameter spaces of process conditions in combination with layout designs to achieve exquisite control available through the thermal oxidation of lithographically patterned, poly-Si1 − xGex structures in close proximity with Si3N4/Si layers. In so doing, we have gained insight into the growth kinetics and formation mechanisms of self-organized, Ge spherical QDs embedded within SiO2, Si3N4, and Si layers, respectively. Our Ge-QD configurations have opened up a myriad of process/integration possibilities including top-to-bottom evanescent-wave coupling structures for SiN-waveguided Ge-QD photodetectors and Ge-QD light emitters for Si photonics within Si3N4 integrated photonics platforms for on-chip interconnects and sensing.

On the influence of Ni(Pt)Si thin film formation on agglomeration threshold temperature and its impact on 3D imaging technology integration

Ni(10 at.% Pt) monosilicide is used as contact in microelectronics but suffers from degradation at relatively low temperatures due to agglomeration. Recent results obtained on 28 nm-FDSOI (Fully Depleted Silicon On Isolator) microelectronics devices have demonstrated severe yield loss after an anneal at 550 °C/2 h linked to Ni(Pt)Si film dewetting. Such agglomeration thermal budget is 100 °C lower than the ones measured on blanket wafers with in-situ or ex-situ four-point probe measurements. In this context, the aim of this paper is to investigate the effect Ni(Pt)Si formation process on the Ni(Pt)Si agglomeration using different approaches as (i) the classical one in which one anneal is applied to form silicide and leads also to agglomeration, (ii) the silicide formation through the standard SALICIDE process, “Self-Aligned Silicide”, and a subsequent anneal to induce agglomeration, and (iii) the standard SALICIDE process for silicide formation followed by an encapsulation of the top silicide surface by a SiN layer as applied in devices, and submitted finally to the agglomeration anneal. Our work demonstrated that the film thermal stability is influenced by the sequencing of the Selective Etch (SE) in the formation process and whether it is formed by a single or a double anneal. For single anneal, the thermal budget needed to agglomerate Ni(Pt)Si film is higher i.e., agglomeration occurs at around 700 °C/30 s in single anneal as compared to double anneal at around 550 °C/30 s. Another conclusion of this work is that four-point probe measurements are not sensitive enough to well estimate the real starting point of agglomeration phenomenon which is detrimental for devices (holes formation at the triple junctions). Some additional characterizations such as tilted Scanning Electron Microscopy (tilted SEM) are deeply needed for an accurate determination of agglomeration thermal budget. This study allows clarifying the main parameters leading to agglomeration: the film thickness and the grain size appear to be the more important ones.

Device simulation of perovskite/silicon tandem solar cell with antireflective coating

Optical design, photon management, and energy conversion efficiency are investigated through numerical simulation of perovskite/silicon tandem solar cell using the single-diode model. A strong near-infrared reflectance of roughly 60% is present in the perovskite-based top cell. ZnO and Si3N4 anti-reflection coating layers are placed on the surface of the perovskite layer and silicon sub-cell of the tandem solar cell respectively for photon management and minimizing the near-infrared reflectance loss. ZnO will act as an electron transport layer as well as an anti-reflection coating layer. The ZnO layer will minimize the near-infrared reflectance loss by the top cell in the device structure and allow the maximum transmittance of near-infrared photon energy to the silicon sub-cell. Intermediate anti-reflection Si3N4 layer assists in the maximum localization of the transmitted near-infrared photon energy in the silicon sub-cell. The efficiency of over 32% is achieved by optimizing the parameters of different materials such as perovskite, silicon, and anti-reflection coating layer in the tandem solar cell. The innovative idea of using electron transport material ZnO as an anti-reflection coating layer in the perovskite-based top cell can minimize the reflection loss by nearly 20%. The combination of ZnO and Si3N4 anti-reflection coating layers improved the conversion efficiency of the tandem cell by 1%. This result paves the way to realize highly efficient tandem solar cells through photon management.

Innovative selective solar absorber for high vacuum flat panel

Selective Solar Absorbers (SSAs) are the critical element of high-vacuum flat plate collectors, as these are subject to elevated operating temperatures and thus experience high radiation losses. Here we design and optimize an SSA based on a multilayer design made of HfCx, Si3N4, and SiO2 layers. The structure of the proposed SSA has been optimized to maximize the solar-to-thermal energy conversion efficiency in high vacuum solar thermal panels working at 200 °C, reaching thermal emissivity values much lower than absorbers currently available on the market (<0.02 Vs >0.07) and obtaining unprecedented performances.

Tunable structural phases and electronic properties of group V MSi2N4 (M = V, Nb, Ta) nanosheets via surface hydrogenation: a first-principles study

Surface hydrogenation is revealed to be an effective way to achieve phase engineering in group V MSi2N4 materials, which undergo structural transitions in both central MN2 and surface SiN layers.

Design and Optimization of High-Responsivity High-Speed Ge/Si Avalanche Photodiode in the C+L Band.

We present the design of Ge/Si avalanche photodetectors with SiN stressor-induced Ge strain for the C+L band light detection. By optimizing the placement position and thickness of the SiN layer with compressive stress, a uniform strain distribution with a maximum magnitude of 0.59% was achieved in Ge. The surface-illuminated APDs have been studied in respect of the photo-dark current, responsivity, gain, and 3-dB bandwidth. After introducing SiN stressor, the APD exhibits high primary responsivity of 0.80 A/W at 1.55 μm, 0.72 A/W at 1.625 μm, and 3-dB bandwidth of 17.5 GHz. The increased tensile strain in Ge can significantly improve the responsivity and broaden the response band of the device. This work provides a constructive approach to realizing high-responsivity high-speed Ge/Si APD working in the C+L band.

Two-dimensional superconducting MoSi2N4(MoN)4n homologous compounds.

The number and stacking order of layers are two important degrees of freedom that can modulate the properties of 2D van der Waals (vdW) materials. However, the layers' structures are essentially limited to the known layered 3D vdW materials. Recently, a new 2D vdW material, MoSi2N4, without known 3D counterparts, was synthesized by passivating the surface dangling bonds of non-layered 2D molybdenum nitride with elemental silicon, whose monolayer can be viewed as a monolayer MoN (-N-Mo-N-) sandwiched between two Si-N layers. This unique sandwich structure endows the MoSi2N4 monolayer with many fascinating properties and intriguing applications, and the surface-passivating growth method creates the possibility of tuning the layer's structure of 2D vdW materials. Here we synthesized a series of MoSi2N4(MoN)4n structures confined in the matrix of multilayer MoSi2N4. These super-thick monolayers are the homologous compounds of MoSi2N4, which can be viewed as multilayer MoN (Mo4n+1N4n+2) sandwiched between two Si-N layers. First-principles calculations show that MoSi2N4(MoN)4 monolayers have much higher Young's modulus than MoN, which is attributed to the strong Si-N bonds on the surface. Importantly, different from the semiconducting nature of the MoSi2N4 monolayer, the MoSi2N4(MoN)4 monolayer is identified as a superconductor with a transition temperature of 9.02K. The discovery of MoSi2N4(MoN)4n structures not only expands the family of 2D materials but also brings a new degree of freedom to tailor the structure of 2D vdW materials, which may lead to unexpected novel properties and applications.

Impact of Protective Layer Structures on High‐Temperature Annealing of GaN

GaN decomposition at high‐temperature annealing after ion implantation is a huge hurdle to the further maturation of GaN technology. To solve this issue, this work studies the impact of different protective layer structures on high‐temperature annealing of GaN under 1200–1250 °C, including single‐layer structures and double‐layer structures. Single‐layer structures are the SiN layer grown by low‐pressure chemical vapor deposition (LPCVD) and the SiON layer by plasma‐enhanced chemical vapor deposition (PECVD). Double‐layer structures include oxides (Al2O3, SiO2, HfO2) deposited by atomic layer deposition (ALD) on top of low‐stress SiN by LPCVD or SiON grown by PECVD and epitaxial AlN by metal–organic chemical vapor deposition (MOCVD) with sputtered AlN. It is found that either SiO2 with the low‐stress SiN or AlN double capping layers was capable of completely preventing GaN decomposition in the temperature range of 1200–1250 °C. Finally, the protective layer with 20 nm Al2O3 and 300 nm low‐stress LP‐SiN is utilized in the annealing of Si‐implanted GaN high electron mobility transistor (HEMT) structure for activation. The excellent electrical performance are characterized. This work can provide valuable information on the ion implantation and high‐temperature annealing of GaN, which is critical for the further development of gold‐free ohmic contact with GaN devices.

Improvement of SiO2 surface morphology during the selective Si3N4 etching in the multi-layered 3D NAND Si3N4/SiO2 stack structures by the generation of CO2 gas through the control of redox reaction

Selective removal of silicon nitride (Si3N4) layers from multilayer Si3N4/silicon dioxide (SiO2) stack structures is essential for fabricating 3-dimensional (3D) NAND flash memory devices. Although phosphoric acid (H3PO4) selectively etches Si3N4 layers to a certain degree, the tip thicknesses of the SiO2 layers increase owing to oxide regrowth, and the SiO2-layered trenches become clogged. In particular, the oxide regrowth phenomenon worsens as it progresses to the bottom of the structure. In this study, carbon dioxide (CO2) gas was generated by adding acidic reducing agents to H3PO4 to suppress the oxide regrowth in the stack structure. CO2 gas creates a turbulent flow in the slits and SiO2/Si3N4/SiO2 trenches, promoting the diffusion of Si3N4 etch byproducts from the cul-de-sac of the SiO2/Si3N4/SiO2 trench structures to the outside of the stack structure. The addition of oxalic acid to H3PO4 generated a high concentration of CO2 gas and selectively etched Si3N4 layers without oxide regrowth in the stack structure. Finally, the selective etching of Si3N4 layers, which is faster and more uniform than that in pure 85 wt.% H3PO4, was performed without oxide regrowth in the entire 128-layer Si3N4/SiO2 multi-stack structure.

Solution‐Processed Gas Barriers with Glass‐Like Ultrahigh Barrier Performance

AbstractSeveral electronic devices, such as perovskite solar cells (PSCs) and organic light‐emitting diodes (OLEDs), are very vulnerable to water vapor. Therefore, they require an ultrahigh‐performance gas barrier (water vapor transmission rate [WVTR]: less than 10−5 g m−2 d−1). The barrier performance of solution‐processed gas barriers is inferior to that of vacuum‐processed gas barriers; however, they possess advantages such as high resource efficiency, high throughput, low fabrication cost, and printability, which facilitate sustainable manufacturing and digital fabrication. The simultaneous realization of solution processability and ultrahigh barrier performance is highly desired. Herein, this work reports solution‐processed gas barriers developed using perhydropolysilazane (PHPS)‐derived SiN (PDSN) layers densified by vacuum ultraviolet (VUV) irradiation in a nitrogen atmosphere at room temperature. The appropriate PDSN thickness and irradiated VUV dose result in an excellent WVTR of 4.8 × 10−5 g m−2 d−1 (a barrier performance close to that of glass), which makes it among the best‐performing water vapor barriers recorded to date. The barrier performance is achieved with a thickness of only 990 nm and a short VUV irradiation time (2.4 min per PHPS layer). An ultrahigh‐performance barrier with rapid processability such as this expands the possibility of solution‐processed barrier technology.

Integrating Diamond for Cooling Electronics

III-Nitrides promise to offer high-frequency power amplifiers at higher power densities. This is attractive for realizing device platforms for 5G and beyond. It also enables integrating Si-based electronics to complement functionalities. However, to obtain the full potential of III-Nitrides one must operate these transistors at higher power densities, for which thermal management is crucial.Due to the continuous need for higher performance in various applications ranging from DC to W-band frequencies, semiconductor devices are pushed to higher power densities. This results in a higher junction temperature owing to the Joule heating in the channel resulting in device performance degradation and premature failure. Using devices based on wide-bandgap (WBG) semiconductors such as Gallium Nitride (GaN) and Gallium Oxide (GaOx) with a larger critical electric field and high-temperature tolerance, one could increase the power density. However, in order to increase the output power to the levels that is promised by these wide bandgap materials, junction temperature reduction through device-level cooling is critical. We are actively researching thermal management at device, circuit and packaging level using synthetic polycrystalline (PC) diamond. PC-diamond, at an appropriate grain size offers a TC is higher than any competing thermal vias with metals without interfering the electrical performance. Over the past 5 years we have demonstrated the potential of integrating diamond with GaN and recently achieving a record low diamond/GaN thermal boundary resistance (TBR) along with a relatively high diamond thermal conductivity (TC). This remarkable thermal performance was be achieved by maintaining the electrical performance, as demonstrated by the unharmed channel charge and mobility results.There are two key requirements for thermal management using heat spreading from the channel: first, a low thermal boundary resistance (TBR) between the hot spot in the channel and the heat spreader is required (in this study between GaN channel and diamond). Second, a low thermal resistance path to the heat-sink is crucial from the diamond layer which is directly proportional to diamond’s thermal conductivity (TC). In collaboration with Univ of Bristol, we have reported a TBR of ~3 m2K/GW, to date, known to be the lowest reported TBR for GaN HEMT technology. Diamond-GaN TBR depends strongly on the interface smoothness and the thickness of interfacial Si3N4 layer. A thinner Si3N4 resulted in lower TBR and allowed superior phonon coupling from the channel to the spreader. We have also measured a remarkably high TC for a 2 μm-thick diamond layer yielding over 650 W/m.K. The diamond grains are near isotropic in shape that allows excellent in-plane and cross-plane thermal conductivity. Achieving high TC within a thin film of diamond, grown heterogeneously, underscores the importance of our technique, since it reduces the residual stress when integrating with different materials that involves many thin layers like GaN/AlGaN HEMT epi-layers.β-Ga2O3 is an emerging ultra-wide bandgap material showing promises for both power and RF devices. However, the material’s low thermal conductivity poses to be a challenge for efficient power delivery (at any frequencies). PC diamond was successfully grown on (‾¯201)β-Ga2O3 using proper nucleation technique and thermal characterizations were conducted. A thermal conductivity (diamond + nucleation) and thermal boundary resistance at the diamond/β-Ga2O3 interface of 110 ± 33 W/mK and 30.2 ± 1.8 m2K/GW, respectively were measured.Our current results demonstrates a very promising roadmap for wide bandgap semiconductors via diamond integration.

Scanning-resonance optical sensing based on a laterally graded plasmonic layer—optical properties of Ag[formula omitted]Al[formula omitted] in the range of [formula omitted] to 1

Plasmonic AgAl/Si3N4 sensor layer structure was deposited on a fused silica glass slide by dual DC magnetron sputtering. The composition of the AgxAl1−x layer was laterally graded in which x linearly changes from x=0 to x=1 over a distance of 20 mm. The Si3N4 layer serves both as a resonator and a protective layer providing homogeneous chemical properties on top of the inhomogeneous AgAl layer. The structure was illuminated through a hemi-cylinder for variable-angle measurements in the Kretschmann–Raether configuration using a focused spot that enabled the change of x by moving it along the gradient of the composition. Optical properties of AgxAl1−x in the whole composition range were obtained. The positions of resonant peaks were shifted by changing the angle of incidence and the lateral position of the spot in a flow-cell configuration. The optical sensing performance of the bilayer system was investigated for x=0 and x=1. Based on the capabilities of ellipsometry limit of detection in refractive index unit values of ≈4−8⋅10−6 can be achieved in the resonant positions utilizing both p- and s-polarizations. Due to the flexible tunability of the resonant wavelengths by moving a focused spot, the above sensitivity is available in-situ, over the spectral range of 265-1504 nm.

Sandwich structure SiCf/Si3N4–SiOC–Si3N4 composites for high-temperature oxidation resistance and microwave absorption

SiC fiber reinforced ceramic matrix composites (SiCf-CMCs) have been widely used as structural-functional materials at high temperatures. However, their mechanical and electromagnetic wave (EMW) absorbing properties will deteriorate due to high-temperature oxidation. Therefore, unique sandwich structure, consisting of inner Si3N4 impedance layer, middle porous SiOC loss layer and dense oxidation-resistant Si3N4 layer, was proposed to enhance multiple material properties in oxidation environment. Herein, SiCf/Si3N4–SiOC–Si3N4 composites was fabricated by alternating chemical vapor infiltration (CVI) and polymer infiltration pyrolysis (PIP) methods. For these composites, SiC fiber is used as both reinforcing phase and electromagnetic (EM) absorber. CVI Si3N4 matrix was distributed in inner and outer layer of the SiCf/Si3N4–SiOC–Si3N4 composites. While inner Si3N4 layer between BN interphase and SiOC matrix forms nano-heterogeneous interphase to consume EM energy and enhance mechanical properties of composites, outer dense and oxidation-resistant CVI Si3N4 coating serves to maintain properties. PIP SiOC matrix exhibits porous structure that can effectively deflect cracks and achieve multiple scattering of EMW. SiCf/Si3N4–SiOC–Si3N4 composites with sandwich structure demonstrated excellent EMW absorbing properties and mechanical performance in high-temperature oxidation environments.

Evaluation of AlN and TiN Coatings Effectiveness for Controlling the Stress State of Surface Layer of Si3N4–TiC Ceramics under Combined Loading

Evaluation of AlN and TiN Coatings Effectiveness for Controlling the Stress State of Surface Layer of Si3N4–TiC Ceramics under Combined Loading

A Study of Optimizing Lamb Wave Acoustic Mass Sensors' Performance through Adjustment of the Transduction Electrode Metallization Ratio.

This paper presents the design and simulation of a mass sensitive Lamb wave microsensor with CMOS technology provided by SilTerra. In this work, the effects of the metalization ratio variation on the transmission gain, total harmonic distortion (THD), and two different resonant modes (around 66 MHz and 86 MHz) are shown. It has been found that the metalization ratio can be adjusted in order to obtain a compromise between transmission gain and sensitivity, depending on the design criteria. By adding a SiN layer on top of the device, a five-fold improvement in transmission gain is reached. It was also shown that the transmission of the input differential IDT configuration is 20% more efficient than a single terminal. With this combination, the mass sensitivity is about 114 [cm/gr].