Thermal-Cycling-Induced Si3N4 Damage in Semiconductor Devices Assembled Utilizing a Lead-on-Chip Package

Abstract

This article shows how fractures in the Si3N4 layer, which comprises the top layer of semiconductor devices encapsulated utilizing a lead-on-chip (LOC) packaging technique, are influenced by changes in the lead-frame materials and thermal-cycling test conditions. Using thermal-cycling tests, it was found that fractures in the Si 3 N 4 layer are the most sensitive to changes in the lead-frame materials at the early stage of thermal-cycling, between -65sup>oC and 150sup>oC. Through SEM examinations and stress simulations, this work shows that adopting a copper lead-frame with a CTE-value similar to that of a package body effectively prevents filler-driven Si3N4 damage, providing semiconductor devices with better reliability margins during thermal-cycling.