Si Devices Research Articles

Hydrogen-Modulated Step Graded Junction Termination Extension in GaN Vertical p-n Diodes

Junction termination extension (JTE) is a mature edge termination structure in Si and SiC power devices, but remains a technical challenge in GaN due to lack of mature selective area doping technique. In this work, GaN vertical p-n diodes with Hydrogen-Modulated Step Graded JTE (HMSG-JTE) are realized by gradually enlarging photolithography windows for hydrogen plasma treatment and controlled thermal diffusion of hydrogen in p-GaN. HMSG-JTE leads to a gradually decreasing hole distribution outwards from the main junction, which laterally spreads the electric field and mitigates the electric field peak under reverse bias. Consequently, the breakdown voltage of vertical GaN p-n diode is successfully boosted from 661 V (with hydrogen-plasma-based edge termination) to 1489 V with HMSG-JTE.

Tunable Synaptic Characteristics of a Ti/TiO2/Si Memory Device for Reservoir Computing.

In this study, we fabricate and characterize a Ti/TiO2/Si device with different dopant concentrations on a silicon surface for neuromorphic systems. We verify the device stack using transmission electron microscopy (TEM). The Ti/TiO2/p++Si device exhibits interface-type bipolar resistive switching with long-term memory. The potentiation and depression by the pulses of various amplitudes are demonstrated using gradual resistive switching. Moreover, pattern-recognition accuracy (>85%) is obtained in the neuromorphic system simulation when conductance is used as the weight in the network. Next, we investigate the short-term memory characteristics of the Ti/TiO2/p+Si device. The dynamic range is well-controlled by the pulse amplitude, and the conductance decay depends on the interval between the pulses. Finally, we build a reservoir computing system using the short-term effect of the Ti/TiO2/p+Si device, in which 4 bits (16 states) are differentiated by various pulse streams through the device that can be used for pattern recognition.

Wide Bandgap DC–DC Converter Topologies for Power Applications

Over the last decade, dc–dc power converters have attracted significant attention due to their increased use in a number of applications from aerospace to renewable energy. The interest in wide bandgap (WBG) power semiconductor devices stems from outstanding features of WBG materials, power device operation at higher temperatures, larger breakdown voltages, and the ability to sustain larger switching transients than silicon (Si) devices. As a result, recent progress and development of converter topologies, based on WBG power devices, are well-established for power conversion applications in which classical Si-based power devices show limited operation. Currently, Si carbide (SiC) and gallium nitride (GaN) are the most promising semiconductor materials that are being considered for the new generation of power devices. The use of new power semiconductor devices, such as GaN high electron mobility transistors (GaN HEMTs), leads to minimization of switching losses, allowing high switching frequencies (from kHz to MHz) for realizing compact power converters. Finally, design recommendations and future research trends are also presented.

Germanium-modified silicon as anodes in Si–Ge air batteries with enhanced properties

In this study, the effects of Ge modification of Si anodes in Si–Ge air batteries were investigated by building various atomic models of Si/Ge/GeO2 interfaces and performing density functional theory calculations. The results showed that the surface passivation could be restrained effectively by Ge modification because the adsorption energies of the GeO2 units on the Si–Ge anode increased when more Si atoms were substituted by Ge atoms. The electrostatic difference potentials, electron densities, and projected local density of states were also calculated for various Si/Ge/GeO2 interfaces to determine the differences in the properties of the Si-air battery and Si–Ge air battery. In addition, the I–V curves showed that the Si/Ge/SiO2/Si devices had higher currents than the Si/SiO2/Si device and the currents could be modulated by modification with Ge atoms. These findings provide insights into the mechanism responsible for the enhanced properties obtained by modification with Ge and they may facilitate the design of Si–Ge composite anodes for use in air batteries.

Comparison of synaptic properties considering dopant concentration and device operation polarity in Cu/SiN/SiO2/p-Si devices for neuromorphic system

In this study, we characterize Cu/SiN/SiO2/Si devices with different dopant concentrations in the silicon surface for use as synaptic devices in neuromorphic systems. We verified the device stack by transmission electron microscopy (TEM) and energy-dispersive X-ray spectroscopy (EDS). An abrupt change is observed in Cu/SiN/SiO2/p++-Si at positive SET and negative RESET values, where Cu diffusion is involved in the conducting path. On the other hand, abrupt SET and gradual RESET values are observed in Cu/SiN/SiO2/p++-Si at negative SET operation and positive RESET operation, when intrinsic resistive switching occurs in SiN. The Cu/SiN/SiO2/p+-Si device shows gradual bipolar resistive switching with negative SET and positive RESET. Lower current switching and more gradual switching is possible in the Cu/SiN/SiO2/p+-Si device due to the series resistance. Potentiation and depression of the Cu/SiN/SiO2/p+-Si device can be more accurately controlled by pulses than is the case for the Cu/SiN/SiO2/p++-Si device. Moreover, we reveal that the Cu/SiN/SiO2/p+-Si device is more suitable for use as a synaptic device than the Cu/SiN/SiO2/p++-Si device according to the MNIST pattern recognition test.

Impact of vacuum on the resistive switching in HfO2-based conductive-bridge RAM with highly-doped silicon bottom electrode

Moisture can modulate the resistive switching dynamics in oxide-based electrochemical metallization devices. Unconventional testing environments such as vacuum, could possibly shift the device characteristics, requiring therefore a careful investigation. This work investigates the write/erase behavior of Cu/HfO2(~80-nm-thick)/p+-Si devices in ambient atmosphere and vacuum, under similar electrical bias applied to the top Cu electrode. In vacuum (~5.3 × 10−3 Pa), a parasitic negative SET (N-SET) readily arises during the “erase” operation, unlike in ambient air. The electrical studies and physicochemical analyses of electrically-biased and pristine devices reveal that the “erase” process is sensitive to the environment. Vacuum facilitates the electric-field-controlled generation of an oxygen-vacancy-based path that likely induces a parasitic N-SET at the negative voltage. This path is aided by the presence of partially-ruptured copper filaments at the HfO2/p+-Si interface. Thevacuum effects leading to the N-SET are eliminated by introducing a passivating gas environment (zero-air or nitrogen), or device encapsulation.

(Invited) Defect Engineering for Monolithic Integration of III-V Semiconductors on Silicon Substrates

Implementation of high-mobility channel materials enables to increase the device performance due to the higher carrier mobility compared to silicon devices. III-V based materials such as GaAs and ternary systems (e.g. InxGa1-xAs alloys) are achieving high performing n-channel transistors. The strong progress in hetero-epitaxy using nano ridge engineering [1] leading to monolithic heterogeneous integration of III-V materials on silicon substrates resulted in state-of-the-art FinFETs, gate-all-around (GAA) and horizontal or vertical stacked nanowires (NW) on 300 mm Si wafers [2,3]. Very promising results have also been reported for GaN on Si triggering their use for high power and RF applications [4].One of the main challenges remains a good defect control in order not to degrade the electrical performance of devices and circuits [5]. The nucleation of extended defects is directly related to the hetero-epitaxial growth of layers with a lattice mismatch and their concentration depends on the composition of the layers such as e.g. the In content in InxGa1-xAs and the Al content in AlxGa1-xN. The defects have a direct impact on the generation and recombination lifetime and the leakage current [5], while also the low frequency noise (LFN) performance is influenced [6]. The identification of the defects (energy level ET, capture cross section and concentration) can be determined using Deep Level Transient Spectroscopy (DLTS) and low frequency noise spectroscopy by measuring LFN as a function of temperature.The goal of this work is to review the knowledge about defect engineering and to analyze the electrical activity of extended defects in III-V semiconductors on silicon substrates. Different case studies will be used to illustrate both the defect identification and the electrical activity of the defects. The impact of the used processing schemes to fabricate the devices is also discussed. It will e.g. be shown that defects in GaN/AlGaN MOSHEMTs increase the low frequency noise due to generation-recombination centers in the GaN depletion layer [7]. These traps can lead to a distortion of the current-voltage characteristics of short channel devices. DLTS studies are a powerful tool to identify traps and to investigate their impact on the leakage current of III-V on Si devices. Double correlation DLTS investigations on GaAs/InGaP/GaAs diodes pointed out that traps associated with sidewall interface states can dominate the peripheral diode leakage current. The focus of the presentation will be on the current understanding of defect engineering associated with the monolithic integration of III-V materials on Si and a discussion of recent results concerning the electrical activity of the defects and the defect modeling.[1] M. Baryshnikova et al., Crystals, 10, 330 (2020).[2] X. Sun et al., Digest VLSI Technology, T3-4 (2017).[3] A.P. Milemin et al., Microelectron. Eng., 192, 14 (2019).[4] L. Li et al., IEEE Electron Device Lett., 41, 689 (2020).[5] C. Claeys et al., ECS Solid State Electronics, 9, 03301 (2020).[6] C. Claeys et al., J. Phys. Cond. Ser., 1190, 012001 (2019).[7] K. Takakura et al., IEEE Trans. Electron Dev., 67, 3062 (2020).

Low Temperature Deposition of Highly Cyclable Porous Prussian Blue Cathode for Lithium-Ion Microbattery.

Small dimension Li-ion microbatteries are of great interest for embedded microsystems and on-chip electronics. However, the deposition of fully crystallized cathode thin film generally requires high temperature synthesis or annealing, incompatible with microfabrication processes of integrated Si devices. In this work, a low temperature deposition process of a porous Prussian blue-based cathode on Si wafers is reported. The active material is electrodeposited under aqueous conditions using a pulsed deposition protocol on a porous dendritic metallic current collector that ensures good electronic conductivity of the composite. The high voltage cathodes exhibit a huge areal capacity of ≈650 μAh cm-2 and are able to withstand more than 2000 cycles at 0.25mA cm-2 rate. The application of these electrode composites with porous Sn based alloying anodes is also demonstrated for the first time in full cell configuration, with high areal energy of 3.1 J cm-2 and more than 95% reversible capacity. This outstanding performance can be attributed to uniform deposition of Prussian blue materials on conductive matrix, which maintains electronic conductivity while simultaneously providing mechanical integrity to the electrode. This finding opens new horizons in the monolithic integration of energy storage components compatible with the semiconductor industry for self-powered microsystems.

AlCl3-Dosed Si(100)-2 × 1: Adsorbates, Chlorinated Al Chains, and Incorporated Al

The adsorption of AlCl$_{3}$ on Si(100) and the effect of annealing the AlCl$_{3}$-dosed substrate was studied to reveal key surface processes for the development of atomic-precision acceptor-doping techniques. This investigation was performed via scanning tunneling microscopy (STM), X-ray photoelectron spectroscopy (XPS), and density functional theory (DFT) calculations. At room temperature, AlCl$_{3}$ readily adsorbed to the Si substrate dimers and dissociated to form a variety of species. Annealing of the AlCl$_{3}$-dosed substrate at temperatures below 450 $^{\circ}$C produced unique chlorinated aluminum chains (CACs) elongated along the Si(100) dimer row direction. An atomic model for the chains is proposed with supporting DFT calculations. Al was incorporated into the Si substrate upon annealing at 450 $^{\circ}$C and above, and Cl desorption was observed for temperatures beyond 450 $^{\circ}$C. Al-incorporated samples were encapsulated in Si and characterized by secondary ion mass spectrometry (SIMS) depth profiling to quantify the Al atom concentration, which was found to be in excess of 10$^{20}$ cm$^{-3}$ across a $\sim$2.7 nm thick $\delta$-doped region. The Al concentration achieved here and the processing parameters utilized promote AlCl$_{3}$ as a viable gaseous precursor for novel acceptor-doped Si materials and devices for quantum computing.

Outstanding Technical Features of Traction System in N700S Shinkansen New Generation Standardized High Speed Train

This paper overviews a traction system for Tokaido Shinkansen trains and presents a novel silicon carbide (SiC)-applied traction system of the new generation Shinkansen train, “N700S”, which began commercial service in the summer of 2020. To achieve compactness and weight reduction, N700S's traction system aimed to take advantage of the merits of SiC devices, which have a lower power loss, higher frequency, and a higher current than Si devices, not only in the conversion system but also in the entire traction system. This weight reduction and compactness allowed for flexibility in the design of underfloor equipment of the car body and enabled the realization of a lithium-ion battery self-traction system that could operate catenary-free at low speeds in the event of a power outage. It also contributed toward achieving flexibility by the easy redesign of different configurations of trains such as 8-car or 12-car sets rather than the standard 16-car trains used for the Tokaido Shinkansen, the concept of which is referred to as the “Standardized Shinkansen train”. The continuous introduction of energy-saving Shinkansen trains including N700S has also led to a decrease in Tokaido Shinkansen's energy consumption. This is the first application of an SiC device and a lithium-ion battery to a high-speed train's traction system in the world.

Comparison Investigations on Unclamped-Inductive-Switching Behaviors of Power GaN Switching Devices

This article makes the comparisons on the behaviors of three types of commercial GaN power switching devices, including Schottky gate p-GaN high electron mobility transistor (HEMT), ohmic gate p-GaN HEMT with hybrid drain, and Cascode GaN device, under single-pulse and repetitive unclamp-inductive-switching (UIS) conditions by experiments and simulations. It shows that all the three types of GaN devices withstand the UIS stress by storing energy in parasitic capacitances rather than by avalanche process, which is a different phenomenon compared with traditional Si/SiC devices. However, the failure phenomena under single-pulse UIS condition are different. For the two types of p-GaN gate devices, the inverse-piezoelectric induced punch-through makes the burnout under drain contact region. For the Cascode device, the breakdown of the inner Si device dominates the failure. As for the behaviors under repetitive UIS stresses, p-GaN gate device with hybrid drain performs the best, Schottky gate p-GaN HEMT shows the most serious electrical performance degradations due to the trapping effects and carrier storage phenomena, Cascode GaN device exhibits stable threshold voltage and acceptable degradations of <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</small> -state resistance due to the existence of inner Si device.

(Invited) Defect Engineering for Monolithic Integration of III-V Semiconductors on Silicon Substrates

Optimization of heterogeneous epitaxial techniques such as aspect ratio trapping and nano-ridge engineering strongly triggered the commercial breakthrough of III-V on Si devices for a variety of applications in fields like optoelectronics, lighting, telecommunication, power devices, RF circuitry etc. To achieve high device performance defect engineering is crucial to avoid increased leakage current, lifetime degradation and/or increased low frequency noise. The aim of this review is to discuss the present understanding of defects in III-V materials and devices and their impact on the device performance. This is illustrated by analyzing three important types of devices, including InxGa1-xAs p+n diodes, GaN/AlGaN/Si transistors (MOSFETs, HEMTs and MOSHEMTs) and GaAs/InGaP Heterojunction Bipolar Transistors (HBTs). It will be pointed out that by an appropriate defect control the further development of the monolithic III-V integration on Si will not be hampered and is facing a bright future.

Study of the Thermomechanical Strain Induced by Current Pulses in SiC-Based Power MOSFET

Power SiC MOSFETs are going to substitute Si devices by to their significantly better performances that make them much suitable in power switching applications such as electric/hybrid vehicles. The increasingly use of these devices in critical mission profiles requires an ever-higher reliability, whereas the increase of the dissipated power during high-speed working cycling due to short current pulses leads to unavoidable thermal and mechanical stress. Here, we propose a direct method to evaluate the mechanical stress due to current pulses. This method highlights that high Power SiC-based MOSFET undergoes to almost two different thermomechanical processes with completely different time scale. The results allow a link between the thermo-mechanical stress and the device failure conditions, with special focus on the current pulses effects on metal surface, as this is a main power devices weakness.

Quantifying the performance of a hybrid pixel detector with GaAs:Cr sensor for transmission electron microscopy

Hybrid pixel detectors (HPDs) have been shown to be highly effective for diffraction-based and time-resolved studies in transmission electron microscopy, but their performance is limited by the fact that high-energy electrons scatter over long distances in their thick Si sensors. An advantage of HPDs compared to monolithic active pixel sensors is that their sensors do not need to be fabricated from Si. We have compared the performance of the Medipix3 HPD with a Si sensor and a GaAs:Cr sensor using primary electrons in the energy range of 60–300 keV. We describe the measurement and calculation of the detectors’ modulation transfer function (MTF) and detective quantum efficiency (DQE), which show that the performance of the GaAs:Cr device is markedly superior to that of the Si device for high-energy electrons.

TCAD Investigation of Differently Doped DLC Passivation for Large-Area High-Power Diodes

An electroactive passivation for high-voltage diodes with bevel termination has been investigated based on diamondlike carbon (DLC) films. Variations of the DLC properties, i.e., conductivity and geometry, have been investigated by experiments and numerical simulations to the purpose of gaining an insight on their influence on the diode leakage current and breakdown voltage. The role played by the DLC/Si interface has been investigated by characterizing metal–DLC–Si devices. Both boron and nitrogen doping have been investigated, and a TCAD setup has been provided accounting for the main transport features of the DLC material with different doping configurations. A significant polarization effect has been observed in the DLC material, which improves the DLC performance as a passivation material. High-voltage diodes have been characterized and simulated with different DLC layers on top of the bevel termination in order to identify the role played by conductivity and polarization on the blocking state. The correlation of leakage current and voltage breakdown with the DLC doping and thickness is provided and explained by the TCAD simulation results.

High-Overtone Thin Film Ferroelectric AlScN-on-Silicon Composite Resonators

This letter presents the first demonstration of thin-film ferroelectric Aluminum Scandium Nitride (AlScN)-on-silicon composite resonators, targeting high-overtone resonance modes in the sub-6GHz band with a high figure of merit (FoM). The resonators are based on sputtered ferroelectric AlScN films with Sc/(Al+Sc) ratio of ~30% and thickness of $\sim 1 {\mu }\text{m}$ . Two types of AlScN thickness-extensional (TE) resonators are co-fabricated on the same SOI platform; with and without a $3.55~\mu \text{m}$ -thick Si layer in the resonant stack. We show that although the passive Si device layer underneath the thin piezo-stack results in degradation of the electromechanical coupling coefficient $({k}_{t}^{2})$ , it boosts the quality factor $({Q})$ , provides structural robustness, and improves the overall ${Q} \times {k}_{t}^{2}$ FoM. The resonant frequency spectrum of the high-overtone TE modes of AlScN-on-Si composite resonator is analyzed and the dependency of ${k}_{t}^{2}$ on the Si device layer properties is studied. A high ${k}_{t}^{2}$ value of 11.7% at the 3rd-order TE resonant frequency of 2.4 GHz is reported, yielding a high ${k}_{t}^{2}\times {Q}_{\textit {max}}$ FoM of 84. The reported FoM shows $2\,\, {\times }$ improvement compared to the co-fabricated AlScN-only FBARs.

A Comparison of Analog Performance, Linearity, and Distortion Characteristics Between Symmetric InGaAs and Asymmetric InGaAs/InP MOSFETs

In this article, we report an investigation of analog performance, linearity, and harmonic distortion (HD) characteristics for both symmetric and asymmetric InGaAs n-channel MOSFETs at elevated temperatures. Analog performance parameters such as transconductance and voltage gain are found to be better for the asymmetric InGaAs MOSFETs than their symmetric counterparts. The linearity metrics such as g <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">m2</sub> , g <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">m3</sub> , voltage intercept points 2 (VIP2), VIP3, IIP3, and third-order intermodulation distortion (IMD3) have been analyzed. Asymmetric devices are found to perform better in terms of linearity. Moreover, distortion is also found to be less for the asymmetric devices than the symmetric ones. A comparison of the linearity and distortion characteristics of InGaAs devices with a similarly sized Si device reveals that, although the Si device performs better in terms of linearity, particularly at elevated temperatures, InGaAs devices have an edge in terms of distortion over the Si device.

A Highly Scalable, Modular Test Bench Architecture for Large-Scale DC Power Cycling of SiC MOSFETs: Towards Data Enabled Reliability

Silicon carbide (SiC) power MOSFETs have superior conduction, switching and thermal properties compared to silicon (Si) MOSFETs and IGBTs [1]. However, unlike Si devices, whose reliability is well understood from decades of research and field data, SiC device technology is relatively nascent and has only recently started witnessing wide scale deployment. This reliability challenge can possibly be addressed through two complementary solutions as shown in Figure 1: 1) developing a large accelerated aging dataset of SiC devices under various conditions to understand their long term reliability and guide future device development, 2) using on-board, in-system prognostics and device health monitoring techniques to predict imminent device failures well ahead of time, thus ensuring reliable system operation [2]. In both cases, the large-scale reliability testing of SiC MOSFETs is needed. Generally, remaining useful lifetime (RUL) estimation methods for power devices use an empirical model obtained from fitting accelerated aging data [3]-[7], [9], [10]. Consequently, the accuracy of RUL models is directly related to the size and variety of available accelerated aging dataset. Moreover, large datasets are crucial in enabling machine learning (ML) and artificial intelligence (AI) based reliability models.

2D-3D integration of hexagonal boron nitride and a high-\u03ba dielectric for ultrafast graphene-based electro-absorption modulators

Electro-absorption (EA) waveguide-coupled modulators are essential building blocks for on-chip optical communications. Compared to state-of-the-art silicon (Si) devices, graphene-based EA modulators promise smaller footprints, larger temperature stability, cost-effective integration and high speeds. However, combining high speed and large modulation efficiencies in a single graphene-based device has remained elusive so far. In this work, we overcome this fundamental trade-off by demonstrating the 2D-3D dielectric integration in a high-quality encapsulated graphene device. We integrated hafnium oxide (HfO2) and two-dimensional hexagonal boron nitride (hBN) within the insulating section of a double-layer (DL) graphene EA modulator. This combination of materials allows for a high-quality modulator device with high performances: a ~39 GHz bandwidth (BW) with a three-fold increase in modulation efficiency compared to previously reported high-speed modulators. This 2D-3D dielectric integration paves the way to a plethora of electronic and opto-electronic devices with enhanced performance and stability, while expanding the freedom for new device designs.

Direct writing of silicon nanostructures using liquid-phase electron beam induced deposition of hydrosilanes

Solid Si (wafer) and gaseous Si (silane) are generally used as starting materials for fabricating Si devices. In this study, a liquid precursor (liquid-phase hydrosilane) for semiconducting Si, called liquid Si (liq-Si), was synthesized to establish a liquid pathway for fabricating Si. Although the liquid-to-solid Si conversion can be induced by heating at 400 °C, conversion without heating was realized herein by electron-beam (EB) irradiation. This study is the first to irradiate liq-Si with EB. Size-controllable Si nanodots, with diameters of the order of 100 nm, were directly deposited at any point by liquid-phase electron-beam-induced deposition (LP-EBID) with a beam diameter of 50 nm. This approach yielded less-contaminated deposits at the detection limit of energy-dispersive x-ray spectroscopy, as opposed to typical EBID, wherein carbon impurities up to 90% are found. The processing resolution of LP-EBID is potentially 1 nm or less. Therefore, this non-heating deposition technique realizes the direct writing of Si nanostructures and would be a powerful tool for Si nanofabrication.