Si-based Semiconductor Devices Research Articles

Effects of phosphorous and antimony doping on thin Ge layers grown on Si

Suppression of threading dislocations (TDs) in thin germanium (Ge) layers grown on silicon (Si) substrates has been critical for realizing high-performance Si-based optoelectronic and electronic devices. An advanced growth strategy is desired to minimize the TD density within a thin Ge buffer layer in Ge-on-Si systems. In this work, we investigate the impact of P dopants in 500-nm thin Ge layers, with doping concentrations from 1 to 50 × 1018 cm−3. The introduction of P dopants has efficiently promoted TD reduction, whose potential mechanism has been explored by comparing it to the well-established Sb-doped Ge-on-Si system. P and Sb dopants reveal different defect-suppression mechanisms in Ge-on-Si samples, inspiring a novel co-doping technique by exploiting the advantages of both dopants. The surface TDD of the Ge buffer has been further reduced by the co-doping technique to the order of 107 cm−2 with a thin Ge layer (of only 500 nm), which could provide a high-quality platform for high-performance Si-based semiconductor devices.

Electronic and optical properties of Sc2C(OH)2 with phenylsulfonic groups: A first-principles study

Polystyrene sulfonic acid (PSS) polymer thin film can be applied to the surface passivation of Si-based semiconductor devices because of its low cost and the ability to be fabricated without the need for extreme temperatures or high vacuum. Here, the phenylsulfonic groups (–pSO3H, a typical part of PSS) were grafted onto the Sc2C(OH)2 the surface to form Sc2C(OH)2–pSO3H. The electronic structure and optical properties were investigated by first-principles calculations. The results show that Sc2C(OH)2–pSO3H is a direct bandgap semiconductor material with a bandgap of 0.99 eV, which is higher than that of Sc2C(OH)2. The bandgap of Sc2C(OH)2–pSO3H has a small change by replacing cation H of –pSO3H with Li, Na and K, indicating that the Sc2C(OH)2–pSO3H maintains its semiconductor properties. The reason is that the conduction band minimum (CBM) state and the valence band maximum (VBM) are mainly determined by the contribution of C 2p states and Sc 3d states of the main body Sc2C(OH)2. Versus the conventional photovoltaic material Si, the absorption coefficient of Sc2C(OH)2–pSO3H is very high, thus resulting in a maximum photoelectric conversion efficiency of up to 31 %. These results suggest promising 2D visible light absorption materials that are photovoltaics in solar cells.

Photo-Enhanced Inverse Metal-Assisted Chemical Etching of α-Ga2O3 grown on Al2O3

Si-based semiconductor devices are not suitable for stable operations in the aerospace environments. Among the ultra-wide bandgap semiconductor materials, gallium oxide (Ga2O3) is attracting attention as the next-generation material for high-power semiconductor devices in extreme condition beyond Si, owing to its large band gap of 4.5-5.3 eV, high breakdown electric fields of 7-10 MV/cm, excellent chemical and thermal stability and radiation hardness. Alpha gallium oxide (α-Ga2O3) has the largest bandgap (4.8-5.3 eV) and the highest breakdown electric fields (~10 MV/cm) among the five Ga2O3 polymorphs, which facilitates the application of α-Ga2O3 as a high power device. However, the research on etching technology for α-Ga2O3 is rare. Etching technology is a crucial step of device fabrication. Chemical etching is free from plasma-induced damage which leads to superior device performance compared with dry etching, and high throughput with low cost is beneficial to industrial implementations. Chemical stability of Ga2O3 hinders the effective reaction with most chemical etchants. However, the photo-enhanced inverse metal assisted chemical (I-MAC) etching, where a noble metal with a high work function is utilized as a catalyst under UV irradiation, has emerged as a candidate for the chemical etching of Ga2O3. Deep-UV irradiation generates electron-hole pairs (EHPs) in the uncovered region of Ga2O3, and the metal electrode withdraws carriers from the photo-generated EHPs. The holes that are accumulated in the uncovered region of Ga2O3 react with gallium ions which produce gallium fluoride (GaF3) in a reaction with Hydrofluoric acid (HF). The etching process continues as the oxidant re-oxidizes the metal. The etch rate can be controlled by various parameter, including concentration and temperature of the etchant. In this work, for the I-MAC etch of α-Ga2O3 on sapphire substrate grown by halide vapor phase epitaxy, Pt was deposited on α-Ga2O3. Etch rate and surface roughness were characterized by atomic force microscopy after each step of the I-MAC etch. The I-MAC etch using HF and potassium persulfate (K2S2O8) solution with 185-nm UV irradiation was performed at constant durations under different etchant temperature conditions. The etch rates obtained at each temperature condition were fitted with the Arrhenius plot to estimate the activation energy of 0.898 eV. The etch depth showed a linear increase with time and the etch rate exhibits a direct dependency on the temperature of the etchant, indicating that the I-MAC etching of α-Ga2O3 is an activation-controlled reaction. As the I-MAC etching proceeded, surface roughness of α-Ga2O3 showed a tendency to increase. The rate at which the surface roughness increased increased with raising the etchant temperature. In the case of Pt there was no significant difference in the surface roughness after etching. After the completion of the I-MAC etch, the remaining Pt can be removed using aqua regia. The I-MAC etch process of α-Ga2O3 can allow us to fabricate α-Ga2O3 without plasma-damage. Figure 1

Band alignment of TiO2/SiC and TiO2/Si heterojunction interface grown by atomic layer deposition

Silicon carbide (SiC) is regarded as a promising semiconductor owing to its wide band gap and high thermal conductivity. Meanwhile, it possesses issues such as interface properties, which may affect the performance of SiC substrate power devices (e.g. MOSFET), especially when compared with similarly structured silicon appliances. Given that the development of SiC semiconductor devices has a number of commonalities with conventional silicon-based semiconductors, titanium dioxide (TiO2), a material that has a great track record in Si-based semiconductor devices, has been chosen for investigation in this work. Although TiO2 is not capable of being a gate dielectric alone on the SiC substrate because of its relatively narrow band gap, it can be adopted into composite or multilayer gate dielectrics to reach satisfying characteristics. As such, the interfacial state and heterostructure between TiO2 and SiC remain worthy being researched. In the present study, the properties of atomic layer deposited (ALD) TiO2 films on silicon substrates were compared with those on 4H-SiC substrates via x-ray photoelectron spectroscopy, atomic force microscopy, and x-ray reflectometry. It is shown that the interface state between ALD TiO2 film and both types of substrates as-deposited have similar chemical conditions, whereby TiO2 layer barely react with substrates, containing great amount of oxygen vacancies. According to band alignment calculations, heterostructure of both samples are type-II heterojunctions with negatively shifted conduction band. Although the large bandwidth of 4H-SiC hinders the use of TiO2 as a gate dielectric in power devices, this structure has the potential for other semiconductor products.

Interface and bulk engineering of VO2 thin film deposited on Si for multi-level metal-to-insulator transitions

Vanadium dioxide (VO2), as a representative metal-to-insulator transition (MIT) material, is of utmost interest for various device applications such as memory devices, memristors, Mott transistors, and temperature sensors due to its MIT temperature near room temperature. However, it is difficult to fabricate a stable VO2 film, especially on Si wafer since its interfacial mixing alters the physicochemical properties of VO2. This study demonstrates that stable VO2 thin films with reduced interfacial mixing can be fabricated using a sequential process consisting of a vanadium metal e-beam evaporator and thermal post oxidation.The device fabricated with VO2 shows distinctive multi-level MIT characteristics with bulk current–voltage curves with reproducible on/off switching behavior, which matches well with nanoscale transition probed by the conductive atomic force microscopy analysis. Our findings pave the way to produce highly stable VO2 thin films as well as applications for integrated Si-based semiconductor devices such as memory devices, ultrafast switches, and others.

Active Junction Temperature Control for SiC MOSFETs Based on a Resistor-Less Gate Driver

Junction temperature fluctuation is the main cause of failure of power devices including silicon carbide (SiC) MOSFETs, and active junction temperature control is an effective way to improve their reliability. Most existing methods of active junction temperature control rarely consider the system efficiency and the complexity of hardware implementation, which limits their applications. This article proposes an active junction temperature control method for SiC MOSFETs based on a resistor-less gate driver, which consists of two auxiliary MOSFETs with adjustable gate–source voltages. Hence, the switching loss of the SiC MOSFET can be continuously and accurately adjusted to mitigate the efficiency suffer with the junction temperature control. The power loss model of SiC MOSFETs with the proposed gate driver was established. The design principle of the junction temperature controller is introduced. The experimental results show that the junction temperature fluctuation is reduced by 24.1%, and that the lifetime of the SiC MOSFET is prolonged by 3.92 times via using the proposed junction temperature control method. The energy loss of the prototypical inverter is decreased by 4.15% over the whole testing period. The experiment was conducted with SiC MOSFETs, and the proposed method is also suitable for other Si-based semiconductor devices.

Comparison of picosecond electron dynamics in isolated and clustered Si quantum dots deposited on a semiconductor surface

Semiconductor quantum dots (QDs) have been widely used in various optoelectronic devices. Extensive studies have been devoted to the application of Si QDs with the aim of realizing various optoelectronic functions based on the modified energy band structure in QDs compared with bulk crystals. Therefore, it is necessary to be able to directly probe the carrier dynamics in single Si QDs of nanoscale dimensions deposited on a SiO2/Si surface, where the environment is compatible with Si-based semiconductor devices. This letter reports the observation and comparison of the ultrafast electron dynamics just after the photoexcitation of isolated and clustered Si QDs on a SiO2/Si surface using time-resolved photoemission electron microscopy with spatial and temporal resolutions of 50 nm and 100 fs, respectively. The detailed structure of QDs was confirmed directly by scanning electron microscopy observations. The results obtained in the present study show that the carrier lifetime in isolated QDs is shorter than that in clustered QDs. This is consistent with the electron–hole interaction in nanospace, significantly modifying the carrier recombination rates.

Establishment of a novel functional group passivation system for the surface engineering of c-Si solar cells

Surface engineering of crystalline silicon (c-Si) is the core of Si-based semiconductor devices. The current commercially available c-Si solar cells achieve this by making use of a conventional thin dielectric film passivation system (TDFPS), including SiO2, Al2O3, SiNx:H and hydrogenated amorphous silicon (a-Si:H) in industry. However, the TDFPS requires high-vacuum and/or high-temperature conditions, which hinders efforts to further reduce the costs of device fabrication. A revolutionized approach to circumvent these issues involves the replacement of TDFPS with new material system which can also achieve high-quality passivation on c-Si surface. Here, we successfully establish and implement a functional group passivation system (FGPS) using a series of functional materials with a sulfonic functional group -SO3H, such as ‘poly(2-acrylamido-2-methylpropanesulfonic acid)’ (PAMPS) and ‘polystyrene-block-poly(ethylene-ran-butylene)-block-polystyrene, sulfonated, cross-linkable’ (PS-b-PERB), which can achieve a highly effective passivation on Si surface, resulting in power conversion efficiencies up to 20% when they are applied in the front surface engineering of interdigitated back contact (IBC) solar cells. Furthermore, the FGPS materials inherently allow passivation layer fabrication in low-temperature and high-vacuum-free conditions. This work provides novel low-cost material strategies without compromise of performance for c-Si surface engineering in the future Si-based photovoltaics.

Plasma characteristics and properties of Cu films prepared by high power pulsed magnetron sputtering

Copper (Cu) has been proposed as a well-known material for metallization in Si-based semiconductor devices because of its low resistivity, high chemical stability, and excellent electromigration resistance. In order to improve the properties of Cu films further, the films were deposited on a Si (100) substrate using high power pulsed magnetron sputtering (HPPMS) by varying the substrate bias voltage. The Cu plasma characteristics and film properties were investigated as well. It was found that both electrons and ions contribute to the overall species current on the substrate. Electrons dominate the species current at the beginning and positive ions contribute the majority at end of the pulse. As the substrate bias increases from −17.3 V (floating voltage) to −100 V, the electron current gradually decreases, while the ion current increases, eventually stabilizing at −50 V. However, the changes in the deposition rate, tensile stress and texture of Cu films deposited from floating voltage to −50 V showed little difference as opposed to those Cu films deposited in the range from −50 V to −100 V. Compared to the Cu films deposited at −50 V, the films deposited at −100 V exhibited a higher tensile stress and a superior (111) texture. The electrical resistivity of the Cu films reached a minimum value of 1.79 μΩ cm at −100 V.

Electrodeposition of Ordered Copper Germanide from an Alkaline Tartrate-Complexed Electrolyte

Copper is widely used for contacts and interconnects in Si-based semiconductor devices. Copper, however, is regarded as the fastest interstitial-diffusing element in Si with a diffusivity of ~ 10-8 cm2/s at room temperature [[i]]. The diffusion of copper into surrounding materials would significantly degrade their properties and the performance of semiconductor devices. Therefore, a barrier metal layer is necessarily required to completely surround all copper interconnects, which complicates the device fabrication. Recently, copper germanide (ɛ-Cu3Ge) has received much attention as a promising candidate material for contacts and interconnects due to its remarkably low resistivity of 5.5 μΩ cm at 300K [[ii]], which is only approximately three times the resistivity of pure Cu films. In particular, Cu3Ge is stable up to a temperature of 450°C, thus impeding the diffusion of Cu from the film into the surrounding materials, making it an excellent candidate for interconnects in Si-based devices [[iii]]. In the present work, the electrochemical deposition of ɛ-Cu3Ge thin films from an alkaline tartrate-complexed electrolyte [[iv]] was thoroughly investigated. Primarily, the partial (single element Cu and Ge deposition) and net (Cu-Ge alloy co-deposition) processes occurring in such electrolyte were studied by means of cyclic voltammetry (CV), electrochemical quartz crystal microbalance (EQCM) and electrochemical impedance spectroscopy (EIS) techniques. Subsequently, the electrodeposition of Cu-Ge thin films was realized in potentiostatic mode at various selected potentials. The morphology, composition and microstructure of as-deposited Cu-Ge thin films were characterized, and the results reveal that the Ge content in the deposits increases with decreasing applied potential in a sigmoidal manner, leading to a gradual disorder-order phase transformation of Cu-Ge alloy from a disordered face-centered-cubic solid solution (α-phase) to an ordered orthorhombic Cu3Ge intermetallic compound (ɛ-phase). Combining the morphological, compositional and structural characteristics of electrodeposited Cu-Ge thin films with the processes kinetics studies, a possible mechanism of Cu-Ge induced codeposition was postulated. The dependence of resistivity of as-deposited Cu-Ge thin films on Ge content was also examined, which exhibits a non-monotonic behavior. A minimum value was found around stoichiometric Cu3Ge, which corresponds to the completion of the disorder-order transformation. The ɛ-Cu3Ge thin film displays a resistivity of 7.5 μΩ cm-1 (~50 nm) and 25 μΩ cm-1 (~1 μm), increasing with the deposition duration, which is believed due to the progressive incorporation of O into the films. In order to overcome this limitation, the effect of the bath temperature and pH on Cu-Ge electrodeposition kinetics, composition and microstructure were investigated, and optimal electrodeposition conditions for ɛ-Cu3Ge were identified. [i] M.O. Aboelfotoh, H.M. Tawancy, L. Krusin-Elbaum, Correlation of electrical-resistivity anomalies and crystal structure in copper-germanium thin-film alloys, Appl. Phys. Lett. 63, 1622 (1993). [ii] L. Krunsin-Elbaum, M.O. Aboelfotoh, Unusually low resistivity of copper germanide thin films formed at low temperatures, Appl. Phys. Lett. 58, 1341 (1991). [iii] M.A. Borek, S. Oktyabrsky, M.O. Aboelfotoh, J. Narayan, Low resistivity copper germanide on (100) Si for contacts and interconnections, Appl. Phys. Lett. 69, 3560 (1996). [iv] A. Joi, R. Akolkar, U. Landau, Pulse plating of copper germanide, Appl. Phys. Lett. 102, 134107 (2013).

(Invited) The Stability of High Voltage AlGaN/GaN HEMTs

Si-based semiconductor devices have long dominated the power device market and are approaching their performance limit because of the inherent material limitations. On the other hand, wide bandgap semiconductors such as GaN and SiC promise significant performance boost coming from the superior material properties, such as a high critical electric field (3x106 V/cm), a high peak electron saturation velocity (2.5x107 cm/s), and a wide bandgap (3.4 eV) in GaN case [1]. In the III-nitride material system, a popular structure for power switching devices is the AlGaN/GaN HEMTs, because of the excellent two-dimensional electric gas (2DEG) in the hetrojunction interface, which greatly reduces the on-resistance of the device. Combined with the enhanced breakdown voltage from a large critical electric field, the figure of merit BV2/Ron,sp of reported AlGaN HEMTs have far surpassed the Si limit. The enhancement mode (E-mode) operation is strongly preferred for low power consumption, driver circuit simplicity, and fail-safe requirements for power electronic circuits. For AlGaN/GaN HEMTs realized utilizing epitaxial layers on the gallium face, the piezoelectric polarization, together with the spontaneous polarization, greatly enhances the 2DEG concentration, which is beneficial for reducing the on-resistance. But this makes it difficult to achieve the E-mode operation since the 2DEG under the gate region must vanish at zero gate bias. Several approaches have been proposed, including the recess gate structure, fluoride plasma treatment, the nano-ribbon channel, the p-GaN gate, and others. Although AlGaN/GaN HEMTs have demonstrated excellent performance with E-mode operation, their stability and reliability remains to be inspected before they can be commercialized. With different approaches to realize E-mode, the gate related stability problems arise differently depending on the gate design. In this work, we systematically investigate the stability of different device structures under different gate bias conditions, including Schottky gate HEMTs, p-GaN gate HEMTs, recessed MIS gate HEMTs, and multi-layer fluorinated MIS gate HEMTs. Figure 1 shows the pulsed Id-Vg characteristics of a recessed MIS gate AlGaN/GaN HEMT on a silicon substrate. The gate insulator is a 30 nm ALD deposited Al2O3 layer. The gate length is 3 μm and the gate-to-drain spacing is 20 μm for >1kV breakdown voltage. The pulse width is 5 ms and the period is 100 ms for all cases. The base voltage was varied from -15 V to 15 V and the drain current was measured during the pulse duration as shown in the inset. The threshold voltage Vth, which is defined when Id is 1mA/mm, increases with the base voltage, implying that negative charges are trapped in the gate insulator during the base duration. Figure 2 summarizes the extracted Vth for different gate structures using pulsed Id-Vg measurement with different gate base voltages. The Schottky gate HEMT shows a very stable Vth and Id-Vd characteristics against different pulse conditions but the negative Vth makes them less favorable. The p-GaN gate HEMT exhibits a positive but unstable Vth. The Vth shift can be as large as 1 V. Further annealing at 550oC in an O2ambient improves the p-type contact and hence the stability of the Vth but still limits the maximum gate voltage to 3 V. The decrease in Vth with increased gate base voltages implies trapping of holes in the p-GaN gate, which differs from the MIS gate device [2]. The MIS gate HEMT shows a positive threshold voltage about 6 V and a relatively large gate voltage swing. But the variation in the threshold voltage even at low gate base voltages indicates the occurrences of trapped charges in the gate insulator, which requires further examination and process improvement. More detailed discussion and measurement results will be shown. Acknowledgement This project was funded in part by financial support from Ministry of Economic Affairs 103A0002J9. Reference [1] T. P. Chow, R. Tyagi, IEEE Trans. Electron Devices 41(1994) 1481. [2] T.-F. Chang et al. to appear in IEEE Trans. Electron Devices. Figure 1

Degenerate Si as an Electrode Material for Electrochemical Biosensors

The use of degenerate (heavily doped) Si as an electrode material for electrochemical biosensors is demonstrated by a series of voltammetry and impedance studies. Cyclic voltammetry in solutions of and exhibits reversible electrochemistry without illumination, which to the best of the authors’ knowledge has not been previously reported for Si electrodes in an aqueous environment. The presence of prevents formation of the Si native oxide, while the use of a degenerate Si substrate makes its electrochemistry more like that of a metal. In addition, impedance detection of peanut protein Ara h 1 is demonstrated on a degenerate Si electrode following immobilization of the monoclonal mouse antibody to this protein. The variation in charge-transfer resistance with protein concentration is employed to estimate the dissociation constant of the surface-immobilized antibody-antigen complex as . The advantages of degenerate Si relative to n- and p-type Si include the lack of photoeffects, a simpler equivalent circuit, easier electrical connection to the working electrode, and knowledge that the applied potential applied is dropped within the electrical double layer, not within the semiconductor space-charge layer. Most important, degenerate Si electrodes are easily incorporated into Si-based semiconductor devices.

Equilibrium strain-energy analysis of coherently strained core–shell nanowires

In order to continue the performance enhancement of Si-based semiconductor devices, the number of devices on a chip as well as the performance of those devices must continue to improve. One method for improving device functionality is the incorporation of strained Si–Ge heterostructures. While such heterostructures have been the focus of much research in planar Si processing, only recently has the fabrication of such heterostructures in nanoscale semiconductors been addressed. In particular, the fabrication of a Si–Ge radial nanowire heterostructure requires a consideration of the epitaxial stability of the shell on the underlying core nanowire. This work develops a model for the strain state of a radial nanowire heterostructure, focusing on the particular example of Si–Ge. The behavior of the radial nanowire heterostructure is compared to that of a planar heterostructure, and we find that much higher strains can be achieved in the nanowire geometry.

Reverse-bias emission sheds light on the failure mechanism of degraded vertical-cavity surface-emitting lasers

The phenomenon of reverse-bias electroluminescence (EL) has been exploited extensively to elucidate the physics of failure of Si-based semiconductor devices. In this article, we study the reverse-bias emission of vertical-cavity surface-emitting lasers (VCSELs) that have been stressed under accelerated temperature, humidity, and bias. Using quantitative emission microscopy in conjunction with other electrical and optical measurements, we show that the dark line defect dislocation network responsible for VCSEL degradation can be imaged directly as reverse-bias EL and that the spectra of the reverse-bias EL provide further insight into the failure mechanism.

Cu Planarization for ULSI Processing by Electrochemical Methods: A Review

The planned introduction of porous, low-k dielectric materials into Si-based semiconductor devices will provide substantial challenges for chemical mechanical planarization. These challenges arise primarily from the mechanical fragility of such dielectrics, which may not withstand the force applied during chemical mechanical planarization. Planarization by Cu electropolishing has many advantages, including its noncontact nature, easy endpoint detection, and minimal introduction of contamination. However, pattern sensitivity may limit application of Cu electropolishing to augmenting, rather than completely replacing, chemical mechanical planarization. Electrochemical mechanical planarization appears to have less pattern dependence, but is still an evolving technology whose potential limitations are still unclear. Alternative electrochemical methods for Cu planarization, including electropolishing and electrochemical mechanical planarization are herein reviewed and discussed.

Low resistivity copper germanide on (100) Si for contacts and interconnections

We have deposited thin films of Cu3Ge on (100) Si by the sequential e-beam deposition of an amorphous Ge layer followed by a polycrystalline Cu layer. The films were then annealed in flowing N2 for 30 min over a temperature range of 150–600 °C to induce complete recrystallization of the Cu–Ge films. Films of Cu3Ge form a smooth, atomically sharp interface with (100) Si over a wide range of anneal temperatures, as determined by transmission electron microscopy, indicating the lack of any chemical reactions, i.e., compound formation, at the film/substrate interface. We have observed by secondary ion mass spectrometry, that a substantial amount of Si has diffused into the Cu–Ge in varying amounts that exhibit strong dependence on the anneal temperature. Despite the large amount of Si that has diffused into the films, the Cu3Ge maintains its low resistivity (ρ=10–15 μΩ cm) up to an anneal temperature of 600 °C, at which point the film completely loses its structural integrity, i.e., it becomes discontinuous with the formation of complex compounds. These results show that Cu3Ge represents a potential candidate material for contact and metallization for next generation Si-based semiconductor devices.