Separation By Implanted Oxygen Process Research Articles

In-depth profiling of electron trap states in silicon-on-insulator layers and local mechanical stress near the silicon-on-insulator/buried oxide interface in separation-by-implanted-oxygen wafers

In-depth profiling of electron trap states in silicon-on-insulator (SOI) layers of separation-by-implanted-oxygen (SIMOX) wafers was carried out using the drain current-gate voltage characteristics of metal-oxide-semiconductor field-effect transistors (MOSFETs) with different SOI thicknesses, and the density of electron trap states in a gate oxide (GOX) layer thermally grown on them was measured using the gate tunneling current-gate voltage characteristics of MOSFETs. It was found that in-depth profiles of electron trap states in SOI layers have a broad peak at around 25 nm from the SOI/buried oxide (BOX) interface, and that the density of electron trap states in a GOX layer grown on the 25-nm-thick SOI layer reaches a maximum there. A morphology study using Auger electron spectroscopy and Raman spectroscopic study revealed a correlation among the density of trap states in an SOI layer, roughness, and local mechanical stress near the SOI/BOX interface. This correlation is understood to imply that local mechanical stress near the SOI/BOX interface, which is induced by roughness at the interface peculiar to the SIMOX process, enhances the generation of structural defects and resultant electron trap states in the SOI layer of a SIMOX wafer.

Investigation of structure and composition of buried oxide layers formed by oxygen-ion implantation into silicon

Single-crystal ⟨ 1 1 1 ⟩ silicon samples were implanted at room temperature and at elevated temperature (325 °C) with oxygen (16O+) ions at 140 keV energy to fluence levels 1.0×1017, 2.5×1017 and 5.0×1017 cm−2 to synthesize buried layers using the SIMOX (separation by implanted oxygen) process. We have studied the process of buried oxide formation as a function of implantation temperature and fluence. The effects of fluence and implantation temperature on the structure and composition of the ion-beam-synthesized, buried silicon oxide layers were investigated by Fourier transform infrared (FTIR) spectroscopy, X-ray diffraction (XRD) studies and Rutherford backscattering spectroscopy (RBS) measurements, respectively. The FTIR spectra of the implanted samples revealed a single broad absorption band in the wavenumber range 1250–750 cm−1, indicating the formation of silicon oxide. The integrated absorption band intensity was found to increase with increasing ion fluence. The absorption peak of the elevated-temperature-implanted sample was broader than that of the room-temperature-implanted sample. The structure of the ion-beam-synthesized oxide layers showed strong dependence on the fluence and implant temperature. The XRD studies reveal the synthesis of silicon oxide (SiO2) structure at all fluences. The RBS measurements show that the thickness of the buried oxide layer increases with an increase in the oxygen fluence. In general, however, the thickness of the top silicon layer was found to decrease with an increase in the ion fluence.

Characterization of Distribution of Trap States in Silicon-on-Insulator Layers by Front-Gate Characteristics in n-Channel SOI MOSFETs

We characterized the distribution of trap states in silicon-on-insulator (SOI) layers in epitaxial layer transfer (ELTRAN) wafers and in low-dose separation by implanted oxygen (SIMOX) wafers. We measured the front- and back-gate characteristics of MOSFETs with SOI layers of different thicknesses. We used the current-Terman method to estimate the trap states at the gate oxide (GOX)/SOI interface and at the SOI/buried oxide (BOX) interface separately. As a result, we concluded that the high-density trap states in the SOI layers in SIMOX wafers cause a gate-voltage shift, which is attributed to the charged trap states only in the inversion layer. We also found that the trap states are distributed within about 30 nm from the SOI/BOX interface in the SOI layer in SIMOX wafers, which indicates that the distribution of trap states originates from the oxygen implantation that is peculiar to the SIMOX process.

FTIR and RBS study of ion-beam synthesized buried silicon oxide layers

Single crystal silicon samples were implanted at 140keV by oxygen (16O+) ion beam to fluence levels of 1.0×1017, 2.5×1017 and 5.0×1017cm−2 to synthesize buried silicon oxide insulating layers by SIMOX (separation by implanted oxygen) process at room temperature and at high temperature (325°C). The structure and composition of the ion-beam synthesized buried silicon oxide layers were investigated by Fourier transform infrared (FTIR) and Rutherford backscattering spectroscopy (RBS) techniques. The FTIR spectra of implanted samples reveal absorption in the wavenumber range 1250–750cm−1 corresponding to the stretching vibration of Si–O bonds indicating the formation of silicon oxide. The integrated absorption band intensity is found to increase with increase in the ion fluence. The absorption peak was rather board for 325°C implanted sample. The FTIR studies show that the structures of ion-beam synthesized buried oxide layers are strongly dependent on total ion fluence. The RBS measurements show that the thickness of the buried oxide layer increases with increase in the oxygen fluence. However, the thickness of the top silicon layer was found to decrease with increase in the ion fluence. The total oxygen fluence estimated from the RBS data is found to be in good agreement with the implanted oxygen fluence. The high temperature implantation leads to increase in the concentration of the oxide formation compared to room temperature implantation.

Scanning spreading resistance microscopy of defect engineered low dose SIMOX samples

Modification of SiO 2 precipitate formation by defect engineering of SIMOX (separation by implanted oxygen) process was studied using cross section scanning spreading resistance microscopy (SSRM). Firstly, open volume defects, nanocavities, have been introduced by He + ion implantation in the region, where SiO 2 precipitates were subsequently formed. Secondly, dual (simultaneous) oxygen (O +) and silicon (Si +) implantation was used to modify SiO 2 reaction kinetics too. The results show that the He-induced nanocavities enhance the SiO 2 formation presumably releasing excess strain associated with Si oxidation, while the use of a dual O +/Si + beam do not influence significantly the oxidation kinetics in the initial state of the SIMOX process in our samples. Overall, SSRM was shown to be a suitable method for observation of the early stage of buried oxide formation in Si, since it measures the local resistivity, the main functional parameter of a SIMOX structure.

Splendid isolation [silicon on insulator

This paper discusses the growing popularity of silicon on insulator (SOI) technology in the semiconductor industry over the past few years. Of the total share of SOI wafer sales, a small percentage goes to SIMOX (separation by implanted oxygen) process while a large 80% goes to the rival technology developed at Grenoble-based LETI, called Smart Cut. Smart Cut holds the promise of being able to produce high-quality SOI wafers using standard semiconductor processing equipment. Both SIMOX technology and smart cut are able to produce wafers that meet the exacting quality requirements of such companies as IBM and AMD. With the wider availability of quality wafers, SOI has began to move aggressively beyond the confines of the defense and aerospace sectors.

Characterization of SiGe Layer on Insulator by In-Plane Diffraction Method

Four types of SGOI (SiGe on Insulator) wafers were fabricated by the combination of SiGe epitaxial growth, SIMOX (Separation by Implanted Oxygen) processes and oxidation. By the cross-sectional TEM (Transmission Electron Microscopy) and EDS (Energy Dispersive Spectroscopy), it is confirmed that each wafer has smooth interface between a top layer (Si or SiGe) and a BOX (buried oxide) layer and Ge atoms in SiGe layer distribute homogeneously for SGOI_A and SGOI_B. Using high-resolution X-ray diffractometry, the crystallographic properties of SiGe layer are characterized with in-plane and out of plane diffraction methods. The lattice constants are calculated for the planes of perpendicular and parallel to wafer surface and the degree of relaxation are estimated for the SiGe layer of each wafer. The rocking curve measurements reveal that the lattice turbulence of SiGe layer is influenced by SIMOX process conditions, Ge content and the layer thickness.

Formation of SiGe on Insulator Structure and Approach to Obtain Highly Strained Si Layer for MOSFETs

The formation of a SiGe layer on insulators, which can be realized by applying the separation by implanted oxygen (SIMOX) technique to SiGe layers, is essential for fabricating strained silicon on insulator (SOI) metal oxide semiconductor field effect transistors (MOSFETs). In this study, the SIMOX process for SiGe films is examined in terms of Ge diffusion during SIMOX annealing and the annealing temperature. It is found that the SIMOX annealing at temperature above 1300°C is necessary to realize uniform buried oxides, even though the melting point of SiGe crystal decreases with the Ge content. Ge diffusion during high-temperature annealing must also be taken into account when preparing the SiGe layer for SIMOX. These facts indicate that the realization of a SiGe layer on buried oxides is difficult with the simple SIMOX process for SiGe crystal, particularly so in the case of high Ge content. In order to overcome this problem, the double layer SiGe structure on an insulator is proposed and the effectiveness of this structure on the increase of strain in Si is verified experimentally. The strain relaxation of the SiGe layer with higher Ge content, which is grown on the SiGe layer with lower Ge content, is observed with expanding of the under-layer.

Advanced SOI p-MOSFETs with strained-Si channel on SiGe-on-insulator substrate fabricated by SIMOX technology

We have newly developed an advanced SOI p-MOSFET with strained-Si channel on insulator (strained-SOI) structure fabricated by SIMOX (separation-by-implanted-oxygen) technology. The characteristics of this strained-SOI substrate and electrical properties of strained-SOI MOSFETs have been experimentally studied. Using strained-Si/relaxed-SiGe epitaxy technology and usual SIMOX process, we have successfully formed the layered structure of fully-strained-Si (20 nm)/fully-relaxed-SiGe film (290 nm) on uniform buried oxide layer (85 nm) inside SiGe layer. Good drain current characteristics have been obtained in strained-SOI MOSFETs. It is found that the hole mobility is enhanced in strained-SOI p-MOSFETs, compared to the universal hole mobility in an inversion layer and the mobility of control SOI p-MOSFETs. The enhancement of the drive current has been kept constant down to 0.3 /spl mu/m of the effective channel length.

Non Destructive Determination of the Threading Dislocation Density of Smooth Simox Substrates using Atomic Force Microscopy

Abstract Atomic force microscopy (AFM) has been used extensively in recent years to study the topographic nature of surfaces in the nanometer range. Its high resolution and ability to be automated have made it an indispensable tool in semiconductor fabrication. Traditionally, AFM has been used to monitor the surface roughness of substrates fabricated by separation by implanted oxygen (SIMOX) processes. It was during such monitoring that a novel use of AFM was uncovered. A SIMOX process requires two basic steps - a high dose oxygen ion implantation (1017 to 1018 cm-3) followed by a high temperature anneal (>1200°C). The result of these processes is to form a buried oxide layer which isolates a top single crystal silicon layer from the underlying substrate. Pairs of threading dislocations can form in the top silicon layer during the high temperature anneal as a result of damage caused during the high dose oxygen implant.

Evaluation of buried oxide formation in low-dose SIMOX process

Formation of a buried oxide (BOX) layer during high-temperature annealing in a separation by implanted oxygen (SIMOX) process was evaluated by means of Fourier-transform infrared (FTIR) absorption spectroscopy. The evaluation results suggested that the formation process could be controlled by changing the ramping rate and the oxygen concentration in the atmosphere during high-temperature annealing. This was confirmed through TEM observation after annealing under various conditions. Reduction of the O + implantation dose was enabled by adopting a slow ramping rate for the annealing. Novel Si-on-insulator (SOI) structures with a BOX layer at the damage-peak (Dp) depth and a double BOX layer at both Dp and Rp (projection range) depths were obtained, depending on the O + implantation dose, by applying a combination of a slow ramping rate and a high oxygen concentration in the atmosphere. The atmospheric oxygen enhanced the growth of the oxide precipitate and smoothed the SiO 2/Si interfaces of the SOI structures.

Electron and hole mobility enhancement in strained-Si MOSFET's on SiGe-on-insulator substrates fabricated by SIMOX technology

We have newly developed strained-Si MOSFET's on a SiGe-on-insulator (strained-SOI) structure fabricated by separation-by-implanted-oxygen (SIMOX) technology. Their electron and hole mobility characteristics have been experimentally studied and compared to those of control SOI MOSFET's. Using an epitaxial regrowth technique of a strained-Si film on a relaxed-Si/sub 0.9/Ge/sub 0.1/ layer and the conventional SIMOX process, strained-Si (20 nm thickness) layer on fully relaxed-SiGe (340 nm thickness)-on-buried oxide (100 nm thickness) was formed, and n-and p-channel strained-Si MOSFET's were successfully fabricated. For the first time, the good FET characteristics were obtained in both n-and p-strained-SOI devices. It was found that both electron and hole mobilities in strained-SOI MOSFET's were enhanced, compared to those of control SOI MOSFET's and the universal mobility in Si inversion layer.

Photoluminescence Due to Degenerate Electron-Hole System in Silicon-on-Insulator Wafers under Ultraviolet Light Excitation

Photoluminescence (PL) spectroscopy has been used for characterization of silicon-on-insulator (SOI) wafers with SOI thickness of 75 nm fabricated by separation by implanted oxygen (SIMOX) technique. While PL signals from the substrate were dominant under conventional visible light excitation, a characteristic broad line was observed under ultraviolet (UV) light excitation throughout our temperature range between 4.2 to 70 K. The spectral distribution of the characteristic line agreed with calculated shape using convolution of the occupied electron and hole densities of states. This agreement can be regarded as strong evidence for formation of degenerate electron-hole systems, electron-hole liquid and electron-hole plasma, in the SOI layer. The detection of luminescence due to these systems allows us to suggest that relief of crystalline damage in the SOI layer induced by oxygen implantation and improvement of quality of interfaces between the SOI layer and oxide layers are efficiently achieved in the present low dose SIMOX process with an internal thermal oxidation.

Buried-oxide layer formation by high-dose oxygen-ion implantation into Si wafers: SIMOX (separation by implanted oxygen)

Recent advances in SIMOX (separation by implanted oxygen) wafer technology are reviewed. Using a thin surface silicon layer (≤100 nm) should allow the improvement of transistor and integrated-circuit performance without the need for scaling-down. In the SIMOX process, silicon wafers are subjected to high dose oxygen-ion implantation (dose∼1×10 18/cm 2, energy ∼ 200 keV) and high-temperature annealing (≥1300°C). A buried-oxide layer (several hundred nm thick) is synthesized below a single-crystalline surface-silicon layer (several hundred nm thick). SIMOX structure may be synthesized using a super-stoichiometric oxygen concentration during implantation, or, more recently, a sub-stoichiometric oxygen concentration after annealing. The former method produces a reliable buried-oxide layer, but induces a high density of defects in the surface-silicon layer. The latter cuts implantation time and improves surface-silicon crystallinity, but process window is rather narrow.