Semiconductor Parameter Analyzer Research Articles

Detection of Thiocholine for Pesticide Qualification Using Indium-Tin-Oxide-Coated Vertically Aligned Silicon Nanowires Extended Gate Field-Effect Transistor

Thiocholine is the hydrolysis of acetylthiocholine (ATCh) by acetylcholinesterase (AChE). The detection of thiocholine can be utilized to assess the activity and inhibitors of AChE, making it a valuable recognition element for constructing biosensors used in pesticide detection[1, 2]. The enzymatic hydrolysis of ATCh is catalyzed by AChE. First, high-aspect-ratio vertically aligned silicon nanowires (VASiNWs) were successfully fabricated through metal-assisted chemical etching (MACE). To investigate the impact of nanostructures on enhancing the sensitivity of the extended gate of the field-effect transistor (EGFET), the gate terminal was connected to 3-mercaptopropyl trimethoxysilane (MPTMS) modified indium-tin-oxide (ITO)-coated VASiNWs for the electrical detection of ATCh-catalyzed thiocholine, as illustrated in Figure 1. Various solutions of ATCh-catalyzed thiocholine were collected by applying different concentrations of ATCh (ranging from 2 mM to 10 mM) to the AChE-coated wells independently for 10 minutes. Subsequently, these solutions were introduced to the MPTMS modified ITO-coated VASiNWs EGFET, and the change in drain current was measured using a semiconductor parameter analyzer (HP 4145B). The thiocholine current demonstrated a sensitivity of 29.39 uA/concentration and a linearity of 0.88. Exploring the potential of pesticides to inhibit AChE hydrolysis represents a significant breakthrough, paving the way for the advancement of biosensors in pesticide detection. References Liu, G., et al., Sensitive electrochemical detection of enzymatically generated thiocholine at carbon nanotube modified glassy carbon electrode. Electrochemistry Communications, 2005. 7(11): p. 1163-1169. Pandey, P.C., et al., Acetylthiocholine/acetylcholine and thiocholine/choline electrochemical biosensors/sensors based on an organically modified sol–gel glass enzyme reactor and graphite paste electrode. Sensors and Actuators B: Chemical, 2000. 62(2): p. 109-116. Figure 1

Highly Sensitive DNA Sensing in Subthreshold Regime with ITO-Based One-Piece Thin Film Transistor

INTRODUCTION Solution-gated field-effect transistors (FETs) with silicon or other semiconductive materials as channels can specifically and selectively detect ions and biomolecules in biological samples by chemically modifying the gate electrode surface, and these are known as biologically coupled FETs (Bio-FETs) [1]. Since Bio-FETs can directly detect the charges of ions and biomolecules, they do not require to label fluorescent dyes and to induce redox reactions based on enzymes. Therefore, Bio-FETs are expected to be used as in vitro diagnostic devices for a label-free monitoring of health conditions in daily life.Our research group is investigating the application of thin-film transistors (TFTs) composed of indium tin oxide (ITO), which has been widely used as an electrode material for displays owing to its transparency and conductivity, to Bio-FETs. Considering the fact that the ITO thin film is not only conductive but also semiconductive, depending on the thickness, we have found that solution-gated FETs can be fabricated by one-step sputtering of ITO [2]. Moreover, by etching a part of the conductive ITO film with the thickness of 100 nm) to the optimal thickness (< 30 nm), which induces semiconductive characteristics, a solution-gated ITO-TFT can be fabricated, which is composed of one piece of ITO thin film and whose shape and properties can be precisely controlled [3]. The ITO-based one-piece TFT has no interface among the source/channel/drain electrodes and exhibits a steep subthreshold slope (SS) of about 80 mV/decade, which is based on the large capacitance of the electric double layer formed by the direct contact of electrolyte solutions with the ITO channel surface,. Therefore, the ITO-based one-piece TFT is expected to be applied to biosensors with high sensitivity.In this study, we demonstrate the possibility of a highly sensitive DNA detection in the steep SS with the ITO-based one-piece TFT for the biosensing application. In particular, DNA probes are chemically modified on the ITO channel surface, and then DNA hybridization is detected in the near subthreshold regime with the ITO-based one-piece TFT.EXPERIMENTAL First, photoresist was patterned on a glass substrate by photolithography. ITO thin film (100 nm thickness) was deposited on the patterned area by sputtering, and photoresist was removed using a solvent. Next, as shown in Figure 1, photolithography was used again to deposit the resist film so that the channel portion was exposed. Subsequently, a drop of 0.1 M hydrochloric acid was dropped onto the exposed channel area, and then the exposed area was etched. Etching was controlled by monitoring the conductivity between the source and drain over time. Moreover, thiolated DNA probes were immobilized on the channel surfaces of the fabricated devices using m-maleimidobenzonyl-N-hydroxysuccinimide ester (MBS) as a crosslinker to the amino groups at the poly-serotonin surface as the anchor layer (Figure 1). Thus, DNA probes were fixed on the surface to detect the target DNA, and various bioaffinity parameters such as detection limit and sensitivity were investigated in the near-subthreshold region of ITO-based one-piece TFTs.A semiconductor parameter analyzer was used to monitor conductivity during etching and to evaluate electrical properties such as gate voltage (VG)-drain current (ID) transfer characteristics of the fabricated ITO-based one-piece TFTs. AFM (Bruker) was used to evaluate the shape of the surface chemical modification.RESULTS and DISCUSSION The ITO-based one-piece TFT functionalized with DNA probes was used to evaluate the potential response to the addition of target DNA. The measurement was conducted in the near-subthreshold regime. As a result, the DNA probe-modified device showed the larger electrical signals than the device without the modification of DNA probes. This suggests that the functionalized ITO-based one-piece TFT enables the highly sensitive detection of biomolecules in the subthreshold regime.CONCLUSIONS In this study, we demonstrated the relatively highly sensitive DNA detection even in the near subthreshold regime with the ITO-based one-piece TFT with DNA probes. This indicates that the functionalized ITO-based one-piece TFT would allow the specific detection of various biomarkers in the subthreshold regime, which has the potential to be applied to biosensors with high sensitivity in the future.REFERENCES[1] Sakata, T. ACS Omega 2019, 4, 11852.[2] Sakata, T.; Nishitani, S.; Saito, A.; Fukasawa, Y. ACS Appl. Mater. Interfaces 2021, 13, 38569.[3] Katayama, R.; Sakata, T. ECS Trans. 2023, 111, 37. Figure 1

Effect of the Temperature on the Performance and Dynamic Behavior of HfO2-Based Rram Devices

Over the past decades, the demand for semiconductor memory devices has been steadily increasing, and is currently experiencing an unprecedented boost due to the development and expansion of artificial intelligence. Among emerging high-density non-volatile memories, resistive random-access memory (RRAM) is one of the best recourses for all kind of applications, such as neuromorphic computing or hardware security [1]. Although many materials have been evaluated for RRAM development, some of them with excellent results, HfO2 is one of the established materials in CMOS domain due to its compatibility with standard materials and processes [2].The main goal of this work is to study the switching capability and stability of HfO2-based RRAMs, as well as to explore their ability in the field of analogue applications, by analyzing the evolution of the resistance states that allow multilevel control. Indeed, analogue operation is a key point for achieving electronic neural synapses in neuromorphic systems, with synaptic weight information encoded in the different resistance states. This research has been carried out over a wide temperature range, between 40 and 340 K, as we are interested in testing the extent to which performance is maintained or modified, with a view to designing neuromorphic circuits that are also suitable in the low-temperature realm. We aim to prove that these simple, fast, high integration density structures can also be used in circuits designed for specific applications, such as aerospace systems.The RRAM devices studied in this work are TiN/Ti/8 nm-HfO2/TiN metal-insulator-metal (MIM) capacitors. Dielectric layers were atomic layer deposited (ALD). It has been demonstrated that the Ti coat in the top electrode acts as a scavenger that absorbs oxygen atoms from the HfO2 layer, and facilitates the creation of conductive filaments of oxygen vacancies [3]. In fact, the oxygen reservoir capability of Ti is well known, as it is able to attract and release oxygen atoms from or to the HfO2 layer during the RRAM operation [4]. The clustering of vacancies extends through the entire thickness of the oxide and, after an electroformig step, it joins the upper and lower electrodes and the device reaches the low resistance state (LRS). By applying adequate electrical signals, the filaments can be partially dissolved, which brings the device into the high-resistance state (HRS), with lower current values. The set process brings the device to the LRS state, while the reset one brings it to the HRS. The dependence of electrical conductivity on external applied electrical excitation allows triggering the device between the both states in a non-volatile manner [5].The experimental equipment used consisted of a Keithley 4200-SCS semiconductor parameter analyzer and a Lake Shore cryogenic probe station. Fig.1 shows current-voltage cycles measured at different temperatures; the averages values at each temperature, both in logarithmic and linear scale, are also shown. The functional window increases as temperature decreases.The evolutions of set and reset voltage values with temperature are depicted in Fig.2, whereas the current values (measured at 0.1 V) corresponding to the LRS and HRS can be seen in Fig.3. LRS resistance decreases as temperature increases, in agreement with semiconductor behaviour, probably due to a hopping conduction mechanism. Both set and reset voltages decrease as temperature increases; the reset process is smoother at high temperatures. The reduction in reset voltage variability as temperature increases is very notable.Finally, Fig. 4 shows a picture of the transient behaviour; in the right panel of the same figure, the amplitudes of the current transients in the reset state have been included in the external loop.To sum up, the resistive switching phenomena is studied in a wide temperature range. The LRS shows semiconducting behavior with temperature, most likely related to a hopping conduction mechanism. Switching voltages decrease as temperature increases, with a notable reduction in reset voltage variability. An excellent control of intermediate resistance state is shown through current transients at several voltages in the reset process.REFERENCES[1] M. Asif et al., Materials Today Electronics 1, 100004 (2022).[2] S. Slesazeck et al., Nanotechnology 30, 352003 (2019).[3] Z. Fang et al., IEEE Electron Device Letters 35, 9, 912-914 (2014).[4] H. Y. Lee et al., IEEE Electron Device Letters 31, 1, 44-46 (2010).[5] D. J. Wouters et al., Proceedings of the IEEE 103, 8, 1274-1288 (2015). Figure 1

Investigations of In2O3 Added SiC Semiconductive Thin Films and Manufacture of a Heterojunction Diode

This study involved direct doping of In2O3 into silicon carbide (SiC) powder, resulting in 8.0 at% In-doped SiC powder. Subsequently, heating at 500 °C was performed to form a target, followed by the utilization of electron beam (e-beam) technology to deposit the In-doped SiC thin films with the thickness of approximately 189.8 nm. The first breakthrough of this research was the successful deposition of using e-beam technology. The second breakthrough involved utilizing various tools to analyze the physical and electrical properties of In-doped SiC thin films. Hall effect measurement was used to measure the resistivity, mobility, and carrier concentration and confirm its n-type semiconductor nature. The uniform dispersion of In ions in SiC was as confirmed by electron microscopy energy-dispersive spectroscopy and secondary ion mass spectrometry analyses. The Tauc Plot method was employed to determine the Eg values of pure SiC and In-doped SiC thin films. Semiconductor parameter analyzer was used to measure the conductivity and the I-V characteristics of devices in In-doped SiC thin films. Furthermore, the third finding demonstrated that In2O3-doped SiC thin films exhibited remarkable current density. X-ray photoelectron spectroscopy and Gaussian-resolved spectra further confirmed a significant relationship between conductivity and oxygen vacancy concentration. Lastly, depositing these In-doped SiC thin films onto p-type silicon substrates etched with buffered oxide etchant resulted in the formation of heterojunction p-n junction. This junction exhibited the rectifying characteristics of a diode, with sample current values in the vicinity of 102 mA, breakdown voltage at approximately −5.23 V, and open-circuit voltage around 1.56 V. This underscores the potential of In-doped SiC thin films for various semiconductor devices.

Total X-ray dose effect on graphene field effect transistor

In this paper, the total dose effects of graphene field-effect transistors (GFETs) with different structures and sizes are studied. The irradiation experiments are carried out by using the 10-keV X-ray irradiation platform with a dose rate of 200 rad(Si)/s. Positive gate bias (&lt;i&gt;V&lt;/i&gt;&lt;sub&gt;G&lt;/sub&gt; = +1 V, &lt;i&gt;V&lt;/i&gt;&lt;sub&gt;D&lt;i&gt; &lt;/i&gt;&lt;/sub&gt;= &lt;i&gt;V&lt;/i&gt;&lt;sub&gt;S&lt;i&gt; &lt;/i&gt;&lt;/sub&gt;= 0 V) is used during irradiation. Using a semiconductor parameter analyzer, the transfer characteristic curves of top-gate GFET and back-gate GFET are obtained before and after irradiation. At the same time, the degradation condition of the dirac voltage &lt;i&gt;V&lt;/i&gt;&lt;sub&gt;Dirac&lt;/sub&gt; and the carrier mobility &lt;i&gt;μ&lt;/i&gt; are extracted from the transfer characteristic curve. The experimental results demonstrate that &lt;i&gt;V&lt;/i&gt;&lt;sub&gt;Dirac&lt;/sub&gt; and carrier mobility &lt;i&gt;μ&lt;/i&gt; degrade with dose increasing. The depletion of &lt;i&gt;V&lt;/i&gt;&lt;sub&gt;Dirac&lt;/sub&gt; and carrier mobility &lt;i&gt;μ&lt;/i&gt; are caused by the oxide trap charge generated in the gate oxygen layer during X-ray irradiation. Compared with the back-gate GFETs, the top-gate GFETs show more severely degrade &lt;i&gt;V&lt;/i&gt;&lt;sub&gt;Dirac&lt;/sub&gt; and carrier mobility, therefore top-gate GFET is more sensitive to X-ray radiation at the same cumulative dose than back-gate GFET. The analysis shows that the degradation of top-gate GFET is mainly caused by the oxide trap charge. And in contrast to top-gate GFET, oxygen adsorption contributes to the irradiation process of back-gate GFET, which somewhat mitigates the effect of radiation damage. Furthermore, a comparison of electrical property deterioration of GFETs of varying sizes between the pre-irradiation and the post-irradiation is made. The back-gate GFET, which has a size of 50 μm×50 μm, and the top-gate GFET, which has a size of 200 μm×200 μm, are damaged most seriously. In the case of the top-gate GFET, the larger the radiation area, the more the generated oxide trap charges are and the more serious the damage. In contrast, the back-gate GFET has a larger oxygen adsorption area during irradiation and a more noticeable oxygen adsorption effect, which partially offsets the damage produced by irradiation. Finally, the oxide trap charge mechanism is simulated by using TCAD simulation tool. The TCAD simulation reveals that the trap charge at the interface between Al&lt;sub&gt;2&lt;/sub&gt;O&lt;sub&gt;3&lt;/sub&gt; and graphene is mainly responsible for the degradation of top-gate GFET property, significantly affecting the investigation of the radiation effect and radiation reinforcement of GFETs.

On the structural evolutionary behavior of the CdTe/HgCdTe interface during the annealing process

In this study, secondary ion mass spectrometry and a semiconductor parameter analyzer were used to study and analyze the component interdiffusion at the CdTe/HgCdTe interface before and after annealing, as well as the effect of the formation of a gradient bandgap layer from annealing on the electrical properties of the metal–insulator-semiconductor (MIS) structure. The site-direction relationship of the contracted crystals at the CdTe/HgCdTe interface was revealed by transmission electron microscopy, and it was found that the stacking dislocations in the CdTe layer were significantly reduced after annealing and that the Hg atoms diffused into the CdTe layer through the high-temperature annealing and occupied the lattice positions of the Cd atoms, thus forming the HgCdTe structure, which formed a contracted-crystalline structure with the CdTe substrate. Molecular dynamics was applied to simulate the specific atomic diffusion behavior at different temperatures and different times during the high temperature annealing process, and the above experimental results were verified by a research note on the variation of the diffusion phenomena during the process.

Effect of 60Coγ ray radiation on electrical properties of SiGe HBTs at low temperatures

In this article, total ionizing dose (TID) irradiation experiments were carried out on germanium-silicon heterojunction bipolar transistors (SiGe HBTs) under different bias and temperature conditions. The electrical performance and noise characteristics of the device were characterized before and after irradiation using a semiconductor parameter analyzer and a 1/f noise test system, respectively. The variation of radiation sensitivity parameters with the TID effect and temperature of the device was obtained, and the mechanism of radiation damage degradation was also identified. Results suggest that the oxide-trap charges and interface states induced by irradiation are the main causes for SiGe HBT electrical parameters degradation. With the decreased temperature, Gummel characteristics and 1/f noise are significantly improved. It's found that oxide-trap charges and interface states generated at 93 K is less than that at 300 K. This work lays the foundation for the application of SiGe HBT in aerospace area.

Improved resistive switching performance of amorphous InGaZnO-based memristor with the TiO2 insertion layer

A stable I–V repeatability memristor based on amorphous InGaZnO (a-IGZO) with a TiO2 insertion layer was investigated. Two memristive structures composed of Pt/a-IGZO/Pt and Pt/TiO2/a-IGZO/Pt were manufactured on SiO2/Si substrate by the magnetron sputtering method. The crystallization of IGZO thin films was analyzed by the XRD process under different annealing temperatures, and the results show that the thin films remain in a stable amorphous state. The resistive switching performance of the two structures was tested by the semiconductor parameter analyzer 4200-SCS at room temperature. After 30 cyclic scans, the Pt/a-IGZO/Pt structure shows signs of degeneration in its I–V cyclic characteristics. However, in the Pt/TiO2/a-IGZO/Pt structure, the cyclic characteristics of I–V are highly stable (cycles >105 sweeps) with a limiting operating current of 0.01 A. Its rectification ratio is approximately 20 at low operating voltages (±1.0 V), and conductance increases (or decreases) progressively with continuous positive (or negative) voltage scans. Further analysis of the experimental energy band diagram was measured by UV–vis spectra and ultraviolet photoemission spectroscopy (UPS). The results demonstrate that the operational mechanism is the modulation of the barrier at the TiO2/a-IGZO interface, which is conducive to the stable I–V cyclic characteristic of Pt/TiO2/a-IGZO/Pt memristor.

Simple Fabrication Method for Solution-gated One-piece Transistors for Biosensing Applications

INTRODUCTIONSolution-gated field-effect transistors (FETs) with silicon or other semiconductive materials as channels can specifically and selectively detect ions and biomolecules related to biological functions by chemically modifying the gate electrode surface, and these are known as biologically coupled FETs (Bio-FETs) [1]. Since Bio-FETs can directly detect the charges of ions and biomolecules, they do not require to label fluorescent dyes and to induce redox reactions based on enzymes. Therefore, Bio-FETs are expected to be used as in vitro diagnostic devices for a label-free monitoring of health conditions in daily life.Recently, indium tin oxide (ITO) has been widely used as an electrode material for flat panel displays owing to its transparency and conductivity. Our laboratory previously reported that solution-gate FETs fabricated by one-step sputtering provided a steep subthreshold slope (SS) owing to the absence of the interfaces among source/channel/drain electrodes and the large electric double-layer capacitance caused by direct contact between electrolyte solutions and the channel surface [2]. While this technique was simple, it utilized the diffusion of atoms during sputtering between a modified mask and substrates and was also dependent on the mask size, which limited the miniaturization of the transistor. On the other hand, the conventional fabrication methods of solution-gated FETs facilitate the miniaturization and the precise control of device structure by use of photolithography, but such methods inevitably produce impurities at the source/channel/drain electrode interfaces and may cause the degradation of device performances.In this study, we propose a new method to fabricate solution-gated ITO thin-film channel FETs without interfaces among the source/channel/drain electrodes, which facilitates to miniaturize and control the device structure. A conductive ITO thin film with a thickness of about 100 nm is deposited on a glass substrate by sputtering. Then, the ITO film is protected by photoresist and then the channel area is exposed by photolithography. The exposed area is etched to 20 nm or less thickness, which induces semiconductive characteristics. This method enables the fabrication of the desired solution-gated ITO thin-film channel FET. Furthermore, we evaluate its electrical characteristics and examines its potential for biosensor applications.EXPERIMENTALFirst, photoresist was patterned on a glass substrate by photolithography. ITO thin film (100 nm thickness) was deposited on the patterned area by sputtering, and the photoresist was removed using a solvent. Next, photolithography was used again to deposit the resist film so that the channel area was exposed. Etching was performed by dropping 0.1 M hydrochloric acid on the exposed channel area (Figure). Etching time was controlled by applying a voltage between the source and drain electrodes and measuring the change in current over time. A semiconductor parameter analyzer was used to measure the current during etching, the gate voltage (VG)-drain current (ID) transfer characteristics, and the pH responsivity of the fabricated devices. The film thickness was measured by a white interferometer-equipped laser microscope (Keyence).RESULTS and DISCUSSIONBy controlling the current during etching, the current value was decreased rapidly at the end of the etching. This may be because the thickness of ITO film was thinner and reached about 20 nm, which resulted in the semiconductive characteristics. Then, the etching was stopped to obtain the solution-gated ITO thin-film channel FET. The fundamental electrical characteristics such as VG-ID transfer curves were investigated, and the fabricated device was found to operate as the solution-gated FET. It was also found that the devices showed the Nernst response for the change in pH and a steep subthreshold slope of approximately 90 mV/decade (pH 7.41). Furthermore, the ITO channel thickness was measured by laser microscopy; as a result, it was about 10–20 nm.CONCLUSIONS In this study, we proposed the new method to fabricate the solution-gated ITO thin-film channel FET. The device actually worked as a transistor, and it showed good sensitivity to potential. This method enabled the solution-gated FETs to be produced by the simple method. Thus, the solution-gated ITO thin-film channel FET is applied to biosensors, which is highly sensitive and affordable to detect biomolecules in the future.REFERENCES[1] Sakata, T. ACS Omega, 4, 11852 (2019).[2] Sakata, T.; Nishitani, S.; Saito, A.; Fukasawa, Y. ACS Appl. Mater. Interfaces, 13, 38569 (2021). Figure 1

Fabrication and Characterization of Self-Aligned WSe2 p-Type Field-Effect Transistor

Semiconducting transition metal dichalcogenides (TMDCs) have been growing interests as channel materials in field effect transistors (FET) for next generation low power digital electronics. [1]. Since a complementary metal oxide-semiconductor (CMOS) inverter constructed from pairs of n-type and p-type FETs is a fundamental building blocks in modern digital electronics [2], implementation of both n-type and p-type FETs with semiconducting TMDCs is of particular importance [3]. Among various semiconducting TMDCs, tungsten diselenide (WSe2) is a promising candidate for constructing a CMOS inverter because of its high mobility, symmetric electron and hole effective mass and ambipolar transport [4]. These prominent features of WSe2 is suitable for an application to CMOS inverter.One of the significant challenges is to develop a top gate and top contact FET structure with WSe2 for CMOS device integration on the same wafer. In addition, it is desirable to minimize the access region between channel and S/D contact because this access region served as a series resistance to channel resistance, resulting in the lower drain current in FET. This study reports a self-aligned process to fabricate top gate and top contact WSe2 p-type FET. In this self-aligned structure, the gate electrode and source/drain contact edges are automatically positioned and hence there are no overlap or access region between the gate and source/drain. The feature of this proposed method is that the gate stacks was utilized as a mask for self-aligned formation of WOx, which is source/drain contact for efficient hole injection [5]. The focus on this study is the impact of self-aligned structure of p-type WSe2 FET on the electrical characteristics. The effectiveness of proposed process was experimentally demonstrated by the fabrication and characterization of device.Figures 1 shows the self-aligned fabrication process of p-type WSe2 FET. 20 nm-thick SiO2 was formed by dry oxidation of p+-Si substrate. The mechanically exfoliated multi-layer WSe2 was transferred by PDMS stamp. Next, 15 nm-thick Al2O3 was prepared by ALD at 200 oC with H2O. Then, Nickel (Ni) metal was deposited by RF sputtering on Al2O3. Ni metal was patterned for gate electrode with conventional lithography process. After that, A2O3 layer was removed by wet etching. Subsequently, substrate was exposed to oxygen radicals to form WOx used as source/drain contact at surface of WSe2. Second layer of Al2O3 was deposited as an encapsulating passivation layer. After the contact hole opening, the electrical contact pad was fabricated. Finally, forming gas (N2 : H2 = 97 % : 3 %) annealing was performed at 200 oC for 30 min. The top gate length was 5 μm. The gate width was estimated to be 40 μm by optical microscope. The electrical characteristics were measured with a manual probe station in an atmospheric pressure without inert gas purge at room temperature using a precision semiconductor parameter analyzer (Agilent 4156 C).Figures 2 shows the Id–Vg characteristics of fabricated FETs for (a) back gate operation and (b) top gate operation. Representative Id–Vg characteristics of p-type FETs were observed irrespective of back gate and top gate operation. The on/off ratio of about 106 ~ 107 order were obtained for both back gate and top gate operation. Furthermore, the threshold voltage and sub-threshold slope were modulated by varying the substrate bias during gate sweep.This study opens up interesting directions for the research and development of TMDC-based devices.AcknowledgmentsThis study was supported by a JSPS Grant-in-Aid for Scientific Research (C) (Grant No. 20K04616), a research grant for Tokyo Tech Challenging Research Award, the Samco Foundation and a research grant for Suematsu Award.

Investigation and Characterization of Graphene/Al, ZnO/Al and Al/Graphene/ZnO Contacts

In this paper, investigation has been made on the electrical properties of graphene/Al contact, ZnO/Al contact and Al/graphene/ZnO contacts in detail. Al metallization is considered, and it is performed via thermal vacuum coating technique under strict monitoring of the rate of thickness of the metal. Spin coating method and shadow masking are done for depositing fabricated graphene and ZnO on the thin film. Comparative analysis has been made on the parameters like saturation current, Barrier height and ideality factors which are calculated using Schottky barrier height (SBH) method. I–V characteristics are analyzed using the key‐sight B2029A semiconductor parameter analyzer. It is seen that the ZnO/Al contact has more ideality factor nearly 0.059 and exhibits Schottky behavior. Meanwhile, maximum saturation current is obtained for Graphene/Al contact whereas maximum barrier height is for ZnO/Al contact. © 2023 Institute of Electrical Engineer of Japan and Wiley Periodicals LLC.

A Miniature Biomedical Sensor for Rapid Detection of Schistosoma japonicum Antibodies.

Schistosomiasis, typically characterized by chronic infection in endemic regions, has the potential to affect liver tissue and pose a serious threat to human health. Detecting and screening for this disease early on is crucial for its prevention and control. However, existing methods encounter challenges such as low sensitivity, time-consuming processes, and complex sample handling. To address these challenges, we report a soluble egg antigen (SEA)-based functionalized gridless and meander-type AlGaN/GaN high electron mobility transistors (HEMT) sensor for the highly sensitive detection of antibodies to Schistosoma japonicum. Immobilization of the self-assembled membrane on the gate surface was verified using a semiconductor parameter analyzer, scanning electron microscope (SEM), and atomic force microscopy (AFM). The developed biosensor demonstrates remarkable performance in detecting anti-SEA, exhibiting a linear concentration range of 10 ng/mL to 100 μg/mL and a sensitivity of 0.058 mA/log (ng/mL). It also exhibits similar excellent performance in serum systems. With advantages such as rapid detection, high sensitivity, miniaturization, and label-free operation, this biosensor can fulfill the requirements for blood defense.

The hydrothermal synthesis of SNO2 nanoparticles derived from tin chloride precursor for the electron transport layer of perovskite solar cells

Tin oxide (SnO2) semiconductor is recognized as a highly promising material for the electron transport layer (ETL) in perovskite solar cells (PSC) due to their wide band gap energy and high electron mobility. This material has been considered as the potential alternative material for substituting the conventional titanium dioxide (TiO2). In the form of nanostructure material, it is expected that SnO2 as the ETL in PSC device can be significantly improved owing to its high surface area leading to more intensive photon absorption. In this present study, SnO2 nanoparticles were synthesized via the hydrothermal method with temperature variations ranging from 120 °C to 160 °C for 16 hours. The as-synthesized samples were characterized using X-ray diffraction (XRD), scanning electron microscope (SEM), and an ultraviolet–visible (UV-Vis) spectrophotometer. The SnO2 nanoparticles were then integrated into the PSC device as the ETL, and the performance testing was conducted using a semiconductor parameter analyzer to obtain the I-V curve. On the basis of investigation results, it has been found that the temperature used during the hydrothermal process plays a crucial role in determining the crystallinity, morphology, and band gap energy of the SnO2 nanoparticles. The results of the PSC performance test indicate that SnO2 nanoparticles synthesized at a hydrothermal temperature of 150 °C demonstrated the highest power conversion efficiency (PCE) of 3.89 %. This outcome confirms the viability of SnO2 nanoparticles produced through the hydrothermal method

Synthesis of Tin Oxide Nanocrystallites with Various Calcination Temperatures using Co-Precipitation Method with Local Tin Chloride Precursor

Indonesia is one of the largest tin metal producers in the world, and one of its derivative products is tin chloride (SnCl4). This material has been used as a raw ingredient for the production of organotin compounds such as methyltin mercaptide for PVC (polyvinyl chloride) plastic industry as a heat stabilizer. On the other hand, this precursor can be used to synthesize SnO2 nanomaterials, which have other strategic potentials, including photocatalysts and solar cell applications. In this study, the synthesis of SnO2 nanocrystallites was carried out using a local tin chloride precursor via the co-precipitation method, followed by a calcination process at temperatures of 300, 400, 500, and 600 °C, for further usage as an ETL (electron transport layer) in a PSC (perovskite solar cell) device. The basic properties characterization was carried out using XRD (X-ray diffraction), ultraviolet-visible (UV-Vis) spectroscopy, and SEM (scanning electron microscopy), while the photocurrent-voltage (I-V) curve photovoltaic performance of the device was performed using a semiconductor parameter analyzer. The characterization results showed that increasing the calcination temperature from 300 to 600 °C increased the average crystallite size from 1.19 to 13.75 nm and decreased the band gap energy from 3.57 to 3.10 eV. The highest PCE (power conversion efficiency) was obtained from the device fabricated with SnO2 nanocrystallites calcined at a temperature of 300 °C, which was 0.0024%. This result was obtained due to the highest transmittance of this sample as compared to others; the higher the transmittance, the better the performance of the ETL, which in turn increased the overall efficiency of the PSC

Impact of Annealing Temperature on Electrical Properties of Sol-gel Ba0.90Gd0.10TiO3 Thin Films

Ba0.90Gd0.10TiO3 (BGT) thin films have been fabricated in MFM configuration via sol-gel technique at the different annealing temperature. The dielectric parameters of the films are measured using Impedance Analyzer as a function of frequency. It is found that, at frequency 1 kHz, the measured value of e increases from 57 to 264 as the annealing temperature increases from 600 °C to 900 °C, which is correlated to the improved crystallinity and grain size increment. The ferroelectric hysteresis of the films is analyzed using Sawyer-Tower circuit that shows an enhancement for the ferroelectric properties with annealing temperature, which is also confirmed using C-V characteristics. The leakage current of the films is evaluated via Semiconductor Parameter Analyzer (SPA), which shows that at a certain electric field, the leakage current density increases as the annealing temperature increases, that is attributed to the crystallinity and grain size improvement. The conduction mechanism of the films is deeply investigated through different models to find out that the space charge limited conduction (SCLC) mechanism is the controlling conduction process.

Effect of a ZrO2 Seed Layer on an Hf0.5Zr0.5O2 Ferroelectric Device Fabricated via Plasma Enhanced Atomic Layer Deposition.

In this study, a ferroelectric layer was formed on a ferroelectric device via plasma enhanced atomic layer deposition. The device used 50 nm thick TiN as upper and lower electrodes, and an Hf0.5Zr0.5O2 (HZO) ferroelectric material was applied to fabricate a metal-ferroelectric-metal-type capacitor. HZO ferroelectric devices were fabricated in accordance with three principles to improve their ferroelectric properties. First, the HZO nanolaminate thickness of the ferroelectric layers was varied. Second, heat treatment was performed at 450, 550, and 650 °C to investigate the changes in the ferroelectric characteristics as a function of the heat-treatment temperature. Finally, ferroelectric thin films were formed with or without seed layers. Electrical characteristics such as the I-E characteristics, P-E hysteresis, and fatigue endurance were analyzed using a semiconductor parameter analyzer. The crystallinity, component ratio, and thickness of the nanolaminates of the ferroelectric thin film were analyzed via X-ray diffraction, X-ray photoelectron spectroscopy, and transmission electron microscopy. The residual polarization of the (20,20)*3 device heat treated at 550 °C was 23.94 μC/cm2, whereas that of the D(20,20)*3 device was 28.18 μC/cm2, which improved the characteristics. In addition, in the fatigue endurance test, the wake-up effect was observed in specimens with bottom and dual seed layers, which exhibited excellent durability after 108 cycles.

Observation of MOSFET-like behavior of a TFT based on amorphous oxide semiconductor channel layer with suitable integration of atomic layered deposited high-k gate dielectrics

A series of different high κ dielectrics such as HfO2, ZrO2, and Al2O3 thin films were studied as an alternative material for the possible replacement of traditional SiO2. These large areas, as well as conformal dielectrics thin films, were grown by the atomic layer deposition technique on a p-type silicon substrate at two different deposition temperatures (150 and 250 °C). Atomic force microscopic study reveals that the surface of the films is very smooth with a measured rms surface roughness value of less than 0.4 nm in some films. After the deposition of the high κ layer, a top metal electrode was deposited onto it to fabricate metal oxide semiconductor capacitor (MOSCAP) structures. The I–V curve reveals that the sample growth at high temperatures exhibits a high resistance value and lower leakage current densities. Frequency-dependent (100 kHz to 1 MHz) C–V characteristics of the MOSCAPs were studied steadily. Furthermore, we have prepared a metal oxide semiconductor field-effect transistor device with Al-doped ZnO as a channel material, and the electrical characteristic of the device was studied. The effect of growth temperature on the structure, surface morphology, crystallinity, capacitance, and dielectric properties of the high κ dielectrics was thoroughly analyzed through several measurement techniques, such as XRD, atomic force microscopy, semiconductor parameter analysis, and ultraviolet-visible spectroscopy.

Characterization and Conductivity Studies of Graphene Oxide with Different Degrees of Oxidizing Agent

Different degrees of potassium permanganate (KMNO4) was used in the synthesis of graphene oxide (GO). In characterization analysis, the appearance of IR band attributes to O–H, C=C, C–OH and, C–O–C can be observed at around 3500 cm−1, 1650 cm−1, 1400 cm−1 and, 1200 cm−1 respectively. The UV-Vis spectroscopy revealed, GO with more KMNO4 shows increment in absorption and wavenumber due to more concentration of GO and stacked layers of GO. Nevertheless, a high level of KMNO4 results in a low density of GO. Analysis from Semiconductor Parameter Analyzer (SPA) revealed, a low oxygenated functional group from low-level KMNO4 produces less band gap open and thus, yielding high conductivity.

A Smart Measurement System for the Combined Nanoscale and Device Level Characterization of Electron Devices: Implementation Using Ink-Jet Printing Technologies

In this article, the integration into a single measurement system of device level and nanoscale measurement equipment is presented and applied to the electrical characterization of emerging electron devices. This system is a smart solution to simplify the test procedure, since it allows a fast switching between measurement modes (device or nanoscale level), also featuring an enlarged testing capability. Key in the system is a custom-made inkjet-printed circuit board (I-PCB) that connects the device terminals to the proper instrumentation. The flexibility offered by inkjet-printing technologies is a clear advantage, since many kinds of devices can be tested, without the need of expensive hardware modifications. As a particular case of study, the proposed strategy is demonstrated by implementing a system that alternates between standard electrical measurements with a Semiconductor Parameter Analyzer (SPA) and Conductive Atomic Force Microscopy (CAFM) nanoscale measurements on back-gate graphene field-effect transistors.

Probing the electrical performance improvement of FET device based on multilayer MoS2 material

The process quality of material and device can be evaluated by the electrical performance. In this paper, the multi-layer MoS2 material and nickel (Ni) metal were used as channel and electrodes of FET device, which can be fabricated by the electron beam lithography and evaporation processes. The morphology, structure, component and spectral characteristic of multilayer MoS2 material and device were characterized by optical microscope, Raman spectrometer and scanning electron microscope (SEM), and the fabrication feasibility was also discussed. Meanwhile, the electronic performance of device was tested and analyzed by probe table and semiconductor parameter analyzer, and the influence of annealing treatment can also be explored. The contact resistance of device decreases after annealing, current switching ratio increase by one order of magnitude, output characteristic curve shows linear, and the electrical performance can also be improved, which can provide the research guidance for the electronic device based on multilayer MoS2 material.