Semiconductor Losses Research Articles

A high performance grid connected PV system based on HERIC transformerless inverter

<p>This paper presents an effective single phase grid connected photovoltaic PV system based on High Efficiency and Reliable Inverter Concept HERIC transformerless inverter. dc-dc boost converter controlled by incremental conductance IC maximum power point tracker MPPT is employed to achieve the maximum extraction power of the PV panels. Proportional integral PI controller controls the output voltage of the boost converter to meet the utility grid requirements. LCL filter is utilized to keep the inverter voltage very close to sinusoidal shape. Employing the HERIC transformerless inverter reduces significantly the ground leakage current beyond safe limits. Semiconductors losses are studied to investigate the efficiency of the proposed system at different insolation levels. Simulation results verify the high performance of the proposed system when considering leakage current and system efficiency.</p>

Diamond semiconductor performances in power electronics applications

This paper proposes a system-level comparison between diamond and silicon carbide (SiC) power devices. It highlights the benefits of diamond semiconductors for power electronics applications. Actual diamond power devices were fabricated and characterised (DC, AC small-signal, large-signal power switching in a buck converter). Models of the diamond devices are discussed based on the experimental data, and the expected performances of the future diamond semiconductors in power converters are presented. These performances are compared to the commercialised SiC Schottky diodes for a given application. Our analysis shows that diamond devices can be used to increase the performance of power converters, especially at high temperatures. We demonstrate that for a junction temperature of 450 K, diamond semiconductors can divide the semiconductor losses and heatsink volume by three, in comparison with SiC devices. We also demonstrate that the switching frequency with diamond devices can be five times higher than with SiC devices, with lower total semiconductor losses and smaller heatsink in diamond-based power converters. This system-level analysis clearly shows the future improvements in the efficiency and power densities of power converters thanks to diamond power devices. The need for management of the specific junction temperature, which is required in order to exploit all of the properties of diamonds, is demonstrated and discussed.

A Novel Bridgeless Cuk PFC Converter With Further Reduced Conduction Losses and Simple Circuit Structure

The bridgeless power factor correction (PFC) converter is popular for reducing the conduction losses of semiconductors. In this article, a novel bridgeless Cuk PFC converter is proposed. Compared with the conventional Cuk PFC converter, the number of conducting semiconductors in the proposed bridgeless Cuk PFC converter is reduced, contributing to lower conduction losses. Moreover, the conduction losses in the proposed converter are further improved compared with the pseudototem-pole bridgeless Cuk PFC converter. Meanwhile, the total number of the component in the proposed converter is less than other bridgeless Cuk PFC counterparts, especially for the big-volume magnetic component and electrolytic capacitor. In addition, all power switches in the proposed converter are common ground and can be driven by one control signal, availing simple drivers. The theoretical analysis of the proposed converter is presented in the discontinuous conduction mode with the merits of nature current-sharping ability, zero-current switching in semiconductors, and easy control. Finally, the simulation and a 100-W lab prototype are built to validate the feasibility of the proposed bridgeless Cuk PFC converter.

Power Losses Estimation for Visualization of Heat Distribution

For designing power electronics, especially high-power-density systems, power loss estimation is a very important step in the design process. The estimation of losses without using a mathematical method, but instead using a simulation approach can significantly lower design time. In this paper, the estimation of the power losses by the simulation method using MATLAB Simulink is presented. The main goal of this paper is the estimation of the worst-case scenario of the inverter losses powering the three-phase asynchronous motor. Simulation is using real parameters of the used semiconductors to accurately estimate power losses. The simulation model consists of two main parts. The first one calculates power losses in semiconductors based on the provided parameters and his temperature. The second part calculates the temperature of the system based on the cooling model and losses calculated by the first system. Results in the form of the losses are used in the Fusion 360 software to simulate the temperature distribution of the heatsink. This simulation is supported by the calculation of the convection coefficient of the heatsink in different airflows. Additionally, two types of heat transfer were simulated, convection only and convection plus radiation type of heat dissipation.

Calculation of Semiconductor Power Losses of a Three-Phase Quasi-Z-Source Inverter

This paper presents two novel algorithms for the calculation of semiconductor losses of a three-phase quasi-Z-source inverter (qZSI). The conduction and switching losses are calculated based on the output current-voltage characteristics and switching characteristics, respectively, which are provided by the semiconductor device manufacturer. The considered inverter has been operated in a stand-alone operation mode, whereby the sinusoidal pulse width modulation (SPWM) with injected 3rd harmonic has been implemented. The proposed algorithms calculate the losses of the insulated gate bipolar transistors (IGBTs) and the free-wheeling diodes in the inverter bridge, as well as the losses of the impedance network diode. The first considered algorithm requires the mean value of the inverter input voltage, the mean value of the impedance network inductor current, the peak value of the phase current, the modulation index, the duty cycle, and the phase angle between the fundamental output phase current and voltage. Its implementation is feasible only for the Z-source-related topologies with the SPWM. The second considered algorithm requires the instantaneous values of the inverter input voltage, the impedance network diode current, the impedance network inductor current, the phase current, and the duty cycle. However, it does not impose any limitations regarding the inverter topology or switching modulation strategy. The semiconductor losses calculated by the proposed algorithms were compared with the experimentally determined losses. Based on the comparison, the correction factor for the IGBT switching energies was determined so the errors of both the algorithms were reduced to less than 12%.

Three Levels Are Not Enough: Scaling Laws for Multilevel Converters in AC/DC Applications

Single-phase inverters and rectifiers in 230 Vrms applications, with a dc-side voltage of 400 V, achieve ultrahigh efficiency with a simple two-level topology. These single-phase designs typically utilize a line-frequency unfolder stage, which has very low losses and essentially doubles the peak-to-peak voltage that can be generated on the ac side for a given dc-link voltage. For certain applications, however, such as higher power grid-connected photovoltaic inverters, electric vehicle chargers, and machine drives, three-phase converters are needed. Because of the three-phase characteristic of the system, unfolders cannot be similarly used, leading to a higher minimum dc-link voltage of the three-phase line-to-line voltage amplitude, which is typically set to 800 V for 230 Vrms phase voltage systems. Previous demonstrations indicate that significantly more levels-and the associated higher cost and complexity-are required for ultrahigh-efficiency three-phase converters relative to their single-phase counterparts. In this article, we seek to determine the fundamental reason for the performance difference between three-phase 800 V dc-link converters and single phase 400 V converters. First, we build a 2.2 kW dc/ac hardware demonstrator to confirm the necessity of higher complexity converters, showing a simultaneous reduction in efficiency and power density between a two-level 400 V benchmark (99.2% peak efficiency at 18.0 kW/L) and a three-level 800 V inverter phase-leg (98.8%, 9.1 kW/L). With the motivation confirmed, we derive general scaling laws for bridge-leg losses across the number of levels and dc-link voltage, finding the efficiency-optimal chip area and the minimum semiconductor losses. With commercially available Si or GaN power semiconductors, the scaling laws indicate that six or more levels would be required for an 800 V three-phase ac/dc converter to meet or exceed the bridge-leg efficiency of a two-level 400 V GaN benchmark for a fixed output filter. With a complete Pareto optimization, we find that at least seven levels are necessary to recover the efficiency of the two-level 400 V benchmark, and we validate this theory with a seven-level 800 V 2.2 kW hardware prototype with a power density of 15.8 kW/L and a peak efficiency of 99.03%. Finally, two practical solutions that make use of the benefits of unfolder bridges familiar in single-phase systems are identified for three-phase systems.

Three-Phase PWM Voltage-Source-Inverter Weight Optimization for Aircraft Application Using Deterministic Algorithm

In this paper, a design by optimization process is used to size a 10-kW three-phase pulse width modulation (PWM) inverter for aeronautic application. The objective function is the converter weight, which has to be minimized. Sizing constraints are the efficiency, alternating current (AC) and direct current (DC) harmonics, and thermal constraints on all devices. A deterministic algorithm is chosen since it allows obtaining quick results and dealing with a large number of variables. All equations are analytical, in order to comply with this gradient-based optimization strategy, which imposes the derivability of the models. Several optimization results using different AC inductor solutions (iron powder and ferrite) are compared. The optimized converters were built and tested experimentally to verify their performances. Semiconductor and inductor losses were measured accurately using calorimetric test benches. The optimality of the solutions was carefully verified by changing parameters.

Analysis and Comparison of Hybrid-Resonant Switched-Capacitor DC–DC Converters With Passive Component Size Constraints

This article explores the merits of a variety of hybrid-resonant switched-capacitor (SC) dc–dc converters under strict size constraints on passive components (flying capacitors and inductors). Topologies are compared using a “minimum power loss” figure of merit (FOM) that captures conduction- and frequency-dependent losses in active semiconductor devices and losses related to passive components as they scale with size and relative voltage rating. Similar to past work on pure SC converters, the method leverages a charge-multiplier approach and is used to show the impact of area or volume constraints on inductors and capacitors. Building on past work, considerations for treating both “direct-” and “indirect-” conversion architectures are provided, as well as treatment of converters that require multiple inductors. Common topologies are compared using the generalized FOM under different scaling scenarios; general trends are validated using an experimental prototype.

6.78-MHz Wireless Power Transfer With Self-Resonant Coils at 95% DC–DC Efficiency

Megahertz-frequency inductive wireless power transfer holds the promise of compact and efficient wireless power transfer. Unfortunately, due to high-frequency losses in wide-bandgap semiconductors and low- $Q$ high-frequency coil designs, these systems are universally less efficient, on a dc–dc basis, than wireless power systems operating at conventional frequency regimes. This letter describes the design considerations for inductive wireless power transfer systems operating at 6.78 MHz. With a novel high-frequency resonant amplifier topology, a high- $Q$ self-resonant coil structure, and a better understanding of $C_{oss}$ losses in wide-bandgap power semiconductors, we demonstrate 6.78- MHz wireless power transfer systems that achieve 95% dc–dc efficiency at power levels up to and beyond 1 kW.

Unidirectional Asymmetric Hybrid Nine-Leg Rectifier With Floating H-Bridge Capacitors

This article proposes a unidirectional cascaded topology of a power rectifier. It is composed of a three-leg cell with half-controlled legs series connected with one H-bridge cell per phase. The dc links of the H-bridge cells operate with floating capacitors. The floating capacitor voltages regulation is solved by means of the common-mode voltage manipulation. Control and pulsewidth modulation strategies are presented to regulate the capacitor voltages and grid currents. The design of passive elements is also shown. The topology has its harmonic distortion content, semiconductor losses, and average switching frequency values compared to those of conventional solutions. Experimental results validate the proposed topology and strategy.

Power losses estimation and heat distribution in three-phase inverter using IGBT semiconductors

Power loss estimation is a very crucial step in the design of power inverters and other power converters. In this paper, the estimation of power losses using MATLAB Simulink is presented. This approach allows fast estimation of losses and can lower the design time of the cooling system. With the use of a simulation approach, different parameters can be simulated to estimate losses and design the best cooling solution accurately. Characteristics of the used semiconductor in this case IGBT is used and imported to the electro-thermal simulation. This simulation consists of two main parts. The first component calculates semiconductor losses depends on the provided characteristics of the used device and his temperature. The second model calculates temperature based on the thermal model and losses produced by the first part of the simulation. Results in the form of the losses are implemented to the heat distribution simulation using Fusion 360 to simulate the temperature distribution of the used heatsink.

Six-Leg Single-Phase AC–DC–AC Multilevel Converter With Transformers for UPS and UPQC Applications

This article investigates a single-phase ac–dc–ac multilevel converter composed of two three-leg converters series-connected throughout two transformers (one on the grid side and one on the load side), sharing the same dc-link. The proposed converter allows to feed the load with sinusoidal voltages (keeping constant amplitude and frequency) under grid voltage disturbances, as sags, swells, and harmonics. Besides, the converter can operate with a sinusoidal grid current with a high power factor and can be applied to systems with either equal or different voltage levels at the input and output. Circuit model equations, pulse width modulation (PWM) technique based on space vector approaches, and a control system are presented. The proposed topology is compared with the conventional one in terms of harmonic distortion, semiconductor losses, transformers losses, and total power losses. Simulation and experimental results are presented under the same conditions to validate PWM and control strategies.

Novel Enhanced Modular Multilevel Converter for High-Voltage Direct Current Transmission Systems

This paper proposes an enhanced modular multilevel converter as an alternative to the conventional half-bridge modular multilevel converter that employs a reduced number of medium-voltage cells, with the aim of improving waveforms quality in its AC and DC sides. Each enhanced modular multilevel converter arm consists of high-voltage and low-voltage chain-links. The enhanced modular multilevel converter uses the high-voltage chain-links based on medium-voltage half-bridge cells to synthesize the fundamental voltage using nearest level modulation. Although the low-voltage chain-links filter out the voltage harmonics from the voltage generated by the high-voltage chain-links, which are rough and stepped approximations of the fundamental voltage, the enhanced modular multilevel converter uses the nested multilevel concept to dramatically increase the number of voltage levels per phase compared to half-bridge modular multilevel converter. The aforementioned improvements are achieved at the cost of a small increase in semiconductor losses. Detailed simulations conducted in EMPT-RV and experimental results confirm the validity of the proposed converter.

A Hybrid Three-Level and Modular Multilevel Converter With DC Fault Blocking Capability and Reduced Semiconductor Losses

This article proposes a hybrid three-level converter (H3LC) with AC-side cascaded full-bridge submodules (FBSM) for high voltage direct current (HVDC) transmission. The three-level converter operates at fundamental frequency switching to modulate square-wave output voltages. The AC outputs of the three-level converter are connected to cascaded FBSMs, which shape the square-wave voltages into multilevel sinusoidal voltages at the point of common coupling. Using third-order harmonic voltage injection, the AC-side chainlink voltage can be limited to within a quarter of the DC-side voltage which reduces the number of FBSMs and the associated semiconductor losses. The H3LC is capable of blocking DC pole-to-pole fault using the AC-side FBSMs and the proposed protection branches, each of which consists of a low-loss load-current carrying branch and a main breaker. Simulation studies demonstrate the effectiveness of the proposed converter for independent real and reactive power control as well as DC pole-to-pole fault blocking. Compared to other state-of-the-art HVDC converter topologies with DC fault blocking capability, i.e., the mixed half- and full-bridge modular multilevel converter and the hybrid two-level converter with AC-side cascaded FBSMs, the proposed H3LC provides reduced semiconductor losses due to fundamental frequency switching of the three-level converter and the reduced number of submodules.

Influence of PWM Methods on Semiconductor Losses and Thermal Cycling of 15-kVA Three-Phase SiC Inverter for Aircraft Applications

This paper presents the influence of different pulse width modulation (PWM) methods on losses and thermal stresses in SiC power modules used in a three-phase inverter. The variation of PWM methods directly impacts instantaneous losses on these semiconductors, consequently resulting in junction temperature swing at the fundamental frequency of the converter’s output current. This thermal cycling can significantly reduce the lifetime of these components. In order to determine semiconductor losses, one needs to characterize SiC devices to calculate the instantaneous power. The characterization methodology of the devices, the calculation of instantaneous power and temperature of SiC dies, and the influence of the different PWM methods are presented. A 15-kVA inverter is built in order to obtain experimental results to confirm the characterization and loss calculation, and we show the best PWM methods to increase efficiency and reliability of the three-phase inverter for specific aircraft applications.

Two Novel Open-End Winding Multilevel Unidirectional Six-Phase Rectifiers With Reduced Switch Count

In this article, two new unidirectional multilevel six-phase power rectifier topologies are proposed and investigated. Such topologies may be applied to ac–dc systems such as wind energy conversions systems, aerospace generator drives, telecommunications or any other application where regenerative operation is either not required or prohibited. The first topology is composed of two three-level neutral-point-clamped (NPC) converters connected to the open-end windings of a six-phase permanent magnet synchronous generator, and a three-phase noncontrolled diode bridge converter. The second topology is composed of three modified NPC converters with the substitution of two controlled switches by diodes in each leg. The use of a noncontrolled converter with diodes aims to reduce the controlled switches count, the system complexity, and the costs. However, it makes both systems nonreversible. The system models, operating principles, the space vector pulsewidth modulation strategies, the dc-links balance, and the control system to ensure the elimination of the zero-crossover distortion caused by the use of the diodes are presented. Due to the high number of levels generated, the systems are suitable for high power applications with voltage and current ratings restrictions. A study concerning harmonic distortion and semiconductor losses for both systems is performed, in order to be compared with a standard configuration. The feasibility of the system is demonstrated by simulation and experimental results.

Relating Defect Luminescence and Nonradiative Charge Recombination in MAPbI3 Perovskite Films

Nonradiative losses in semiconductors are related to defects. At cryogenic temperatures, defect-related photoluminescence (PL) at energies lower than the band-edge PL is observed in methylammonium lead triiodide perovskite. We applied multispectral PL imaging to samples prepared by two different procedures and exhibiting 1 order of magnitude different PL quantum yield (PLQY). The high-PLQY sample showed concentration of the emitting defect sites around 1012-1013 cm-3. No correlation between PLQY and the relative intensity of the defect emission was found when micrometer-sized local regions of the same sample were compared. However, a clear positive correlation between the lower PLQY and higher defect emission was observed when two preparation methods were contrasted. Therefore, although the emissive defects are not connected directly with the nonradiative centers and may be spatially separated at the nano scale, chemical processes during the perovskite synthesis promote/prevent formation of both types of defects at the same time.

Ionization-induced annealing in silicon upon dual-beam irradiation

Silicon single crystals were irradiated at room temperature (RT) with single and dual low-velocity (i.e., 900 keV I) and high-velocity (i.e., 27 MeV Fe or 36 MeV W) ion beams in order to study synergistic effects between nuclear and electronic energy losses in semiconductors. The damage created by irradiation was quantified by using Rutherford backscattering spectrometry in the channeling mode and Raman spectroscopy, and it was visualized using transmission electron microscopy. Whereas single low-velocity ion irradiation leads to amorphization of the surface layer of Si crystals, the use of a dual low- and high-velocity ion beam prevents this phase transformation. However, a remaining disorder exists, the level of which depends on the ratio of the high- to low-velocity ion fluxes. The higher the ratio (1.6 in the present case), the lower the disorder level, with a 30% integrated disorder instead of 100% upon single low-energy irradiation. These results provide evidence that ionization-induced disorder annealing can occur at RT in Si.

Comparative study of semiconductor power losses between CSI-based STATCOM and VSI-based STATCOM, both used for unbalance compensation

In this paper, we present a detailed procedure to determine the semiconductor losses for both structures of a shunt STATCOM (Static Compensator), STATCOM based on Current Source Inverter (CSI) and STATCOM based on Voltage Source Inverter (VSI), both used for voltage unbalance compensation. As a first step, we study the VSI-based STATCOM and the CSI-based STATCOM used in high speed railway substations. Then we analyze the design and the sizing of the unbalance compensator in order to obtain an unbalance factor that does not exceed the limits imposed by the standards or by the energy provider. Following that, we compare the performances obtained with both structures VSI-STATCOM and CSI-STATCOM, after calculating the semiconductor power losses in the STATCOM converters. Finally, we validate our approach by simulation over real data of unbalance compensation caused by the new high-speed railway in Morocco. We use the tools MATLAB / Simulink/Simpowersys for performing our simulations.

Generalised representation of multi‐terminal VSC‐HVDC systems for AC–DC power flow studies

This study presents a generalised representation of voltage source converter (VSC) based high voltage direct current (HVDC) systems appropriate for power flow studies using the Newton–Raphson method. To reach this aim, the active loads and ideal synchronous machines are employed in order to incorporate both converter losses and power balance, respectively. Also, considering different aspects of computer implementation, the proposed solution method uses the conventional Newton–Raphson method. The proposed representation considers practical restrictions, switching and conduction losses of semiconductors, and different control strategies for VSC-HVDC stations. Moreover, the proposed generalised representation of VSC-HVDC systems can be easily extended to incorporate the multi-terminal VSC-HVDC grids in an efficient manner. To investigate the application of the proposed representation for VSC-HVDC systems and load flow solution, three test systems including the standard IEEE 30 bus and IEEE two area RTS-96 networks are used and discussion on results is provided. Results show that the proposed algorithm is able to solve AC–DC power flow problems very efficiently with considerably less time in comparison to other existing algorithms.