High Volume Semiconductor Manufacturing Research Articles

Step and Flash Imprint Lithography for Semiconductor High Volume Manufacturing

Step and Flash imprint lithography (SFIL) has reached a critical point in its development life cycle. Resolution and image fidelity have been well established, and progress is being made on both the process and template fronts. This simple technique has the potential to become the next generation lithography (NGL) choice for semiconductor manufacturing. Yet, despite the positive outlook, SFIL has very little industry support. Concerns about defectivity, throughput, overlay, template cost, infrastructure, and a host of other critical issues are legitimate. More important, however, is the severe shortage of publicly available data on SFIL for semiconductor applications, giving the false impression that it is still in its infancy. This paper discusses the current status of SFIL and shows where industry collaboration is needed to solve the critical issues and demonstrate that it is a viable NGL technology.

Z ピンチ放電プラズマ EUV 光源

Presently high energy-density plasmas produced by gas discharges (DPP) are the most powerful EUV source for the next generation’s high volume semiconductor manufacturing(HVM). This paper describes the radiation process in Z-pinch plasmas based on non-equilibrium ionization process and the fundamental Z-pinch plasma physics. Several schemes to control the pinching process and plasma parameters are shown. Also the present status of EUV sources developments and the critical issues to develop the DPP based EUV sources are discussed.

Dynamic models of production with multiple operations and general processing times

Traditional integer programming model formulations for job-shops and flow-shops do not easily account for characteristics common to high-technology manufacturing such as high-volume semiconductor manufacturing. These characteristics are: (1) products (wafers) are processed by the same machine type more than once during the operation sequence, (2) many lots of similar type are run, and (3) there can be multiple machines of the same type. In this paper, we present two new integer programming formulations which easily account for these characteristics. The approach is based on restricting the allowed domain of events for the start of lot processing. The first model restricts production starts to the beginning of a planning time period. The second model uses a special time grid at each operation with width equal to the processing time, and allows starts to be scheduled at the grid points. In an example problem replicating a high-volume wafer fabrication process, it is shown that it is computationally practical to obtain solutions for the restricted start models where it is not computationally possible for the traditional integer programming model formulations.