Semiconductor Equipment And Materials International Research Articles

Developing a Monitoring System for Wire Bonders Using Semiconductor Equipment and Materials International (SEMI) Equipment Communications Standard Sensors

Developing a Monitoring System for Wire Bonders Using Semiconductor Equipment and Materials International (SEMI) Equipment Communications Standard Sensors

Tracer Gas Test and CFD Analysis of Semiconductor Gas Box for Flammable Gas Leakage

Semiconductor manufacturing is performed through unit processes that use various chemicals and facilities. In particular, flammable gases, such as H2, NH3, and CH4, are used, and there is a risk of explosion when such gases leak. In this study, computational fluid dynamics (CFD) simulation and a “tracer gas test” according to the SEMI (Semiconductor Equipment and Materials International) S6 Environmental, Health, and Safety Guideline for Exhaust Ventilation of Semiconductor Manufacturing Equipment specification were performed during the leakage of hydrogen, a highly flammable gas used in the etching process of a gas box in the semiconductor industry. The CFD simulation was conducted to investigate the safety of semiconductor production facilities in relation to the explosion risk. Flow analysis was performed for the interior of a gas box used in the etching process. A steady-state analysis was performed to predict the concentration range of the explosion limit in the case of continuous hydrogen gas leakage. The interior of the gas box used in the simulation was modeled, and the ventilation flow rate, which has a significant impact on the leakage gas concentration distribution, obtained from experiments was used. The lower flammability limit (LFL) value of the leaked gas was 4% based on H2, and LFL/4 (25% of the LFL) was analyzed as the explosion limit concentration according to the acceptance criteria of the SEMI S6 tracer gas test. To validate the CFD simulation, a tracer gas test was performed according to SEMI S6. A mixture of hydrogen (5%) and nitrogen (95%) was used as the tracer gas. The flow rate was controlled by a gas regulator valve and measured using an Aalborg mass flow meter. The measured concentration of the tracer gas was calculated using the equivalent release concentration, which was calculated when 100% of the hydrogen was released, and the risk was assessed by comparing it with the LFL/4 of H2.

Modeling and simulation of workpiece surface flatness in magnetorheological plane finishing processes

Multi-pole arrangements in magnetorheological plane finishing technology have been investigated in this study. A method of combining the material removal mechanism of micro-points using the empirical Preston equation is proposed to establish a prediction model for surface flatness, and the new Semiconductor Equipment and Materials International (SEMI) standard has been used to evaluate workpiece surface flatness. Based on the model, the effects of process parameters (polishing time, speed ratio, translational amplitude, polishing gap, etc.) on the flatness of workpieces with different shapes are predicted through simulation, and the effects of multi-pole arrangements are explored. The results of the analysis indicate that with changes in process parameters, the extent of change in surface flatness differs based on the shape of the workpiece. After polishing, concave workpieces show the highest levels of surface flatness. From simulations of magnetic pole arrangements, it is also found that magnetic field generators with different magnetic pole arrangements can be used for workpieces with different shapes to improve their surface flatness. Experiments with a workpiece with its shape measured using a white light interferometer showed that the surface flatness improved from being 33.561 μm initially to 21.822 μm after polishing, thereby demonstrating the effectiveness of the proposed method.

Assessment of the SEMI energy conversion factor and its application for semiconductor and LCD fabs

High-tech fabrication plants (called fabs) generally use a lot of energy, for example, yearly energy consumption might reach 215GWh for a 3.5-generation small/medium-size TFT-LCD panel fab with a monthly yield of 75,000 pieces and a clean room area of 59,760m2[1]. The process tools use electricity directly during their operation and also consume energy indirectly through other facilities (such as the exhaust, clean dry air, and process cooling-water systems). The organization Semiconductor Equipment and Materials International (SEMI) issued guidelines (called SEMI S23) for energy, electricity, and production conservation by facility systems. In this study, a calculator was developed to provide the energy conversion factors (ECFs) needed in a fab. The results show that most of the ECF values estimated by the new calculator are very close to the values reported in the SEMI S23-0813, while applying the same operating conditions. Most importantly, with the new calculator, it is possible to understand better the detailed contribution of each variable to the energy consumption of each sub-system in the fab. The new ECF calculator eliminates one drawback of the SEMI S23-0813, the inability to objectively compare results for different industries, or under different operating conditions. The new ECF calculator can be used as a straightforward tool for energy-saving tasks or for new-fab design. Moreover, this new calculator was successfully employed to analyze in detail the energy consumption of three high-tech fabs (for manufacturing semiconductors and LCDs). The ECFs reported in the present study can be considered normalized results because those factors are actually the energy consumption of a sub-system per unit volume flow rate (and unit temperature degree).

Implementation of Generic Equipment Model (E30 Standard) for Semiconductor Equipment and Materials International (SEMI) automation tool

The Semi Equipment Communication standard (SECS) defines a communication interface suitable for the exchange of messages between semiconductor processing equipment intended for wafer manufacturing, wafer processing and a host. This standard provides a means to communicate between different equipment without knowledge of their protocols. SECS is a layered protocol, which helps to understand meaning of messages between semiconductor processing element and host. Implementation of SECS standard will provide solution for making changes in automation software for complete process. This paper proposes a scientific and systematic approach to the design and development of a universal equipment interface by taking enterprise integration and cutting-edge technology requirements into consideration. In this paper, implementation of Alarm Management standard (E-30) under GEM (Generic Equipment Model for communication and control) layer is discussed. It is one of the layers of SECS Standard. GEM defines equipment behaviors and methods to communicate and control. GEM features in the equipment conforming to SEMI E30 standard. Key words: Semi Equipment Communication standard (SECS), Generic Equipment Model (GEM), Semiconductor Equipment Materials International (SEMI).

L’envahissement du cartilage thyroïde par les carcinomes épidermoïdes du larynx et de l’hypopharynx. Corrélation anatomopathologique et tomodensitométrique. Influence de l’envahissement sur la statique de l’angle thyroïdien

The chemicals and materials used to manufacture and package semiconductors and printed circuit boards are called electronic chemicals. The purity of these electronic chemicals, given by the industry association Semiconductor Equipment and Materials International (SEMI), is a very compromising concern for the semiconductor industrial sector, so very strict requirements are set to avoid microelectronic devices failures because of the content of impurities of electronic chemicals. For the particular case of hydrogen peroxide as one of the most consumed wet electronic chemicals, SEMI Document C30-1110 indicates five different electronic grades defined by their limiting impurities content.The semiconductor industry is appearing as an emerging application of reverse osmosis membranes based processes. After reviewing the patents published over the last twenty years about ultrapurification for industrial production of high purity electronic grade hydrogen peroxide, the referenced separation techniques can be replaced by reverse osmosis with lower operating expenses due to energy and chemicals. This work proposes a membrane process design based on an integrated countercurrent membrane cascade, in order to determine the optimum osmosis cascade for each SEMI Grade hydrogen peroxide, with the economic profit as the objective function in the optimization strategy. The results show the benefits of the reverse osmosis process, with profit values of 20–85 million $/year, for a target annual production of 9000 tons of electronic hydrogen peroxide, requiring the integrated reverse osmosis cascades of two stages for the production of Grade 1 to seven stages for the strictest Grade 5.

Design of Digital Filters for Si Wafer Surface Profile Measurement - Denoising by Total Variation

In the semiconductor industry, high resolution and high accuracy measurement is needed for the geometric evaluation of Si wafers. The flatness parameters are important to evaluate the wafer profile and are required to be the same level as the design rule of IC, and the tolerance for flatness is very tight. According to SEMI (Semiconductor Equipment and Materials International) standards, the required wafer flatness will be 22 nanometres by the year 2016. However, to obtain a higher resolution for sensors, the uncertainty becomes very large compared to the resolution and influences the measured data when the noise is increased. High resolution instruments always incorporate a certain degree of noise. In the presence of noise, form parameters are normally biased. Correction and compensation need a large population of measurements to analytically estimate both bias and uncertainty. The estimation is still far from perfect because of the nature of noise. Another approach is to extract a true profile by filtering noise from the measured data. For the purpose of noise reduction, low-pass filters by Gaussian smoothing and Fourier transform are often used. The noise is normally considered to be a component of small deviation (amplitude) with high frequency which also takes a normal distribution around zero. However these conventional filters can remove the noise in the spatial frequency domain only. So, it is essential to design a filter capable of removing the noise both in the spatial frequency domain and the amplitude component. Thus, we have designed and developed new type of digital filter for denoising. We introduce two new digital filters. One is wavelet transform capable of denoising in the spatial frequency domain and amplitude component, and the other is total variation that can be applied to discontinuous signals without introducing artificial Gibbs Effects.

Integrated countercurrent reverse osmosis cascades for hydrogen peroxide ultrapurification

The chemicals and materials used to manufacture and package semiconductors and printed circuit boards are called electronic chemicals. The purity of these electronic chemicals, given by the industry association Semiconductor Equipment and Materials International (SEMI), is a very compromising concern for the semiconductor industrial sector, so very strict requirements are set to avoid microelectronic devices failures because of the content of impurities of electronic chemicals. For the particular case of hydrogen peroxide as one of the most consumed wet electronic chemicals, SEMI Document C30-1110 indicates five different electronic grades defined by their limiting impurities content.The semiconductor industry is appearing as an emerging application of reverse osmosis membranes based processes. After reviewing the patents published over the last twenty years about ultrapurification for industrial production of high purity electronic grade hydrogen peroxide, the referenced separation techniques can be replaced by reverse osmosis with lower operating expenses due to energy and chemicals. This work proposes a membrane process design based on an integrated countercurrent membrane cascade, in order to determine the optimum osmosis cascade for each SEMI Grade hydrogen peroxide, with the economic profit as the objective function in the optimization strategy. The results show the benefits of the reverse osmosis process, with profit values of 20–85 million $/year, for a target annual production of 9000tons of electronic hydrogen peroxide, requiring the integrated reverse osmosis cascades of two stages for the production of Grade 1 to seven stages for the strictest Grade 5.

Fire Safety Assessment Research for High-Tech Plants

Most of the buildings for high-tech plants are fireproof and the process equipment in the clean room is in compliance with high-standard fire prevention evaluation regulations such as National Fire Prevention Association (NFPA), Factory Mutual (FM),and Semiconductor Equipment and Materials International (SEMI). However, fire management is usually neglected though fire protection higher than domestic fire control regulations is applied. Fireproof and smoke-proof design of the original buildings can be damaged due to expansion of production facilities, causing a potential danger of a fire. Cases of fires in domestic semiconductor manufacturing factories were explored in this research and claim settlements provided by MSIG Mingtai InsuranceCo.,Ltd., Taiwan to high-tech plants were analyzed for determination of the quantified weights used by the insurance companies when evaluating fire risks of a building. The fire safety badge promoted by Architecture and Building Research Institute, and Ministry of the Interior was also discussed for reference of fire safety assessments of high-tech factory buildings in the future.

Ultrapurification of hydrogen peroxide solution from ionic metals impurities to semiconductor grade by reverse osmosis

The present research is centred upon the application of reverse osmosis to the ultrapurification of aqueous hydrogen peroxide (35%, w/w). Semiconductor Equipment and Materials International (SEMI) organization develops the globally most respected standards to establish the quality requirements for the chemicals used in this sector; one of these standards, SEMI C30 is proposed for hydrogen peroxide. Electronic grade hydrogen peroxide accounts for sub-ppm metallic impurity levels (sub-ppb concentrations are required for the most exigent grades), so various elements present as impurities in technical grade hydrogen peroxide exceed the fixed limits. A preliminary experimental study was carried out with a laboratory-scale facility (flat-sheet membrane unit) with 6 different commercial reverse osmosis membranes in order to choose the most appropriate one for hydrogen peroxide ultrapurification. BE membrane (manufactured by Woongjin Chemical) was selected for further viability study because of its higher permeate flux (1.95 × 10 −5 m 3/m 2 s at 40 bar) and metal rejections values (ranging from 0.825 for B to 0.961 for Cu). The Kedem–Katchalsky model resulted as the most representative for characterizing the selected membrane behaviour as it achieved a percentage of overall variation explained upper than 94%.

MEMS Young's Modulus and Step Height Measurements With Round Robin Results.

This paper presents the results of a microelectromechanical systems (MEMS) Young’s modulus and step height round robin experiment, completed in April 2009, which compares Young’s modulus and step height measurement results at a number of laboratories. The purpose of the round robin was to provide data for the precision and bias statements of two \\ related Semiconductor Equipment and Materials International (SEMI) standard test methods for MEMS. The technical basis for the test methods on Young’s modulus and step height measurements are also provided in this paper.Using the same test method, the goal of the round robin was to assess the repeatability of measurements at one laboratory, by the same operator, with the same equipment, in the shortest practical period of time as well as the reproducibility of measurements with independent data sets from unique combinations of measurement setups and researchers. Both the repeatability and reproducibility measurements were done on random test structures made of the same homogeneous material.The average repeatability Young’s modulus value (as obtained from resonating oxide cantilevers) was 64.2 GPa with 95 % limits of ± 10.3 % and an average combined standard uncertainty value of 3.1 GPa. The average reproducibility Young’s modulus value was 62.8 GPa with 95 % limits of ± 11.0 % and an average combined standard uncertainty value of 3.0 GPa.The average repeatability step height value (for a metal2-over-poly1 step from active area to field oxide) was 0.477 μm with 95 % limits of 7.9 % and an average combined standard uncertainty value of 0.014 μm. The average reproducibility step height value was 0.481 μm with 95 % limits of ± 6.2 % and an average combined standard uncertainty value of 0.014 μm.In summary, this paper demonstrates that a reliable methodology can be used to measure Young’s modulus and step height. Furthermore, a micro and nano technology (MNT) 5-in-1 standard reference material (SRM) can be used by industry to compare their in-house measurements using this methodology with NIST measurements thereby validating their use of the documentary standards.

Design of Digital Filters for Si Wafer Surface Profile Measurement - Noise Reduction by Wavelet Transform -

Recently in semiconductor industry, production of ever flatter, thinner and larger silicon wafers are required to fulfill the demands of high-density packaging and cost reduction. In geometric evaluation of Si wafers, according to SEMI (Semiconductor Equipment and Materials International) standards, the required wafer flatness approaches to the 22 nanometers by year 2016 [1]. For such application, uncertainty of measured data is encountered as a severe problem because high resolution instrument always incorporate a certain degree of noise. In order to precisely evaluate the wafer profile, it is essential to remove the noise from the measured data. Described in this paper is design and development of digital filters for denoising. Compared to the conventional low-pass filters, the developed filter by use of wavelet transform not only provides better performance of decomposition in the spatial frequency domain, but also offers the new capability of denoising in amplitude domain.

Design of Digital Filters for Si Wafer Surface Profile Measurement – Noise Reduction by Lifting Scheme Wavelet Transform

Recently in semiconductor industry, production of ever flatter, thinner and larger silicon wafers are required to fulfill the demands of high-density packaging and cost reduction. In geometric evaluation of Si wafers, according to SEMI (Semiconductor Equipment and Materials International) standards, the required wafer flatness approaches to the 22 nanometers by year 2016 [1]. For such application, uncertainty of measured data is encountered as a severe problem because the requirement has met the limit of available instrument in terms of resolution and reliability. In order to precisely evaluate the wafer profile, it is essential to remove the noise from the measured data. Described in this paper is design and development of digital filters for denoising. In previous paper, digital filters for denoising with Haar wavelet transform are described. In this paper, the new filters by use of 2nd generation wavelet transform (lifting scheme) are proposed and show better performance of decomposition in the spatial frequency domain and amplitude domain.

Machine Vision Inspection Method of Mura Defect for TFT-LCD

The automatic machine vision inspection way is studied for the Mura defect of TFT-LCD,aiming at the importance of defect inspection and the shortcoming of manual inspection in liquid crystal display (LCD) process.Mura is local lightness variation with low contrast,blurry contour,uneven brightness and textured background.Based on the Semiconductor Equipment and Materials International (SEMI) standard for Mura and the LCD vision inspection platform,the inspection algorithms are researched,including the textured background suppression method using real Gabor filtering,the adjustment of brightness unevenness with homomorphic transform and independent component analysis,the Mura segmentation using active contour model and level set method and the Mura quantification based on SEMI standard.The automatic inspection process is set up by synthesizing the researches proposed above.The inspection experiments show that the proposed method can suppress the textured background,eliminate the unevenness and moire fringe in background,accurately segment defects and carry out quantitative evaluation.The proposed method is applicable to automatic inspection of Mura defect with good robustness and similar to vision characteristic of human eyes.And,for 50 LCD samples,48 samples are inspected accurately.

Robust wafer identification recognition based on asterisk-shape filter and high-low score comparison method

Wafer identifications (wafer ID) can be used to identify wafers from each other so that wafer processing can be traced easily. Wafer ID recognition is one of the problems of optical character recognition. The process to recognize wafer IDs is similar to that used in recognizing car license-plate characters. However, due to some unique characteristics, such as the irregular space between two characters and the unsuccessive strokes of wafer ID, it will not get a good result to recognize wafer ID by directly utilizing the approaches used in car license-plate character recognition. Wafer ID scratches are engraved by a laser scribe almost along the following four fixed directions: horizontal, vertical, plus 45 degrees , and minus 45 degrees orientations. The closer to the center line of a wafer ID scratch, the higher the gray level will be. These and other characteristics increase the difficulty to recognize the wafer ID. In this paper a wafer ID recognition scheme based on an asterisk-shape filter and a high-low score comparison method is proposed to cope with the serious influence of uneven luminance and make recognition more efficiently. Our proposed approach consists of some processing stages. Especially in the final recognition stage, a template-matching method combined with stroke analysis is used as a recognizing scheme. This is because wafer IDs are composed of Semiconductor Equipment and Materials International (SEMI) standard Arabic numbers and English alphabets, and thus the template ID images are easy to obtain. Furthermore, compared with the approach that requires prior training, such as a support vector machine, which often needs a large amount of training image samples, no prior training is required for our approach. The testing results show that our proposed scheme can efficiently and correctly segment out and recognize the wafer ID with high performance.

Purification of dilute hydrofluoric acid by commercial ion exchange resins

This paper describes the results from an experimental study of the purification of dilute hydrofluoric acid (5 wt.%) by ion exchange. Hydrofluoric acid was prepared by dilution from technical grade concentrated HF; important amounts of metal impurities were found in the diluted acid, mainly Na, Fe, As, B, Ca, K, Mg, Mn, Mo, PO 4 3−, and Ti. The semiconductor industry developed the Semiconductor Equipment and Materials International (SEMI) standards to establish the quality requirements for the chemicals used in this sector; one of these standards, SEMI C29 was proposed for 4.9 wt.% HF. Grade 2 HF accounts for impurity levels in the range of 10 ppb. Taking into account this reference, 17 impurities exceed the limits of the standard: Al, As, B, Ca, Cu, Fe, K, Li, Mg, Mn, Mo, Na, Ni, Ti, Zn, Zr and PO 4 3−. The purification was performed with two columns containing commercial cation and anion resins from Dow, Bayer and Rohm and Haas companies. Different resin samples were immersed in 5 wt.% HF at different contact times up to 30 days in order to determine any weight change due to chemical attack; no weight losses were detected, however the weight of the two weak anion resins increased more than 20% indicating the interaction between these resins and HF. The metal pollutants were found in both cationic and anionic forms, due to the high concentration of fluoride, and its ability to form cationic and anionic complexes; the speciation of impurities was calculated using the Visual Minteq software. The results from the purification experiments show that 14 of 17 impurities fulfill the requirements of the standard C29, Grade 2. The limits of Al, B, Cu, Li, Mn, Mo, Ni, Ti, Zn and Zr are easily attained, while the concentration of K, Mg and Ca are very close to the limits. As, Fe and PO 4 3− were poorly retained in the resins and their concentrations exceed the limits of Grade 2; more selective resins need to be investigated to reduce the concentration of these impurities in HF matrices. In the case of Na, although removal was higher than 95%, the limit was exceeded due to the high initial concentration.

Evaluating the 300 mm wafer-handling task in semiconductor industry

The semiconductor industry is moving from the production of 200mm wafers to 300mm wafers. With the increase in wafer size, the workload of wafer handling tasks is also increasing. This study evaluated the operator's handling capability, and the risk of having musculoskeletal disorders (MSDs) for handling 300mm wafers. Twenty-four female operators from a semiconductor manufacturing company participated in the experiment. Subject’s psychophysical, and physiological responses were measured. Posture analysis and biomechanics analysis were also conducted to evaluate the local strain at different joints. The results suggest that loading and unloading front opening universal pod (FOUP) at 90/90cm is best for enhancing handling capability, wrist posture, and minimizing L5/S1 compression force. About 30% of the operator's FOUP handling capabilities were lower than the safe load limit (25%ile Maximal alleptable weight of lift) recommended by SEMI (Semiconductor Equipment and Materials International). Handling wafers at 90/125 tends to increase the risk of causing shoulder and wrist injuries. Handling wafers at 90/35 tends to induce greater strength loading at hip joint, and cause greater wrist radial deviation. To minimize the risk of having MSDs, countermeasures such as training appropriate method of FOUP handling, minimizing manual carrying, specifying ergonomic machine equipment interface, and assigning male operators for high frequency FOUP handling tasks were proposed. Positive feedbacks are obtained. Relevance to industryThe results of this study provided useful information to improve the design of 300mm wafer handling task, which enhanced the safety and health of operators in the semiconductor manufacturing workplace.

An object-based controller for equipment communications in semiconductor manufacturing

Traditionally, all the conventional semiconductor equipment must comply with the semiconductor equipment and materials international (SEMI) semiconductor equipment communication standard/generic equipment model (SECS/GEM) standards to interface with the cell controllers of a legacy manufacturing execution system (MES). In 1998, SEMATECH developed the computer integrated manufacturing (CIM) framework specification to facilitate the creation of an integrated, common, flexible, modular object model leading to an open, multi-supplier CIM system environment in the semiconductor industry. Later, SEMI developed an object-based equipment model (OBEM) standard to take full advantage of the CIM framework. With OBEM, the equipment can communicate with the CIM framework directly by method invocation. This work develops an OBEM-compliant object-based equipment (OBE) in the framework environment, so that this equipment can directly communicate with the MES by method invocation without using the SECS/GEM protocol. The unified modeling language is adopted as the major tool for analyzing and developing the target system. A SECS/GEM adapter is also added on the OBE to enable the OBE to communicate with a legacy factory that uses SECS/GEM standards as the communication protocol. A die bonder is used as an example for development demonstrations.

Experimental study of electron beam projection lithography mask defect printability

Mask defect printability of electron beam projection lithography (EPL) was investigated. We fabricated EPL chip reticles including programmed defects. The design of these programmed defects was based on semiconductor equipment and materials international (SEMI) standards, but we modified it from the original to a new design for the 100–70 nm node. In our defect printability experiment, Nikon’s electron beam (EB) projection experimental column was used as an exposure tool with those chip reticles. The acceleration voltage of the electron beam was 100 kV. In the case of the “size shift” defects, the correlation between the defect size on the reticle (×1/4) and the critical dimension (CD) change on the wafer is linear and the defect down to 40 nm was printed. Furthermore mask error enhancement factor is nearly equal to 1. This is the advantage of the EPL over the optical lithography. On the other hand, in the case of “dot” defects, defects smaller than 100 nm on the reticle has a small impact on the CD change. The allowable defect size with a criterion of a given ΔCD became larger at the defocus condition.

TIDE TURNS FOR ELECTRONIC CHEMICALS

THE USUALLY HIGH-FLYING SEMIconductor industry is in a severe downturn, and companies that supply it with chemicals and other key raw materials are taking a similar dive. The mood at the recent Semicon trade show in San Francisco reflected this turn of events, brought about largely by the sudden crash in the Internet and telecommunications equipment sectors. Chemical company executives at Semicon seemed resigned to several quarters of poor results and said they plan to use the respite to develop new products and push into particularly fast-growing fields such as chemical mechanical planarization (CMP) polishing slurries and low-k dielectrics. After staying strong through the end of 2000 and even into the first quarter of this year, sales of chemicals and gases to the semiconductor industry are now off sharply Dan P. Tracy, senior market analyst for industry research and statistics at Semiconductor Equipment and Materials International (SEMI), Semicon's sponsor, told ...