Schottky Barrier Carbon Nanotube Field Effect Transistor Research Articles

Modified Schottky Barrier CNTFET with lightly doped drain

For the first time, a modified Schottky barrier carbon nanotube field-effect transistor (SB-CNTFET) with lightly doped drain (LDD) has been proposed. The newly designed CNTFET benefits from the advantages of both SB in source and the lightly doped ohmic drain contact. Simulations are based on two-dimensional non-equilibrium Green's function solved self-consistently with Poisson's equation. To get to an improved electrical characteristic, comparisons have been made among four CNTFET structures which are conventional SB-CNTFETs, triple LDD-CNTFET (TLDD-CNTFET), double LDD-CNTFET and Schottky source and ohmic drain CNTFET. The results show that the TLDD-CNTFET design decreases the leakage current significantly and increases on–off-current ratio as well as the cut-off frequency. It is also demonstrated that TLDD-CNTFET structure possesses three perceivable steps in the potential profile of the channel, which leads to additional lateral electric field peaks inside the channel and thus improve the immunity against short-channel effects. The important parameters such as transconductance, on–off ratio, subthreshold swing, cut-off frequency, delay and drain-induced barrier lowering of the CNTFETs have been calculated and discussed. Results show that by using lightly doped regions in the drain of SB-CNTFETs, the dc and ac characteristics have been considerably improved compared with the conventional SB-CNTFET.

Design and analysis of electrostatic doped Schottky barrier CNTFET based low power SRAM

In recent years, much emphasis is given for low power memory design by reducing leakage power. Carbon nanotube field effect transistor (CNTFET) based static random access memory (SRAM) provides better stability along with low static power consumption due to variable bandgap and threshold voltage as function of diameter. Electrostatic doped Schottky barrier carbon nanotube field effect transistor (ED-SBCNTFET) accounts for much low leakage current and hence can be used for low power SRAM design. This paper proposes a novel design of ED-SBCNTFET based low power SRAM which consists of additional polarity gates. 6-T SRAM cell is designed and simulated in HSPICE for both conventional CNTFET and ED-SBCNTFET. SRAM performance is analyzed on the basis of various figures of merit i.e. stability and power dissipation. ED-SBCNTFET SRAM shows advantage of low power over conventional CNTFET SRAM without loss of stability. Furthermore, SRAM is designed for smaller diameter which gives ultra low power cell with minute change in stability. Lastly dual chirality scheme is implemented and analyzed for ED-SBCNTFET 6-T SRAM cell.

Modeling and performance analysis of Schottky barrier carbon nanotube field effect transistor SB-CNTFET

The performance of a Schottky barrier carbon nanotube field effect transistor (SB-CNTFET) has been analyzed by means of a compact model. We present a study of the physical and geometrical parameters and their effects on the static and dynamic performance of the SB-CNTFET. For the static regime, we determine the variations in the current–voltage characteristics for three values of the potential barrier and the influence of the barrier on the on-state current. Also, we report the effect of the oxide thickness on the static performance. The relationship between the current–voltage characteristics and the nanotube diameter for different values of drain–source voltage is investigated. For dynamic systems, we study the effect of the gate–source voltage, the chirality and the CNT diameter on the transition frequency. It has been observed that the performance of the SB-CNTFET can be significantly controlled by changing some physical and geometrical parameters of the device.

Performance and electrical characteristics of hybrid carbon nanotube field effect transistors

The performance and electrical characteristics of hybrid carbon nanotube field effect transistor (CNTFET) are studied. Hybrid CNTFET consists of heavily doped carbon nanotube (CNT) as a one contact connected to intrinsic CNT as a channel. The opposite side of the channel is connected to a metal as the other contact. If the source is the metal and the drain is the heavily doped, this type is called metal–semiconductor hybrid CNT or MSH-CNTFET. While when the source is the heavily doped and the drain is the metal, this is called semiconductor–metal hybrid CNT or SMH-CNTFET. The electrical characteristics of the device has been studied using a two-dimensional (2D) quantum mechanical simulator by solving 2D Poisson's equation self consistently with Non-equilibrium Green function (NEGF). The proposed devices are found to overcome the ambipolar conduction of Schottky barrier CNTFETs and improve frequency performance of metal–oxide–semiconductor CNTFETs.

Circuit Compatible Model for Electrostatic Doped Schottky Barrier CNTFET

This paper proposes a circuit compatible model for electrostatic doped Schottky barrier carbon nanotube field effect transistor (ED-SBCNTFET). The proposed model is an extension of the Schottky barrier carbon nanotube field effect transistor (SBCNTFET) to ED-SBCNTFET by adding polarity gates, which are used to create electrostatic doping. In ED-SBCNTFET, electrostatic doping is responsible for a fermi level shift of source and drain regions. A mathematical relation has been developed between fermi level shift and polarity gate bias. Both current–voltage (I–V) and capacitance–voltage (C–V) characteristics have been efficiently modeled. The results are compared with the reported semi-classical model and simulations from NanoTCAD ViDES for validation. The proposed model is much faster than numerical models as it denies self consistent equations. Finally, circuit application is demonstrated by simulating inverter using the proposed model in HSPICE.

Effect of Gate Dielectric on Ballistic Transport of Cylindrical Carbon Nanotube MOSFET

Carbon NanoTube (CNT) channel promises near ballistic transport and is examined extensively for potential application in next-generation Nano-scale transistor. Cylindrical gate-all-around CNT field effect transistor (CNTFET) with semiconducting CNT S/D contacts and Schottky barrier CNTFET (SBCNTFET) are modeled numerically based on self-consistent solution of Poisson-Schrödinger equation with open boundary conditions within Non-Equilibrium Green’s Function formalism considering coaxial symmetry. The effect of dielectric constant (κ) and physical thickness of gate dielectric on transport characteristics of CNTFET and SBCNTFET are examined in this work. Gate capacitance, carrier injection velocity, current and therefore speed increases significantly with the inclusion of high κ dielectric and decrease in thickness. SBCNTFET also shows better performance with thin high κ dielectric layer. High trans-conductance and much lower Sub-threshold swing is visible with the inclusion of high κ gate stack.

Investigation of Schottky–Barrier carbon nanotube field-effect transistor by an efficient semi-classical numerical modeling

An efficient semi-classical numerical modeling approach has been developed to simulate the coaxial Schottky-barrier carbon nanotube field-effect transistor (SB-CNTFET). In the modeling, the electrostatic potential of the CNT is obtained by self-consistently solving the analytic expression of CNT carrier distribution and the cylindrical Poisson equation, which significantly enhances the computational efficiency and simultaneously present a result in good agreement to that obtained from the non-equilibrium Green's function (NEGF) formalism based on the first principle. With this method, the effects of the CNT diameter, power supply voltage, thickness and dielectric constant of gate insulator on the device performance are investigated.

Noise analysis of coaxial Schottky barrier carbon nanotube fets using non equilibrium Green’s function formalism

AbstractThe effect of noise on the performance of Schottky Barrier Carbon Nanotube Field Effect Transistors (SB-CNTFETs) has been investigated under various bias conditions. In order to calculate the noise power spectral density, the Non-Equilibrium Green’s Function formalism (NEGF) is used to obtain the transmission coefficient and the number of carriers inside the channel. Results are presented in two sections: In the first section the Hooge’s empirical rule is used to investigate the flicker noise properties of SB-CNTFETs with defects in the gate oxide region, while in the second section the thermal and shot noise properties of SB-CNTFETs are studied. Finally, the best bias points in the ON and OFF states have been suggested according to the total noise power spectral density and the device signal to noise ratio.

Simulation Study of the Scaling Behavior of Top-Gated Carbon Nanotube Field Effect Transistors

Device simulations on three-dimensional top-gated carbon nanotube field effect transistors (CNTFETs) have been performed by considering the quantum transport described in the framework of non-equilibrium Green's function method. Device characteristics of various top-gated CNTFETs, such as Schottky-barrier CNTFETs, CNTFETs with doped source and drain, and tunnel-FET-like CNTFETs, have been examined, focusing on their scaling behavior as the channel length is ultimately reduced down to a few nanometers. Comparison with coaxially-gated devices is also made.

Ballistic transport in Schottky barrier carbon nanotube FETs

Simulation of Schottky barrier carbon nanotube field effect transistors (SB-CNTFETs) is presented to yield the electrostatic potential, carrier concentration and current within the device. The simulator is based on a self-consistent solution of Poisson's equation and the carrier transport equation. The finite element method is used for solving Poisson's equation while the non-equilibrium Green's function formalism is used to model the carrier transport. The developed simulator is used to investigate the effects of device parameters on device performance.

CNTFET Modeling and Reconfigurable Logic-Circuit Design

This paper examines aspects of design technology required to explore advanced logic-circuit design using carbon nanotube field-effect transistor (CNTFET) devices. An overview of current types of CNTFETs is given and highlights the salient characteristics of each. Compact modeling issues are addressed and new models are proposed implementing: 1) a physics-based calculation of energy conduction sub-band minima to allow a realistic analysis of the impact of CNT helicity and radius on the dc characteristics; 2) descriptions of ambipolar behavior in Schottky-barrier CNTFETs and ambivalence in double-gate CNTFETs (DG-CNTFETs). Using the available models, the influence of the parameters on the device characteristics were simulated and analyzed. The exploitation of properties specific to CNTFETs to build functions inaccessible to MOSFETs is also described, particularly with respect to the use of DG-CNTFETs in fine-grain reconfigurable logic.

Modeling a Schottky-barrier carbon nanotube field-effect transistor with ferromagneticcontacts

In this study, a model of a Schottky-barrier carbon nanotube field-effect transistor(CNT-FET), with ferromagnetic contacts, has been developed. The emphasis is put onanalysis of current–voltage characteristics as well as shot (and thermal) noise. The methodis based on the tight-binding model and the non-equilibrium Green’s function technique.The calculations show that, at room temperature, the shot noise of the CNT-FET isPoissonian in the sub-threshold region, whereas in elevated gate and drain/source voltageregions the Fano factor gets strongly reduced. Moreover, transport properties stronglydepend on relative magnetization orientations in the source and drain contacts. Inparticular, one observes quite a large tunnel magnetoresistance, whose absolute value mayexceed 50%.

A drain current model for Schottky-barrier CNT-FETs

We present here a physics-based drain current model for Schottky-barrier carbon nanotube field-effect transistors. The model captures a number of features exhibited by these transistors such as thermionic and tunnel emission, ambipolar conduction, ballistic transport, multimode propagation and electrostatics dominated by the nanotube capacitance

Switching-speed calculations for Schottky-barrier carbon nanotube field-effect transistors

The switching times and on/off-current ratios are computed for Schottky-barrier carbon nanotube field-effect transistors with different tube diameters and insulator thicknesses. It is indicated that it may be difficult to obtain a device exhibiting both high speed and low leakage current. A small-diameter nanotube with a thin insulator may offer the best compromise. It is also demonstrated that interelectrode capacitances can be large, thereby calling into question the usefulness of the intrinsic switching time as a figure of merit for transistors intended for digital-logic applications. The extrinsic switching time is a more appropriate metric and it is shown here that considerable optimization of the carbon nanotube field-effect transistor will be required to achieve figures better than for modern Si complementary metal-oxide-semiconductor transistors over a reasonable range of on/off-current ratio.

Comparing Carbon Nanotube Transistors—The Ideal Choice: A Novel Tunneling Device Design

Three different carbon nanotube (CN) field-effect transistor (CNFET) designs are compared by simulation and experiment. While a C-CNFET with a doping profile similar to a "conventional" (referred to as C-CNFET in the following) p-or n-MOSFET in principle exhibits superior device characteristics when compared with a Schottky barrier CNFET, we find that aggressively scaled C-CNFET devices suffer from "charge pile-up" in the channel. This effect which is also known to occur in floating body silicon transistors deteriorates the C-CNFET off-state substantially and ultimately limits the achievable on/off-current ratio. In order to overcome this obstacle we explore the possibility of using CNs as gate-controlled tunneling devices (T-CNFETs). The T-CNFET benefits from a steep inverse subthreshold slope and a well controlled off-state while at the same time delivering high performance on-state characteristics. According to our simulation, the T-CNFET is the ideal transistor design for an ultrathin body three-terminal device like the CNFET.

Optimization of Single-Gate Carbon-Nanotube Field-Effect Transistors

The performance of Schottky-barrier carbon-nanotube field-effect transistors (CNTFETs) critically depends on the device geometry. Asymmetric gate contacts, the drain and source contact thickness, and inhomogenous dielectrics above and below the nanotube influence the device operation. An optimizer has been used to extract geometries with steep subthreshold slope and high I/sub on//I/sub off/ ratio. It is found that the best performance improvements can be achieved using asymmetric gates centered above the source contact, where the optimum position and length of the gate contact varies with the oxide thickness. The main advantages of geometries with asymmetric gate contacts are the increased I/sub on//I/sub off/ ratio and the fact that the gate voltage required to attain minimum drain current is shifted toward zero, whereas symmetric geometries require V/sub g/=V/sub d//2. Our results suggest that the subthreshold slope of single-gate CNTFETs scales linearly with the gate-oxide thickness and can be reduced by a factor of two reaching a value below 100 mV/dec for devices with oxide thicknesses smaller than 5 nm by geometry optimization.

Optimization of Schottky barrier carbon nanotube field effect transistors

Carbon nanotube field-effect transistors (CNTFETs) have been studied in recent years as a potential alternative to CMOS devices, because of the capability of ballistic transport. CNTFETs can be fabricated with Ohmic or Schottky type contacts. We focus here on Schottky barrier CNTFETs which operate by modulating the transmission coefficient of carriers through the Schottky barriers at the interface between the metal and the carbon nanotube (CNT). The behavior of these devices has been studied by solving the coupled Schrödinger–Poisson equation system. In agreement with experimental results, simulations indicate the ambipolar behavior of these devices. However, the ambipolar behavior limits the performance of these devices in both on and off regimes. To suppress this effect a double gate structure is proposed. Simulations demonstrate that this structure exhibits improved device characteristics.

Numerical Analysis of Coaxial Double Gate Schottky Barrier Carbon Nanotube Field Effect Transistors

Carbon nanotube field-effect transistors (CNTFETs) have been studied in recent years as a potential alternative to CMOS devices, because of the capability of ballistic transport. The ambipolar behavior of Schottky barrier CNTFETs limits the performance of these devices. A double gate design is proposed to suppress this behavior. In this structure the first gate located near the source contact controls carrier injection and the second gate located near the drain contact suppresses parasitic carrier injection. To avoid the ambipolar behavior it is necessary that the voltage of the second gate is higher or at least equal to the drain voltage. The behavior of these devices has been studied by solving the coupled Schrodinger-Poisson equation system. We investigated the effect of the second gate voltage on the performance of the device and finally the advantages and disadvantages of these options are discussed.

Bipolar conduction and drain-induced barrier thinning in carbon nanotube FETs

The drain current-voltage (I-V) characteristics of Schottky-barrier carbon nanotube field-effect transistors (FETs) are computed via a self-consistent solution to the two-dimensional potential profile, the electron and hole charges in the nanotube, and the electron and hole currents. These out-of-equilibrium results are obtained by allowing splitting of both the electron and hole quasi-Fermi levels to occur at the source and drain contacts to the tube, respectively. The interesting phenomena of bipolar conduction in a FET, and of drain-induced barrier thinning (DIBT) are observed. These phenomena are shown to add a breakdown-like feature to the drain I-V characteristic. It is also shown that a more traditional, saturating-type characteristic can be obtained by workfunction engineering of the source and drain contacts.