ADC Sampling Research Articles

FPGA-based algorithms for feature extraction in the PANDA shashlyk calorimeter

PANDA is one of the four experimental pillars of the upcoming FAIR facility in Darmstadt, Germany. In PANDA, an antiproton beam with an energy between 1.5 and 15 GeV/c will interact in a hydrogen or nuclear target, allowing for studies of various aspects of non-perturbative QCD . Motivated by the high interaction rates and the diverse physics goals of the experiment, a triggerless readout approach will be employed. In this approach, each detector subsystem will be equipped with intelligent front-end electronics that independently identify signals of interest in real time. In order to detect the most forward-directed photons, electrons and positrons in PANDA, a shashlyk-type calorimeter is being constructed. This detector consists of 1512 individual cells of interleaved plastic scintillators and lead plates, and the output signals will be digitised by sampling ADCs and processed in real time by FPGAs. As part of the triggerless approach, these FPGAs will perform so-called feature extraction on the digitised signals, where the pulse-height and time of incoming pulses are extracted in real time. A substantial pile-up rate is expected, and it is foreseen that the chosen algorithm should enable reconstruction of such events. In this work we present the development of a real-time algorithm based on the well known Optimal Filter, which both improves the overall time resolution of the shashlyk detector and allows reconstruction of pile-up events with good time and energy resolution.

New forward hadron calorimeter and hodoscope for the BM@N heavy ions experiment

New forward hadron calorimeter with transverse and longitudinal segmentation has been developed and constructed for the upgraded fixed target BM@N experiment at JINR, Dubna. The main purpose of this calorimeter is to provide event-by-event centrality and reaction plane orientation measurements in nucleus-nucleus collisions. The design of the hadron calorimeter composed of sampling lead/scintillator modules with a beam hole in the center is discussed. The light collection from longitudinal sections in modules is provided by Wave Length Shifting (WLS) fibers embedded in scintillator plates. Micro-pixel photodetectors (Hamamatsu MPPCs) are used for light detection from each longitudinal section of modules. The measured light yield is about 50 photoelectrons per section for MIPs. Sampling ADCs are used for signal readout in the calorimeter. The performance of the FHCAL is discussed. For centrality measurement additional forward quartz hodoscope is developed to measure charge of fragments in the FHCAL beam hole. The method of collision centrality determination is discussed.

Methods of signal processing and cosmic muon calibration for the BM@N sampling lead/scintillator hadron calorimeter

Recently developed new forward lead/scintillator sampling hadron calorimeters with transverse and longitudinal segmentation will be used in the upgraded BM@N (Baryonic Matter at Nuclotron) experiment at the Nuclotron-NICA acceleration complex in JINR (Dubna). These calorimeters are very important for measurements of centrality and the reaction plane orientation in heavy-ion collisions. Digitizing the analog signals in a wide dynamic range with sampling ADC leads to the fluctuations of the measured charge. The procedure of signal processing based on the Prony least squares fit method has been developed to improve the response requiring minimum machine time. In addition, fitting the signals with a known function allows one to select effectively weak signals at the level of electronics noise, that is important for performing a calibration of calorimeter sections with cosmic muons for the BM@N experiment. The same procedure will be used for hadron calorimeter in CBM experiment at FAIR. New methods of signal processing and cosmic muon tracking for forward hadron calorimeters will be presented.

Method of diagnostics of the rotor eccentricity of an induction motor

The main type of electric motors used in the electric drive of technological processes are induction motors with a squirrel-cage rotor. With proper operation, they have a higher MTBF (Mean Time Between Failures). It was found that one of the common causes of engine failure is bearing wear and, as a result, increased rotor eccentricity. We used the oscillating amplitude of the rotor speed in the transient state as a diagnostic parameter. The paper presents a method for this troubleshooting, a block scheme and appearance of the experimental installation, and a single-line diagram of the transmitter for measuring rpm. The experience has established the optimal ADC sampling frequency for experimentation to be carried out. The results of studies of changes in the rotor speed oscillating from time to time under load at rotor eccentricity have been given.

A precision ADC sampling system design

The high-energy photon source, which has been built in Huairou, Beijing, has high requirements on magnetic field dithering. Magnetic field dithering is mainly determined by the stability of the output current of the power supply. In order to ensure the stability of the output current of quadrupole magnet power supply, the power supply sampling control loop needs to be precisely designed. In this paper, a precision ADC sampling system based on internal temperature control is designed to carry out precise control of the sampling ADC. In this design, precise ADC chip is used to complete the precise sampling of the system. The precise sampling system contains a DAC system for high-speed settings. In order to verify the design of the system, high-precision quadrupole magnet power supply is used for measurement. The experimental results show that the temperature variation range of precision temperature control ADC system is ± 0.1 °C. By using the precise temperature control ADC system, the output current stability of the high-precision quadrupole magnet power supply is effectively improved.

E-DTDOA Based Localization for Wireless Sensor Networks With Clock Drift Compensation

A high time resolution localization scheme, using ultra-wide band ranging signal with bandwidth of 2GHz, is proposed for a fully asynchronous wireless sensor network (WSN). The proposed scheme is specifically useful for sensor nodes which are designed to operate at very low ADC sampling rate, in the order of 2–3 MHz, but still achieves the sampling resolution in the order of sub-nanoseconds. To achieve low sampling rate, equivalent time sampling (ETS) technique is used at the sensor nodes. Reconstructed signal obtained by ETS technique, that require periodic transmission of the same signal repetitively, is severely affected by the variation in transmitter and receiver clock drift as against the real time sampling where the variations are due to receiver node clock drift only. Thus, it requires a protocol to precisely estimate the transmitter and receiver clock parameters. A scheme, which uses a novel mathematical equivalent time of arrival (E-TOA) model for ETS based system, for clock drift estimation is presented. Based on clock drift estimation parameters, receiver nodes are tuned to the same frequency. E-TOA measurements are further used to propose an equivalent differential time difference of arrival (E-DTDOA) based ranging algorithm, which relaxed the time synchronization requirement between the wireless nodes, and still achieving high time resolution. The E-DTDOA range measurements are subsequently used to obtain precise localization of the target node/s. The feasibility of the algorithm proposed is demonstrated experimentally using in house designed wireless sensor nodes.

Development and Testing of a Simple Circuit Characteristic Tester System

The simple circuit characteristic tester system is based on circuit construction and design. The system uses the f407 of the STM32 chip as the main control chip, and combines the test circuit and the basic operational amplifier circuit (voltage follower), RC filter circuit, relay control. The circuit and the triode regulator circuit are tested. The system uses a single-chip microcomputer to generate a sine wave (DAC) with amplitude of 0-3.3VPWM and amplitude of 0.1-1V, and then attenuates ten times as an input by the op amp, and performs ADC sampling comparison on a specific part of the circuit to complete the input resistance and output resistance of the circuit. And the gain and frequency characteristic curve at the frequency of 1KHZ. Finally, the system can automatically measure and measure the fault of a given component through programming. The system analyzes and compares the output waveform at a specific circuit as a single-chip microcomputer. The input is then judged by the processing of the microcontroller. In the process of system operation, the OPA2314 operational amplifier is used. The triode adopts the Model 9013. A small capacitor with a value of 100nF is added between the power supply and the ground, which enables the system test to be successfully completed.

A Spectrum-Sensing DPD Feedback Receiver With $30\times$ Reduction in ADC Acquisition Bandwidth and Sample Rate

This paper presents a feedback receiver for the digital predistortion (DPD) of radio frequency (RF) power amplifiers (PAs). In contrast to conventional architectures, the receiver samples in the frequency domain. By randomly selecting a frequency bin in each sampling interval, the PA model is identified with substantially lower acquisition bandwidth and sampling rate. The receiver prototype is implemented in a 28-nm FD-SOI technology and samples at 4MS/s instead of the full Nyquist rate of 168MS/s for a 20-MHz Long Term Evolution (LTE) signal with spectral regrowth. The prototype is shown to linearize a 4-W small base station power amplifier from an adjacent channel leakage ratio (ACLR) of −35 dBc to −47.7 dBc, after processing only about 250 samples.

A compensation method for the consistency of multi-channel mixing circuit for solar radio observation system

The observing frequency of Ground-based Solar Radio Observation Systems (SROS) ranges from tens of MHz (10-m-wave) to tens of GHz (millimeter-wave). Due to the limitation of the ADC input bandwidth and sampling rate, the broadband solar radio signals acquired by the SROS will be segmented by mixing circuit and then processed the analog-to-digital conversion. The analog device inconsistency leads to the inconsistencies of the amplitude and phase between different channels of mixing circuits, which affects the accuracy of the receiver. The compensation coefficient of each frequency point is first calculated by measuring the deviation of the amplitude and phase between different channels, and then stored in FPGA of the receiver. The data achieved by ADC are proceed by FFT and then compensated by the compensation coefficients. The validation experiments are carried out using 150–500 MHz SROS located in Chashan Solar Radio Observatory (CSO). The amplitude difference between different channels can be as small as 0.5 dBm. The phase consistency can also be significantly improved. The practical application shows that this method can improve the consistency of the wideband mixing circuit, and can be used to correct of multi-channel consistency of the digital beam forming (DBF) for the low-frequency log-periodic antenna array and interference of the multiple antennas.

Leaky Noise: New Side-Channel Attack Vectors in Mixed-Signal IoT Devices

Microcontrollers and SoC devices have widely been used in Internet of Things applications. This also brings the question whether they lead to new security threats unseen in traditional computing systems. In fact, almost all modern SoC chips, particularly in the IoT domain, contain both analog and digital components, for various sensing and transmission tasks. Traditional remote-accessible online systems do not have this property, which can potentially become a security vulnerability. In this paper we demonstrate that such mixed-signal components, namely ADCs, expose a new security threat that allows attackers with ADC access to deduce the activity of a CPU in the system. To prove the leakage, we perform leakage assessment on three individual microcontrollers from two different vendors with various ADC settings. After showing a correlation of CPU activity with ADC noise, we continue with a leakage assessment of modular exponentiation and AES. It is shown that for all of these devices, leakage occurs for at least one algorithm and configuration of the ADC. Finally, we show a full key recovery attack on AES that works despite of the limited ADC sampling rate. These results imply that even remotely accessible microcontroller systems should be equipped with proper countermeasures against power analysis attacks, or restrict access to ADC data.

The CMS ECAL Phase-2 upgrade for high precision energy and timing measurements

The CMS electromagnetic calorimeter (ECAL) is a homogeneous calorimeter made of about 75,000 lead tungstate scintillating crystals. In view of the high-luminosity phase of the LHC, the ECAL electronics must be upgraded to cope with the more stringent requirements in terms of trigger latency and rate. The new electronics will transmit the data in streaming mode from the front-end electronics to the off-detector electronics, where the trigger primitives will be formed in powerful FPGAs. The front-end electronics will feature two new radiation-hard chips: a dual gain trans-impedance amplifier (TIA) and a sampling ADC with loss-less data compression. The TIA choice preserves the fast pulse shape of signals in the lead tungstate coupled to avalanche photodiodes (APD), and it is more resilient to the noise increase due to the radiation-induced APD leakage current. An important characteristic of the new design will be the capability to provide precision timing measurements, of the order of 30ps, for photons and electrons above 50GeV. The excellent time resolution will improve the overall CMS physics performance by mitigating the high pile-up effects. First characterization results of the TIA chip will be shown, and studies of energy and timing resolution performed in beam tests with the prototype electronics will be presented.

A new approach: LYSO based polarimetry for the EDM measurements

One of the fundamental questions of modern particle physics is the existence of finite electric dipole moments (EDM) of the hadrons. In case of charged particles, like protons and deuterons, the proposed method is the precise determination of the precession of the beam polarization vector in a storage ring. For that purpose, the JEDI (Jülich Electric Dipole moment Investigations) collaboration is developing a precise polarimeter detector based on LYSO scintillator coupled to SiPM modules. They are capable of stopping 300 MeV elastically scattered deuterons and protons. Precise measuring of the kinetic energy of the scattered projectiles ensures the accurate reaction identification leading to a precise polarization determination. To create the long-term reliable detector system, we have performed four iterations of the detector development. Currently, we are operating 52 LYSO modules with a dedicated dead-time less sampling ADC readout system. The modules are very compact, due to modern high pixel density SiPM readout.

Waveform centroid discrimination of return pulse weighting method in LIDAR system

We demonstrate a new technique for the nanosecond return pulse waveform centroid timing method. The method has higher timing accuracy and wider applications due to the characteristic of that it can retain almost all the information of the return pulse. In this paper, the empirical model of transmitting signal and return pulse is built; and then the merits and demerits are discussed between the time-weighted method and the intensity weighted waveform centroid timing method. Under the MEMS scanning LIDAR system, the relationship between high-speed ADC sampling rate and waveform centroid timing accuracy is revealed. The measurement results show that when the ADC with a sampling frequency of 4 GHz is used in a short pulse LIDAR system, the comprehensive tining accuracy of the weighted waveform centroid timing method is approximately 300 ps. This method can improve the performance of the LIDAR system and may be of considerable value to both unmanned driving and intelligent service robot.

FPGA-Based Interface of Digital DAQ System for Double-Scattering Compton Camera.

The double-scattering Compton camera (DSCC) is a radiation imaging system that can provide both unknown source energy spectra and 3D spatial source distributions. The energies and detection locations measured in coincidence with three CdZnTe (CZT) detectors contribute to reconstructing emission energies and a spatial image based on conical surface integrals. In this study, we developed a digital data acquisition (DAQ) board to support our research into coincidence detection in the DSCC. The main components of the digital DAQ board were 12 ADCs and one field programmable gate array (FPGA). The ADCs digitized the analog 96-channel CZT signals at a sampling rate of 50MHz and transferred the serialized ADC samples and the bit and frame clocks to the FPGA. In order to correctly capture the ADC sample bits in the FPGA, we conducted individual sync calibrations for all the ADC channels to align the bit and frame clocks to the right positions of the ADC sample bits. The FPGA logic design was composed of IDELAY and IDDR components, six shift registers, and bit slip buffer resources. Using a Deskew test pattern, the delay value of the IDELAY component was determined to align the bit clock to the center of each sample bit. We determined the bit slip in the 12-bit ADC sample using an MSB test pattern by checking where the MSB value of one is located in the captured parallel data. After sync calibration, we tested the interface between the ADCs and the FPGA with a synthetic analog Gaussian signal. The 96 ADC channels yielded a mean R 2 goodness-of-fit value of 0.95 between the Gaussian curve and the captured 12-bit parallel data.

Design and analysis of high-speed optical access networks in the O-band with DSP-free ONUs and low-bandwidth optics.

In this paper, we demonstrate and investigate high-speed passive optical networks (PON) in the O-band without using any digital signal processing (DSP) at the ONU side, meanwhile still adopting cost-effective low-bandwidth optics. We show that with commercial 10G-class optics including DML and PIN-TIA, 50Gb/s PAM4 PON with a power budget up to 29dB is achieved under the HD-FEC BER limit. We present the detailed design procedure of the DSP including the downlink Nyquist pulse shaping and pre-equalization and uplink post-equalization, and conduct a comprehensive study on this system including DSP complexity, DAC/ADC sampling rate requirement and tolerance to the response diversity of ONU receivers. We conclude that, 1) 55 and 35 taps are sufficient for downlink and uplink digital filters to approach the BER floor; 2) the minimum required DAC and ADC sampling rate are respectively 33.75GS/s and 32GS/s to achieve the optimal performance; and 3) with 1dB sensitivity penalty at the HD-FEC BER limit, the allowable response diversity of ONU receivers can be from -2.2dB/10GHz to 1.8dB/10GHz. Furthermore, we explore and demonstrate the suitable data rate based on on-off keying and duobinary modulation formats in this system and present corresponding results.

Detection capabilities of alpha particles and gamma rays using DAM–ADC scintillator

DAM–ADC scintillator is optically characterized for both alpha particles using 241Am source and gamma radiation using 1.25 MeV 60Co. The Radioluminescence (RL) response of DAM–ADC scintillator to alpha particle has been investigated. The DAM–ADC sample was attached to the surface of the 241Am source, and the photons generated from the sample were detected by the PMT. For alpha particles, the integrated PMT counts output of the local system exhibit linear correlation with the irradiation time. In addition to RL detection of alpha particles, the results of exposing DAM–ADC scintillator to gamma rays with high doses has been performed. Linear relationship between Raman spectral peak intensity and gamma dose is investigated. Induced modifications in terms of structural and optical characteristics of the irradiated DAM–ADC scintillators with gamma rays were investigated. In addition to these properties, pulse height spectra (PHS) under 137Cs γ-ray and 241Am (alpha particles and gamma-ray (60 keV) irradiation have been measured.

Robust super‐regenerative receiver with low susceptibility on clock jitter employing synchronous peak‐held envelope detector

A robust 400 MHz super-regenerative receiver with low susceptibility to clock jitter is proposed. The conventional un-clocked envelope detector (ED) is replaced with a synchronous peak-held ED, where its peak detection value is kept during oscillator quenching OFF time by switching off the charging path of ED, synchronously with quenching clock. In this way, the flattened peak level not only allows the use of low quality jitter in the clock but also removes a tedious timing calibration process in the conventional receiver. The proposed receiver with the novel synchronous peak-held ED and an on-chip oscillator achieves a sensitivity performance of -81 dBm@1 Mbps without the conventional ADC sampling timing calibration. The receiver in 180 nm CMOS occupies an active area of 0.51 mm 2 and dissipates 570 μW.

Development of an advanced two-dimensional microdosimetric detector based on THick Gas Electron Multipliers.

The THick Gas Electron Multiplier (THGEM)-based tissue-equivalent proportional counter (TEPC) has been proven to be useful for microdosimetry due to its flexibility in varying the gaseous sensitive volume and achieving high multiplication gain. Aiming at measuring the spatial distribution of radiation dose for mixed neutron-gamma fields, an advanced two-dimensional (2D) THGEM-TEPC was designed and constructed at McMaster University which will enable us to overcome the operational limitation of the classical TEPCs, particularly for high-dose rate fields. Compared to the traditional TEPCs, anode wire electrodes were replaced by a THGEM layer, which not only enhances the gas multiplication gain but also offers a flexible and convenient fabrication for building 2D detectors. The 2D THGEM TEPC consists of an array of 3 × 3 sensitive volumes, equivalent to nine individual TEPCs, each of which has a dimension of 5 mm diameter and length. Taking the overall cost, size and flexibility into account, to process nine detector signals simultaneously, a multi-input digital pulse processing system was developed by using modern microcontrollers, each of which is coupled with a 12-bit sampling ADC. Using the McMaster Tandetron 7 Li(p,n) accelerator neutron source, both fundamental detector performance, as well as neutron dosimetric response of the 2D THGEM-TEPC, has been extensively investigated and compared to the data acquired by a standard spherical TEPC. It was shown that the microdosimetric response and the measured absorbed dose rate of the 2D THGEM detector developed in this study are comparable to the standard 1/2" TEPC which is commercially available. This study proved that the 2D TEPC based on the THGEM technology can be effectively used in microdosimetry studies and is a promising detector for measuring the absorbed dose rate distribution over an area in mixed radiation fields. This unique small gas cavity detector opens new possibilities in applications for high-intensity mixed radiation fields as well as in nanodosimetry.

Study of the influence of ADC sampling rate on the efficiency of neutron-gamma discrimination by the pulse shape

The influence of a sampling rate of ADC on the efficiency of the pulse shape discrimination procedure (PSDP) developed for gamma-neutron discrimination was studied. Pu-Be neutron source and two types of digitizers (CAEN DT5730 and CAEN DT5743) were used. Both digitizers together with application software allow to store sequences of waveforms from a scintillation detector. The functional features of the CAEN DT5730 and CAEN DT5743 are described, and experimental characteristics of their operation are compared. Experimental values of an efficiency of neutron/gamma signal discrimination using two ADCs with different sampling frequencies are presented.

Development of a compact and cost effective multi-input digital signal processing system

A prototype digital signal processing system (DSP) was developed using a microcontroller interfaced with a 12-bit sampling ADC, which offers a considerably inexpensive solution for processing multiple detectors with high throughput. After digitization of the incoming pulses, in order to maximize the output counting rate, a simple algorithm was employed for pulse height analysis. Moreover, an algorithm aiming at the real-time pulse pile-up deconvolution was implemented. The system was tested using a NaI(Tl) detector in comparison with a traditional analogue and commercial digital systems for a variety of count rates. The performance of the prototype system was consistently superior to the analogue and the commercial digital systems up to the input count rate of 61 kcps while was slightly inferior to the commercial digital system but still superior to the analogue system in the higher input rates. Considering overall cost, size and flexibility, this custom made multi-input digital signal processing system (MMI-DSP) was the best reliable choice for the purpose of the 2D microdosimetric data collection, or for any measurement in which simultaneous multi-data collection is required.