Reversible Logic Research Articles

The Dynamics of Kikuyu-Kalenjin Ethno-Political Relationships: The Run-up to 2013 Elections in Uasin Gishu County, Kenya

2007 Post Election Violence (PEV). Surprisingly, in the following immediate national elections held in 2013, the two major protagonist ethnics; the Kikuyu and Kalenjin, previously embroiled in the political violence of 2007, came together in a new political coalition in the fight for the position of president and vice president. The elections witnessed the political elite skillfully harness their cultural institutions to achieve political power. The main concern of this study, therefore, was to establish the role played by certain cultural aspects of ethnicity in restructuring the political engagements between the Kikuyu and Kalenjin in Uasin Gishu in the run-up to the 2013 elections. To this end, the study employed the lens of instrumentalist and primordial theories while employing the historical method with a duality of an interpretivism philosophical underpinning and a qualitative approach. Primary data was analysed thematically and corroborated with secondary data. The study posits that some cultural aspects of both the Kalenjin and Kikuyu were instrumentalised by the political elite in Uasin Gishu to coalesce their people for political expediency. By the use of the same reverse logic, the study advocates the use of traditional African cultural structures to inculcate peace and political tolerance among the residents of Uasin Gishu as this historical study has proved possible.

A lightweight reversible multi-mode physical unclonable function

Physical Unclonable Function (PUF), a hardware security primitive capable of generating unique fingerprints for chips, is crucial for Internet of Things (IoT) security. However, substantial hardware overhead, low reliability, and high power consumption have hindered the broad application of PUFs in lightweight IoT devices. This paper proposes a solution by leveraging the reversible logic paradigm in PUF design. Specifically, a Multi-Mode (M2) PUF is introduced and is based on configurable ring oscillators and transient effect rings. By configuring signal paths and internal delays, the M2 PUF efficiently generates numerous Challenge-Response Pairs (CRPs) with minimal hardware resources. Implemented on Xilinx Spartan-6 and Xilinx Virtex-7 FPGA platforms, it requires only 1.6 % of the hardware resources to generate a 1-bit response, significantly lower than existing state-of-the-art PUF solutions. The performance metrics for uniqueness, average native reliability, and reliability under different voltage conditions are impressive, registering at 48.23 %, 98.44 %, and 96.08 %, respectively. This structure represents an ideal solution for lightweight PUF design.

Pipelined information flow in molecular mechanical circuits leads to increased error and irreversibility

Pipelining is a design technique for logical circuits that allows for higher throughput than circuits in which multiple computations are fed through the system one after the other. It allows for much faster computation than architectures in which inputs must pass through every layer of the circuit before the next computation can begin (phased chaining). We explore the hypothesis that these advantages may be offset by a higher error rate, logical irreversibility, and greater thermodynamic costs by simulating pipelined molecular mechanical circuits using an explicit physical model. We observe the emergent logical irreversibility, and see that the simultaneous action of multiple components indeed leads to a higher error rate than in phase-chained circuits. The thermodynamic costs of operating the gates are much larger than in equivalent phase-chained circuits, and these costs do not appear to tend to zero in the limit of slowgate operation. Redesigning the gates to eliminate errors and artificially enforcing logical reversibility reduces the thermodynamic costs and recovers thermodynamically reversible behavior in the limit of slow gate operation. The breakdown of logical reversibility and accuracy are both associated with a breakdown of the digital behavior of the device, likely contributing to thermodynamic costs that are large relative to the scale of the information being processed. Published by the American Physical Society 2024

PDQRRFF: Poisson-distributed quantum random reversible flip flop generator for BIST

Reversible logic has gained popularity recently because it allows circuits to use significantly less power. Due to the inherent reversibility of quantum operation, there is enormous interest in designing and optimizing reversible circuits. In this work, a new gate named as transvidkan gate, Quantum Random Reversible Flip Flop, Sequence generator, and Build in Self-Test (BIST) has been proposed. Quantum Random Reversible Flip Flop (QRRFF) is an emerging technology that is used in a variety of apps that use modern security and encryption systems. For creating a random string, typical approaches combine an entropy source with an elimination or bit-generation system. Quantum computing reversible logic chips and Low-power design are emerging as intriguing research topics. A classical logic-based 8-bit reversible comparator is represented using existing reversible gates. This study provides a BIST-based architecture for a comparator design that reduces the garbage outputs, quantum cost, and constant inputs. According to simulation result, the proposed approach outperforms traditional methods in terms of hardware complexity and quantum cost.

Four-State Electrochromism in Tris(4-aminophenyl)amine- terephthalaldehyde-based Covalent Organic Framework.

Covalent organic frameworks (COFs) are of massive interest due to their potential application spanning diverse fields such as gas storage and separation, catalysis, drug delivery systems, sensing, and organic electronics. In view of their application-oriented quest, the field of electrochromism marked a significant stride with the reporting of the first electrochromic COF in 2019 [J. Am. Chem. Soc. 2019, 141, 19831-19838]. Since then, new and novel COF structures with electrochromic features (denoted as ecCOFs) have been searched continuously. Yet, only a handful of ecCOFs have been constructed to date. A closer look at these reports suggests that multielectrochromism (showing at least three redox color states) in a COF assembly has only been achieved once, manifested through three-state electrochromism [Angew. Chem. 2021, 133, 12606-1261]. Herein, we report four-state electrochromism in tris(4-aminophenyl)amine-terephthalaldehyde (TAPA-PDA)-based COF constructed through the metal-catalyst free Schiff base approach. The four-state (orange, pear, green, and cyan) electrochromism demonstrated by the TAPA-PDA ecCOF opens several futuristic avenues for ecCOF's end use in flip-flop logic gates, intelligent windows, decorative displays, and energy-saving devices.

Design of ternary reversible Feynman and Toffoli gates in ternary quantum-dot cellular automata

The use of reversible logic gates leads to a reduction in energy loss in logic circuits by preventing information loss. New computing methods, such as quantum-dot cellular automata (QCA), have been offered by nanotechnology emerging with nanoelectronics to make more comprehensive logic circuits. In nanotechnology-based systems, some bits are erased when the system performs any computation, and this causes heat dissipation and energy loss in systems. Adder circuits are the basis of any arithmetic operation and one of the main parts of many circuits for creating complex hardware; therefore, the use of enhanced adder circuits leads to high performance in logic circuits. In irreversible logic, the energy that is transferred from the power supply to the circuit is converted into heat, and energy loss occurs. Power management plays a vital role in modern computational systems, and using ternary logic instead of previous technologies leads to better performance. The main purpose of our study is to design ternary quantum-dot cellular automata (TQCA) reversible logic gates based on ternary quantum-dot cellular technology. Reversible gates are the basis of creating a reversible circuit. In this paper, the Muthukrishnan-Stroud (M-S) gate, which is the basis of all other reversible ternary gates, is implemented in ternary QCA technology, and then, reversible ternary Feynman and Toffoli (C2NOT) gates are designed. More optimal adder circuits can be realized in three-valued technology using Feynman and Toffoli gates. The area, delay, and cell count of the proposed TQCA designs are compared with those of other related works, and the effect of fault on the designs in the presence of cell omission defect is determined. The occupied areas of the proposed Feynman and Toffoli gate designs are 0.069 μm2 and 0.073 μm2, respectively. Moreover, the fault tolerance levels of these TQCA gates are 77% and 92%, respectively.

Reversible arithmetic and logic unit using a novel reversible NRRG gate in quantum dot technology

Quantum-dot Cellular Automata (QCA) has become one of the promising studies for nano-scale computing. QCA is one of the candidate technologies to be replaced with CMOS technology. QCA technology not only reduces power consumption and delay but also increases operating frequency and speed. The arithmetic logic unit is the essential component in a processor that performs arithmetic and logical operations. This paper presents a novel 5 × 5 reversible logic gate called the NRRG (Norouzi_Rasouli Reversible Gate) which can be used as the basic building block of 4:1 and 8:1 reversible multiplexers. Then, we have designed a RALU (reversible arithmetic and logic unit) using this gate. Our design can perform 20 operations such as AND, NAND, OR, XOR, XNOR, COPY, addition, and increment. The proposed QCA RALU requires 0.44 μm2 area, 480 QCA cells, and 10 clock phases. The proposed design needs less cell count, delay, and cost of QCA compared to previous works. The structure is implemented without any rotated cells and only uses one layer which improves the manufacturability of the design. The architectures are designed and simulated using QCA Designer 2.0.3.

Implementation of 4-bit Universal Shift Register using Reversible Logic

The field of digital logic design is increasingly exploring reversible logic due to its potential in minimizing power dissipation, an essential criterion in low-power applications. This paper presents the design and implementation of a 4-bit universal shift register (USR) using reversible logic gates. The design leverages Fredkin gates, multiplexer (MUX), and D flip-flops to achieve functionality with minimal power consumption. Simulation results demonstrate the efficiency and effectiveness of the proposed design. Reversible logic is essential to low-power digital design and quantum computing because it makes it possible to reconstruct input signals from output signals, which reduces heat generation and information loss. The suggested shift register can be used for hold, parallel load, and left and right shift operations. To implement the functions of the shift register, we used a variety of reversible gates, including the Toffoli and Fredkin gates. When the architecture is contrasted with traditional non-reversible shift registers, it shows notable gains in reduced gate count and power efficiency

A nanoelectromechanical energy-reversible switch: theoretical study and verification by experiment of its applicability to adiabatic computing

A nanoelectromechanical energy-reversible switch: theoretical study and verification by experiment of its applicability to adiabatic computing

Advancing a High-Context Perspective for Active Fashion Research

Western science perceives knowledge from a low-context view, guided by logic, objectivity, and reproducibility. This approach perpetuates newness which contradicts the idea of circularity, in research and the fashion industry. In contrast, Indigenous science practices a more holistic, high-context approach, which values relational connections and interdependence. A high-context approach to put the earth first and reverse business growth logic is incredibly complex but necessary. If we measure our success by the true value of an integrated bottom line, the motives we embrace, and the criteria used to make decisions, we have the potential to promote behavioral change. We are all interconnected, yet are conditioned to take a short-term, individualistic approach. However, we exist on a planet with a long-term perspective, presenting a major conflict. Indigenous knowledge is not new, and a collectivist mindset is disconnected from sustainability science. Fashion research is insular and inaccessible to industry or policymakers. A high-context perspective is a foundational approach to future active fashion research.

RLSynC: Offline-Online Reinforcement Learning for Synthon Completion.

Retrosynthesis is the process of determining the set of reactant molecules that can react to form a desired product. Semitemplate-based retrosynthesis methods, which imitate the reverse logic of synthesis reactions, first predict the reaction centers in the products and then complete the resulting synthons back into reactants. We develop a new offline-online reinforcement learning method RLSynC for synthon completion in semitemplate-based methods. RLSynC assigns one agent to each synthon, all of which complete the synthons by conducting actions step by step in a synchronized fashion. RLSynC learns the policy from both offline training episodes and online interactions, which allows RLSynC to explore new reaction spaces. RLSynC uses a standalone forward synthesis model to evaluate the likelihood of the predicted reactants in synthesizing a product and thus guides the action search. Our results demonstrate that RLSynC can outperform state-of-the-art synthon completion methods with improvements as high as 14.9%, highlighting its potential in synthesis planning.

Creating a Logic Divider Based on BCD and Utilizing the Vedic Direct Flag Method

Reversible logic has potential for a variety of applications demanding low energy usage since it prevents information loss and energy waste. The purpose of this work is to design a new Vedic divider circuit with reversible gates. Efficiency in quantum and ASIC parameters is demonstrated by the Reversible Direct Flag Vedic Division Method (RDFVDM), which has been devised. Block-level reversible gates are used in the RDFVDM to provide benefits including lower quantum costs and less trash outputs. The performance of Cadence EDA Tool is validated by simulation trials. Based on a comparative examination utilizing current methodologies, RDFVDM performs better than comparable designs. Interestingly, it improves energy usage by 26%. Moreover, RDFVDM performs exceptionally well in terms of quantum cost while employing the RSA cryptographic technique, efficiently managing 1276,293 constant inputs and 311 garbage outputs.

Geometric Refactoring of Quantum and Reversible Circuits Using Graph Algorithms

Geometric Refactoring of Quantum and Reversible Circuits Using Graph Algorithms

A 128 × 128 SPAD LiDAR sensor with column-parallel 25 ps resolution TA-ADCs

This paper presents a design of single photon avalanche diode (SPAD) light detection and ranging (LiDAR) sensor with 128 × 128 pixels and 128 column-parallel time-to-analog-merged-analog-to-digital converts (TA-ADCs). Unlike the conventional TAC-based SPAD LiDAR sensor, in which the TAC and ADC are separately implemented, we propose to merge the TAC and ADC by sharing their capacitors, thus avoiding the analog readout noise of TAC’s output buffer, improving the conversion rate, and reducing chip area. The reverse start-stop logic is employed to reduce the power of the TA-ADC. Fabricated in a 180 nm CMOS process, our prototype sensor exhibits a timing resolution of 25 ps, a DNL of +0.30/−0.77 LSB, an INL of +1.41/−2.20 LSB, and a total power consumption of 190 mW. A flash LiDAR system based on this sensor demonstrates the function of 2D/3D imaging with 128 × 128 resolution, 25 kHz inter-frame rate, and sub-centimeter ranging precision.

New Bounds for Quick Computation of the Lower Bound on the Gate Count of Toffoli-Based Reversible Logic Circuits

New Bounds for Quick Computation of the Lower Bound on the Gate Count of Toffoli-Based Reversible Logic Circuits

Reversible logic-based parity generator circuit for nano communication network using QCA

Reversible logic-based parity generator circuit for nano communication network using QCA

Complete synthesis of identity templates for quantum and reversible logic MCT circuits using SAT-solvers and proposal of suboptimality witness notion

Complete synthesis of identity templates for quantum and reversible logic MCT circuits using SAT-solvers and proposal of suboptimality witness notion

Controllable electrical contact characteristics of graphene/Ga2X3 (X = S, Se) ferroelectric heterojunctions

Reducing the interface barrier between metals and semiconductors is crucial for designing high-performance optoelectronic devices based on van der Waals heterojunctions (HJs). This study proposes four models of HJs composed of graphene (GR) and Ga2X3 (X = S, Se) and systematically investigates their interface electronic properties, along with strain engineering and electric field effects. The results indicated that exploiting the interface dipole-induced potential step allows modulation of the Schottky barrier height (SBH) and contact type of the HJs by altering the contact interfaces. In the BGR/Ga2S3 HJs (BGR means GR positioned at the bottom of Ga2X3), only a small positive (negative) electric field is required to realize the transition from n-type Schottky to p-type Schottky (Ohmic) contacts. Also, strain engineering provides additional means for flexible and controllable contact types, facilitating the design of reversible logic circuits. It indicates the physical insights and strategic interventions of GR/Ga2X3 HJs tunable SBH and offers theoretical guidance for the design of two-dimensional ferroelectric nanodevices with high-quality electrical contact interfaces.

Quantum-Dot CA-Based Fredkin Gate and Conservative D-Latch for Reliability-Based Information Transmission on Reversible Computing

Reversible computation is very important to minimize energy dissipation and prevent information loss not only in quantum computing but also in digital computing. Therefore, interest in designing efficient universal logic gates has recently increased. In this study, we efficiently design the Fredkin gate (FRG), a well-known conservative reversible operation gate, using quantum-dot cellular automata (QCA), and propose a D-latch using it. The proposed FRG structure can be designed efficiently using the structure of a QCA multiplexer using cell interaction, and a symmetric structure was designed. The proposed structure was simulated using QCADesigner 2.0.3 and QCADesigner-E for accurate comparison of various performance metrics, and the proposed structure clearly shows superiority in most performances and two representative design costs. Therefore, the lightweight design of an efficient reversible gate prevents data loss and increases information reliability.

Area-efficient low-power image watermarking architecture using faithful approximation and reversible logic

Area-efficient low-power image watermarking architecture using faithful approximation and reversible logic