The CLARO-CMOS is a prototype ASIC that allows fast photon counting with low power consumption, built in AMS 0.35μm CMOS technology. It is intended to be used as a front-end readout for the upgraded LHCb RICH detectors. In this environment, assuming 10 years of operation at the nominal luminosity expected after the upgrade, the ASIC must withstand a total fluence of about 6×1012 1MeVneq/cm2 and a total ionising dose of 400krad. Long term stability of the electronics front-end is essential and the effects of radiation damage on the CLARO-CMOS performance must be carefully studied. This paper describes results of multi-step irradiation tests with protons up to the dose of ~8Mrad, including measurement of single event effects during irradiation and chip performance evaluation before and after each irradiation step.