Resistive Memory Cells Research Articles

A carrier transport model in the high-resistance state of lead-methylamine iodide-based resistive memory devices

Methylamine lead iodide (CH3NH3PbI3), which has recently been in the spotlight as a solar cell material, has also recently shown promise for use as an active material in resistive memory cells with ultralow operation voltages, good transparencies, and flexibilities. The material’s defects, which govern its properties, differ vastly depending on the fabrication process. However, the defect chemistry is not yet entirely understood. We have therefore established a macroscopic transport model with defect-related model parameters, such as trap density, trap energy level, and Fermi level, in order to estimate these parameters for fabricated samples based on their electrical data. Our model will serve as an efficient way to analyze the properties of the active material.

Resistive random access memory (RRAM) technology: From material, device, selector, 3D integration to bottom-up fabrication

Emerging non-volatile memory technologies are promising due to their anticipated capacity benefits, non-volatility, and zero idle energy. One of the most promising candidates is resistive random access memory (RRAM) based on resistive switching (RS). This paper reviews the development of RS device technology including the fundamental physics, material engineering, three-dimension (3D) integration, and bottom-up fabrication. The device operation, physical mechanisms for resistive switching, reliability metrics, and memory cell selector candidates are summarized from the recent advancement in both industry and academia. Options for 3D memory array architectures are presented for the mass storage application. Finally, the potential application of bottom-up fabrication approaches for effective manufacturing is introduced.

Nano-cone resistive memory for ultralow power operation

SiNx-based nano-structure resistive memory is fabricated by fully silicon CMOS compatible process integration including particularly designed anisotropic etching for the construction of a nano-cone silicon bottom electrode (BE). Bipolar resistive switching characteristics have significantly reduced switching current and voltage and are demonstrated in a nano-cone BE structure, as compared with those in a flat BE one. We have verified by systematic device simulations that the main cause of reduction in the performance parameters is the high electric field being more effectively concentrated at the tip of the cone-shaped BE. The greatly improved nonlinearity of the nano-cone resistive memory cell will be beneficial in the ultra-high-density crossbar array.

Atomic layer deposition of tantalum oxide with controlled oxygen deficiency for making resistive memory structures

TaO x films with controlled ratio of Ta4+ and Ta5+ atoms were prepared at different hydrogen concentrations in plasma. As shown by X-ray photoelectron spectroscopy and time-of-flight secondary ion mass spectrometry, the chemical state of Ta4+ corresponds to oxygen vacancies in the TaO x film. Electrophysical studies of the metal–dielectric–metal structures revealed an increase in the leakage current by four orders of magnitude as the hydrogen concentration in the plasma was increased from 7 to 70%, which is due to an increase in the concentration of oxygen vacancies in TaO x . A test structure of a resistive memory cell was made on the basis of the nonstoichiometric TaO x obtained. It withstood more than 106 rewriting cycles. The suggested atomic layer deposition process shows promise for solving one of the main problems of resistive memory: extension of its working life.

Emulating the Electrical Activity of the Neuron Using a Silicon Oxide RRAM Cell.

In recent years, formidable effort has been devoted to exploring the potential of Resistive RAM (RRAM) devices to model key features of biological synapses. This is done to strengthen the link between neuro-computing architectures and neuroscience, bearing in mind the extremely low power consumption and immense parallelism of biological systems. Here we demonstrate the feasibility of using the RRAM cell to go further and to model aspects of the electrical activity of the neuron. We focus on the specific operational procedures required for the generation of controlled voltage transients, which resemble spike-like responses. Further, we demonstrate that RRAM devices are capable of integrating input current pulses over time to produce thresholded voltage transients. We show that the frequency of the output transients can be controlled by the input signal, and we relate recent models of the redox-based nanoionic resistive memory cell to two common neuronal models, the Hodgkin-Huxley (HH) conductance model and the leaky integrate-and-fire model. We employ a simplified circuit model to phenomenologically describe voltage transient generation.

Partially printed resistive memory cells on rigid and flexible substrates

The fabrication and characterization of resistive memory cells based on a silver/silicon oxide stack with a printed polymer electrode is described. Memory cells were fabricated on standard silicon wafers as well as on flexible polymer foils. The partially printed cells showed low switching voltages and currents. Together with the possibility of multi‐level data storage even on flexible substrates, the potential for low power, high density, and printed cheap memory cells is demonstrated.Memristor with printed electrode and its current–voltage characteristic.

Electrical 1D tomography of nanofilaments using in-operando electrical characterization of Pt/NiO/Pt resistive memory cells during FIB milling

Electrical characterization during focused ion beam (FIB) milling of an elementary Pt/NiO/Pt resistive memory cell is used to localize the conducting channels and to estimate the size and shape of the conducting nanofilament. A good agreement is found with cross sectional high resolution Transmission Electron Microscopy (HRTEM) images. This methodology is a potential tool to obtain in-operando electrical tomography of conducting paths with subnanometric spatial resolution.

Resistive Ternary Content Addressable Memory Systems for Data-Intensive Computing

Power dissipation and memory bandwidth are significant performance bottlenecks in virtually all computer systems. Associative computing with ternary content addressable memory (TCAM) holds the potential to address both problems in a wide range of data intensive workloads. Power dissipation is reduced by eliminating instruction processing and data movement overheads present in a purely RAM-based system. Bandwidth demand is lowered by processing data directly on the TCAM chip, thereby decreasing off-chip traffic. Unfortunately, existing SRAM-based TCAM cells are more than 90 times larger than a DRAM cell at the same technology node, which limits the capacity of commercially available TCAMs to a few megabytes. This article examines the integration of gigascale TCAM systems based on resistive memories within a general-purpose computing platform. TCAM density is improved by novel, resistive memory cells that exploit phase change and spin-toque transfer magnetoresistive RAM technologies. TCAM chips are organized into a DDR3-compatible DIMM and are accessed through a software library with zero modifications to the processor or the motherboard. The proposed TCAM systems achieve average speedups of 3 to 4.5 times and average energy reductions of 5 to 8 times as compared to a conventional RAM-based system.

Switching kinetics of SiC resistive memory for harsh environments

Cu/a-SiC/Au resistive memory cells are measured using voltage pulses and exhibit the highest ROFF/RON ratio recorded for any resistive memory. The switching kinetics are investigated and fitted to a numerical model, using thermal conductivity and resistivity properties of the dielectric. The SET mechanism of the Cu/a-SiC/Au memory cells is found to be due to ionic motion without joule heating contributions, whereas the RESET mechanism is found to be due to thermally assisted ionic motion. The conductive filament diameter is extracted to be around 4nm. The high thermal conductivity and resistivity for the Cu/a-SiC/Au memory cells result in slow switching but with high thermal reliability and stability, showing potential for use in harsh environments. Radiation properties of SiC memory cells are investigated. No change was seen in DC sweep or pulsed switching nor in conductive mechanisms, up to 2Mrad(Si) using 60Co gamma irradiation.

1D Selection Device Using Carbon Nanotube FETs for High-Density Cross-Point Memory Arrays

A novel one-transistor-n-resistors (1TnR) array architecture is demonstrated as a cost-effective solution to the sneak path problem in large-scale cross-point memory arrays. In a 1TnR array, a single transistor (1T) with a 1D channel effectively controls a number of resistive switching nonvolatile memory (NVM) cells (nR) while limiting the sneak leakage current within the 1D channel without sacrificing the device density. To maximize these benefits, a carbon nanotube FET (CNFET) is employed as the 1D selection device, due to its near-ballistic electrical transport properties even at a small device width. Experimental demonstrations of the CNFET-based 1TnR concept are presented with two promising resistive switching NVM candidates: 1) resistive random access memory (RRAM) and 2) phase-change memory (PCM). Here, we report that the integrated bipolar Al2O3-based RRAM consumes programming energies as low as 0.1–7 pJ per bit and has a high programming endurance of up to $10^{6}\vphantom {\sum ^{R^{R}}}$ cycles. The 1TnR RRAM cell also has self-compliance characteristics, because the semiconducting carbon nanotube (CNT) that serves as the bottom electrode limits the device current. The unipolar PCM cells integrated with CNFETs show uniform electrical characteristics with high ON-/OFF-resistance ratios of >10. Owing to the extremely small contact area between the phase change material, Ge2Sb2Te5, and the CNT, remarkably low programming currents of $ are achieved.

Electroforming Free Non-Volatile Resistive Memory Switching in Pulsed Laser Deposited Rare-Earth Oxides Thin Films

In resistive random access memory (ReRAM) device, an electroforming process is necessary to activate the resistive memory cell and requires an extra high-voltage source in the memory circuit which leads to high power consumption and complex circuit design. Therefore, electroforming free reproducibleresistive switching(RS) phenomenon in ReRAM is required to reduce the power consumption, to simplify the circuit design and to have better uniformity in the device performance. Herein, we present the non-volatile RS behaviour of pulsed laser deposited polycrystalline thin films of rare-earth oxides. The electroforming free stable unipolar RS behaviour was observed in Pt/RE2O3/Pt memory cells (RE = Sm and Gd).The Pt/RE2O3/Pt cells showed a high-resistance ratio in the range of ∼105-106, a good data retention as long as 104 s measured at 100 °C, a reliable endurance for up to 100 cycles, and non-overlapping switching voltages (SET voltage VON ~2.7˗3.2 V and reset voltage VOFF ~ 0.6˗0.9 V). RS mechanism in Pt/RE2O3/Pt memory cells can be explained on the basis of oxygen vacancies assisted conductive nano-filamentary (thermo-chemical) model. The dominant charge transport mechanism in the oxide films was ascribed to space-charge-limited-current (SCLC) conduction.

Influence of Graphene Interlayers on Electrode-Electrolyte Interfaces in Resistive Random Accesses Memory Cells

ABSTRACTThe behavior of the redox-based resistive switching memories is influenced by chemical interactions between the electrode and the solid electrolyte, as well as by local environment. The existence of different chemical potential gradients is resulting in nanobattery effect lowering the stability of the devices. In order to minimize these effects we introduce a graphene layer at the active electrode – solid electrolyte interface. We observe that graphene is acting as an effective diffusion barrier in the SiO2-based electrochemical metallization cells and acts catalytically on the electrochemical processes prior to resistive switching.

Formation of a memristor matrix based on titanium oxide and investigation by probe-nanotechnology methods

The results of investigation of a memristor-matrix model on the basis of titanium-oxide nanoscale structures (ONSs) fabricated by methods of focused ion beams and atomic-force microscopy (AFM) are presented. The effect of the intensity of interaction between the AFM probe and the sample surface on the memristor effect in the titanium ONS is shown. The memristor effect in the titanium ONS is investigated by an AFM in the mode of spreading-resistance map. The possibility of the recording and erasure of information in the submicron cells is shown on the basis of using the memristor effect in the titanium ONS, which is most promising for developing the technological processes of the formation of resistive operation memory cells

Volatile resistance states in electrochemical metallization cells enabling non-destructive readout of complementary resistive switches

Redox-based resistive memory cells exhibit changes of OFF or intermediate resistance values over time and even ON states can be completely lost in certain cases. The stability of these resistance states and the time until resistance loss strongly depends on the materials system. On the basis of electrical measurements and chemical analysis we found a viable explanation for these volatile resistance states (VRSs) in Ag-GeSx-based electrochemical metallization memory cells and identified a technological application in the field of crossbar memories. Complementary resistive switches usually suffer from the necessity of a destructive read-out procedure increasing wear and reducing read-out speed. From our analysis we deduced a solution to use the VRS as an inherent selector mechanism without the need for additional selector devices.

POWER ANALYSIS OF 4T SRAM BY STACKING TECHNIQUE USING TANNER TOOL

As the technology in electronic circuits is improving, the complexity in these circuits also increases. The complexity in the circuits leads to the need of that type of circuits which are portable and fast circuits. The portability in the electronic circuits are achieved by the use of battery. So we have to develop such type of circuits that consume very less power. The major focus in designing a high performance digital system such as microprocessors and various Digital signal Processors is given to low power design. The main part of any digital system is its memory unit. It is not possible to design a digital system without memory. So we can say that memory is the main part which utilize the maximum power in the system. The most used memory cell in the digital systems is the SRAM cells. They are the static RAM cells. Low-power Random Access Memory (RAM) has seen a remarkable and rapid progress in power reduction. The high density and low power SRAMs are needed for application such as hand held devices, laptops, notebooks, IC memory card because of the fact that they are portable devices and uses batteries for power source so they must consume power as low as possible. The power dissipation reduction is not only due to power supply voltage reduction, but also can be done by low power circuit techniques. It should be designed such that it provides a non- destructive read operation and reliable write operation [1].The proposed 4-Transistor with resistive load memory cell makes use of Stacking effect to reduce the leakage current. The stacking effect is used by switching off the stack transistor when the memory is in ideal mode. So the stacking transistor implemented in the circuit behaves like a switch which remain in off state when the cell is in off state and it remain in ON state when Write or Read operation is performed in the memory cell. The tool used is TANNER EDA for schematic simulation. The simulation technology used is MOSIS 250nm.

Physical origins and suppression of Ag dissolution in GeS(x)-based ECM cells.

Electrochemical metallisation (ECM) memory cells potentially suffer from limited memory retention time, which slows down the future commercialisation of this type of data memory. In this work, we investigate Ag/GeSx/Pt redox-based resistive memory cells (ReRAM) with and without an additional Ta barrier layer by time-of-flight secondary ion mass spectrometry (ToF-SIMS), X-ray absorption spectroscopy (XAS) and synchrotron high-energy X-ray diffractometry (XRD) to investigate the physical mechanism behind the shift and/or loss of OFF data retention. Electrical measurements demonstrate the effectiveness and high potential of the diffusion barrier layer in practical applications.

Charge carrier transport mechanism in high-κ dielectrics and their based resistive memory cells

Current-voltage characteristics of thin dielectric films of HfO x in p-Si/HfO x /Ni structures are analyzed. Experimental results are compared with various theoretical models: the Poole-Frenkel trap ionization model, the multiphonon trap ionization model, and the Schottky effect at the Ni/HfO x interface. It is shown that in spite of the good qualitative description of the experimental results by all models, only the multiphonon trap ionization model provides a quantitative description of the data..

Evaluation of voltage vs. pulse width modulation and feedback during set/reset verify-programming to achieve 10 million cycles for 50 nm HfO2 ReRAM

50nm HfO2 resistive memory cells were measured by 6×6 verification variations to determine the optimal method to achieve 107 endurance and yield. The combination of pulse width incrementation during reset and pulse height modulation during set provided the most stable and highest cycling capability. Based on these results, a new conceptual model is proposed which combines the physical conduction model with direct tunneling, and provides a calculation method to predict resistance and explain degradation and reset failure. Furthermore, intermediate storing of programming information on a page basis is proposed in order to improve overall endurance.

Design and analysis of crossbar architecture based on complementary resistive switching non-volatile memory cells

Emerging non-volatile memories (e.g. STT-MRAM, OxRRAM and CBRAM) based on resistive switching are under intense research and development investigation by both academics and industries. They provide high performance such as fast write/read speed, low power and good endurance (e.g. >1012), and could be used as both computing and storage memories beyond flash memories. However the conventional access architecture based on 1 transistor + 1 memory cell limits its storage density as the selection transistor should be large enough to ensure enough current for the switching operation. This paper presents the design and analysis of crossbar architecture based on complementary resistive switching non-volatile memory cells with a particular focus on reliability and power performance investigation. This architecture allows fewer selection transistors, and minimum contacts between memory cells and CMOS control circuits. The complementary cell and parallel data sensing mitigate the impact of sneak currents in the crossbar architecture and provide fast data access for computing purpose. We perform transient and statistical simulations based on two memory technologies: STT-MRAM and OxRRAM to validate the functionality of this design by using CMOS 40 nm design kit and memory compact models, which were developed based on relative physics and experimental parameters.

Influence of Carbon Alloying on the Thermal Stability and Resistive Switching Behavior of Copper-Telluride Based CBRAM Cells

We report the improved thermal stability of carbon alloyed Cu0.6Te0.4 for resistive memory applications. Copper-tellurium-based memory cells show enhanced switching behavior, but the complex sequence of phase transformations upon annealing is disadvantageous for integration in a device. We show that addition of about 40 at % carbon to the Cu-telluride layer results in an amorphous material up to 360 °C. This material was then integrated in a TiN/Cu0.6Te0.4-C/Al2O3/Si resistive memory cell, and compared to pure Cu0.6Te0.4. Very attractive endurance (up to 1 × 10(3) cycles) and retention properties (up to 1 × 10(4) s at 85 °C) are observed. The enhanced thermal stability and good switching behavior make this material a promising candidate for integration in memory devices.